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11. 发明授权

US5629609A Method and apparatus for improving the drop-out voltage in a low drop out voltage regulator 失效
标题翻译：用于提高低压降稳压器中的掉电电压的方法和装置
公开(公告)号：US5629609A
公开(公告)日：1997-05-13
申请号：US207863
申请日：1994-03-08
申请人： Baoson Nguyen , Fernando D. Carvajal
发明人： Baoson Nguyen , Fernando D. Carvajal
IPC分类号： G05F1/575 , G05F1/56
CPC分类号： G05F1/575
摘要： A low voltage drop out circuit (10) has a voltage regulating transistor (13) between a supply voltage (12) and an output terminal (28). An active feedback loop controls the voltage regulating transistor (13) according to a magnitude of the supply voltage (12) to control the voltage on the output terminal (28). A reference voltage source (25) produces a reference voltage, and a switch, which may be a second transistor (45) of similar type than the voltage regulating transistor (13), is connected in parallel with the voltage regulating transistor (13). A comparing circuit (42) detects when the supply voltage (12) falls below the reference voltage (25) to operate the second transistor (45), which may be sized to be much larger than the voltage regulating transistor (13) to effectively short across the voltage regulating transistor (13) when the supply voltage (12) falls below a predetermined level.
摘要翻译：低压降输出电路（10）在电源电压（12）和输出端子（28）之间具有电压调节晶体管（13）。主动反馈回路根据电源电压（12）的大小控制电压调节晶体管（13），以控制输出端子（28）上的电压。参考电压源（25）产生参考电压，并且可以是与电压调节晶体管（13）类似的第二晶体管（45）的开关与电压调节晶体管（13）并联连接。比较电路（42）检测电源电压（12）何时下降到参考电压（25）以操作第二晶体管（45），第二晶体管（45）的尺寸可以大大地大于电压调节晶体管（13）以有效地短当电源电压（12）下降到预定电平以下时，跨越电压调节晶体管（13）。

12. 发明授权

US5424628A Bandgap reference with compensation via current squaring 失效
标题翻译：带隙参考，通过电流平方补偿
公开(公告)号：US5424628A
公开(公告)日：1995-06-13
申请号：US055605
申请日：1993-04-30
申请人： Baoson Nguyen
发明人： Baoson Nguyen
IPC分类号： G05F3/30 , G05F3/26 , G05F3/16
CPC分类号： G05F3/267 , Y10S323/907
摘要： A bandgap reference circuit (14) in a bandgap voltage reference device (10) generates a bandgap voltage reference (V.sub.BG) at the base of a Q1 transistor (22) and a Q2 transistor (20). A reference current signal I.sub.T flows into the collectors of the Q2 transistor (20) and the Q1 transistor (22) as generated by a difference in base to emitter voltages due to a difference in emitter areas between the Q2 transistor (20) and the Q1 transistor (22). A correction current signal (I.sub.TT) generated by a current squaring circuit (16) is injected into the collector of the Q1 transistor (22) such that the collectors of the Q2 transistor (20) and the Q1 transistor (22) have unequal current values. The current squaring circuitry (16) generates the correction current signal (I.sub.TT) by squaring the reference current signal (I.sub.T) and dividing it into a sampling current signal (I.sub.SC ) generated in a current generator amplifier (18). The collector current difference between the Q2 transistor (20) and the Q1 transistor (22) enable the elimination of the second order temperature coefficient, as well as the first order temperature coefficient, of the base to emitter voltage (V.sub.BE) Of the Q1 transistor (22). In this manner, a bandgap voltage reference (V.sub.BG) becomes more stable, accurate, and less temperature dependent.
摘要翻译：带隙电压参考装置（10）中的带隙基准电路（14）在Q1晶体管（22）和Q2晶体管（20）的基极处产生带隙电压基准（VBG）。由于Q2晶体管（20）和Q1之间的发射极区域的差异，基准电流信号IT流入由基极与发射极之间的差产生的Q2晶体管（20）和Q1晶体管（22）的集电极晶体管（22）。将由电流平方电路（16）产生的校正电流信号（ITT）注入到Q1晶体管（22）的集电极中，使得Q2晶体管（20）和Q1晶体管（22）的集电极具有不相等的电流值。电流平方电路（16）通过平方参考电流信号（IT）产生校正电流信号（ITT），并将其分成在电流发生器放大器（18）中产生的采样电流信号（ISC）。 Q2晶体管（20）和Q1晶体管（22）之间的集电极电流差使得能够消除Q1晶体管（22）的基极 - 发射极电压（VBE）的二阶温度系数以及一阶温度系数（22）。以这种方式，带隙电压基准（VBG）变得更加稳定，准确且温度依赖性较小。

13. 发明授权

US08803495B2 Pre-bias control for switched mode power supplies 有权
标题翻译：开关模式电源的预偏置控制
公开(公告)号：US08803495B2
公开(公告)日：2014-08-12
申请号：US12846370
申请日：2010-07-29
申请人： Baoson Nguyen , Rex M. Teggatz , Li Li
发明人： Baoson Nguyen , Rex M. Teggatz , Li Li
IPC分类号： H02M1/36
CPC分类号： H02M1/36 , H02M3/1588 , Y02B70/1466
摘要： An embodiment of the invention provides a method of reducing a drop in voltage on a pre-biased output of a DC-DC step-down switching converter. A high side switch is activated to conduct a first current to the pre-biased output. After the high side switch is activated, a low side switch is activated to draw a second current from the pre-biased output such that the magnitude of the first current is greater than the magnitude of the second current for at least a portion of a time period T1. After the time period T1 ends, the magnitudes of the first and second currents are changed to maintain a predetermined voltage on the pre-biased output.
摘要翻译：本发明的实施例提供了一种降低DC-DC降压开关转换器的预偏置输出上的电压降的方法。激活高侧开关以将第一电流传导到预偏置输出。在高侧开关被激活之后，低侧开关被激活以从预偏置输出中抽出第二电流，使得第一电流的大小在至少一部分时间内大于第二电流的大小期T1。在时间段T1结束之后，改变第一和第二电流的大小以在预偏置输出上保持预定的电压。

14. 发明申请

US20120026762A1 Pre-Bias Control for Switched Mode Power Supplies 有权
标题翻译：开关电源的前置偏置控制
公开(公告)号：US20120026762A1
公开(公告)日：2012-02-02
申请号：US12846370
申请日：2010-07-29
申请人： Baoson Nguyen , Rex M. Teggatz , Li Li
发明人： Baoson Nguyen , Rex M. Teggatz , Li Li
IPC分类号： H02M1/36
CPC分类号： H02M1/36 , H02M3/1588 , Y02B70/1466
摘要： An embodiment of the invention provides a method of reducing a drop in voltage on a pre-biased output of a DC-DC step-down switching converter. A high side switch is activated to conduct a first current to the pre-biased output. After the high side switch is activated, a low side switch is activated to draw a second current from the pre-biased output such that the magnitude of the first current is greater than the magnitude of the second current for at least a portion of a time period T1. After the time period T1 ends, the magnitudes of the first and second currents are changed to maintain a predetermined voltage on the pre-biased output.
摘要翻译：本发明的实施例提供了一种降低DC-DC降压开关转换器的预偏置输出上的电压降的方法。激活高侧开关以将第一电流传导到预偏置输出。在高侧开关被激活之后，低侧开关被激活以从预偏置输出中抽出第二电流，使得第一电流的大小在至少一部分时间内大于第二电流的大小期T1。在时间段T1结束之后，改变第一和第二电流的大小以在预偏置输出上保持预定的电压。

15. 发明授权

US06181196B2 Accurate bandgap circuit for a CMOS process without NPN devices 有权
标题翻译：无NPN器件的CMOS工艺的精确带隙电路
公开(公告)号：US06181196B2
公开(公告)日：2001-01-30
申请号：US09211400
申请日：1998-12-14
申请人： Baoson Nguyen
发明人： Baoson Nguyen
IPC分类号： G05F110
CPC分类号： G05F3/30
摘要： An integrated circuit (12) made with a CMOS P-epi process includes a bandgap circuit (16). A pair of PNP bipolar junction transistors (73, 72) have respective currents flowing through them with a ratio of 8 to 1. A differential stage has a further pair of PNP bipolar junction transistors (66, 67) which are identical, and which have their emitters coupled to each other and to a power source (11). Each transistor of the further pair has a base coupled to the emitter of a respective transistor of the first pair. The output of the differential stage controls a current source (82), which causes a current to flow through multiple resistors (86, 87, 88) and through a diode (30). One of the resistors (87) has its ends coupled to the respective bases of the transistors of the first pair.
摘要翻译：由CMOS P-epi工艺制成的集成电路（12）包括带隙电路（16）。一对PNP双极结型晶体管（73,72）具有以8比1的比例流过它们的相应电流。差分级具有一对相同的PNP双极结型晶体管（66,67），并且具有其发射器彼此耦合并连接到电源（11）。另一对的每个晶体管具有耦合到第一对的相应晶体管的发射极的基极。差分级的输出控制电流源（82），其使电流流过多个电阻（86,87,88）并通过二极管（30）。电阻器（87）中的一个具有耦合到第一对晶体管的相应基极的端部。

16. 发明授权

US5942910A Method and circuit for providing accurate voltage sensing for a power transistor, or the like 失效
标题翻译：用于为功率晶体管等提供准确的电压感测的方法和电路
公开(公告)号：US5942910A
公开(公告)日：1999-08-24
申请号：US919453
申请日：1997-08-28
申请人： Baoson Nguyen
发明人： Baoson Nguyen
IPC分类号： G01R31/26 , H01L23/58
CPC分类号： G01R31/2621
摘要： A circuit (10) is disclosed for enabling voltage to be sensed across a power transistor (12) of the type which has first and second active regions, such as source (85) and drain (76) regions of an MOS transistor (12), or emitter and collector regions of a bipolar transistor (42), in a semiconductor substrate (72), with the first region (76) located along a first lateral extent in the substrate (72) to have ends at terminal locations (D1,S1) of the first lateral extent and the second region located along a second lateral extent in the substrate (72) to have ends at terminal locations (D2,S2) of the second lateral extent. The circuit (10) includes a first conductive line (20) connected to the first region at said terminal locations (D1,D2) of the first lateral extent, and a first voltage sensing connection (22) to a midpoint of the first conductive line (20). A second conductive line (28) is connected to the second region at the terminal locations (S1,S2) of the second lateral extent, and a second voltage sensing connection is made to a midpoint (34) of the second conductive line (28). The conductive lines (20,28) may be, for example, metal, polysilicon, or other suitable material.
摘要翻译：公开了一种电路（10），用于使得能够跨越具有第一和第二有源区域的类型的功率晶体管（12）感测电压，诸如MOS晶体管（12）的源极（85）和漏极（76）区域，，或半导体衬底（72）中的双极晶体管（42）的发射极和集电极区域，其中第一区域（76）沿着衬底（72）中的第一横向位置设置，以在端子位置（D1， S1），并且第二区域沿着衬底（72）中的第二横向范围设置，以在第二横向范围的终端位置（D2，S2）处具有端部。电路（10）包括在第一横向范围的所述端子位置（D1，D2）处连接到第一区域的第一导电线（20）和到第一导线的中点的第一电压感测连接（22）（20）。第二导线（28）在第二横向范围的端子位置（S1，S2）处连接到第二区域，并且第二电压感测连接被制成到第二导线（28）的中点（34）。导线（20,28）可以是例如金属，多晶硅或其它合适的材料。

17. 发明授权

US5682049A Method and apparatus for trimming an electrical value of a component of an integrated circuit 失效
标题翻译：用于修整集成电路的部件的电气值的方法和装置
公开(公告)号：US5682049A
公开(公告)日：1997-10-28
申请号：US510159
申请日：1995-08-02
申请人： Baoson Nguyen
发明人： Baoson Nguyen
IPC分类号： H01L21/66 , H01L29/04 , H01L23/62 , H01L29/00
CPC分类号： H01L22/22
摘要： An integrated circuit and method for using same is constructed on a semiconductor substrate (15) with a structure (24) in the substrate (15) having an electrical value desired to be trimable and with a conducting layer (33) on the substrate (15) insulated (30) from the structure (14) except at one location (26), which is electrically connected to a first part of the structure (24). An oxide layer (48) separates one portion of the structure (24) from a part of the conductor (33). The second oxide layer (48) has a predetermined breakdown voltage such that when a voltage, V.sub.TRIM, larger than the second predetermined breakdown voltage is applied between the conductor (33) and the structure (24), the second oxide layer (48) breaks down, shorting the first and second parts (46, 50) of the structure (24) to trim its value.
摘要翻译：在半导体衬底（15）上构造集成电路及其使用方法，其中衬底（15）中的结构（24）具有希望可修整的电气值，并且在衬底（15）上具有导电层（33））与结构（14）绝缘（30），除了电连接到结构（24）的第一部分的一个位置（26）之外。氧化物层（48）将结构（24）的一部分与导体（33）的一部分分开。第二氧化物层（48）具有预定的击穿电压，使得当在导体（33）和结构（24）之间施加大于第二预定击穿电压的电压VTRIM时，第二氧化物层（48）断开使结构（24）的第一和第二部分（46,50）短路以修剪其值。

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