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11. 发明授权

US07393703B2 Method for reducing within chip device parameter variations 有权
标题翻译：降低芯片内部器件参数变化的方法
公开(公告)号：US07393703B2
公开(公告)日：2008-07-01
申请号：US11382489
申请日：2006-05-10
申请人： Brent Alan Anderson , Shahid Ahmad Butt , Allen H. Gabor , Patrick Edward Lindo , Edward Joseph Nowak , Jed Hickory Rankin
发明人： Brent Alan Anderson , Shahid Ahmad Butt , Allen H. Gabor , Patrick Edward Lindo , Edward Joseph Nowak , Jed Hickory Rankin
IPC分类号： G01R31/26 , H01L21/00
CPC分类号： H01L22/20
摘要： A method of reducing parametric variation in an integrated circuit (IC) chip and an IC chip with reduced parametric variation. The method includes: on a first wafer having a first arrangement of chips, each IC chip divided into a second arrangement of regions, measuring a test device parameter of test devices distributed in different regions; and on a second wafer having the first arrangement of IC chips and the second arrangement of regions, adjusting a functional device parameter of identically designed field effect transistors within one or more regions of all IC chips of the second wafer based on a values of the test device parameter measured on test devices in regions of the IC chip of the first wafer by a non-uniform adjustment of physical or metallurgical polysilicon gate widths of the identically designed field effect transistors from region to region within each IC chip.
摘要翻译：一种降低参数变化减小的集成电路（IC）芯片和IC芯片的参数变化的方法。该方法包括：在具有第一芯片布置的第一晶片上，将每个IC芯片分成第二区域布置，测量分布在不同区域中的测试装置的测试装置参数; 并且在具有IC芯片的第一布置和第二区域布置的第二晶片上，基于测试值调整第二晶片的所有IC芯片的一个或多个区域内相同设计的场效应晶体管的功能器件参数在第一晶片的IC芯片的区域中的测试装置上测量的器件参数通过在每个IC芯片内的区域到区域的相同设计的场效应晶体管的物理或冶金多晶硅栅极宽度的不均匀调整而不均匀地调整。

12. 发明授权

US07354779B2 Topography compensated film application methods 有权
标题翻译：地形补偿膜应用方法
公开(公告)号：US07354779B2
公开(公告)日：2008-04-08
申请号：US11276707
申请日：2006-03-10
申请人： Colin J. Brodsky , Scott J. Bukofsky , Allen H. Gabor
发明人： Colin J. Brodsky , Scott J. Bukofsky , Allen H. Gabor
IPC分类号： G01R31/26 , H01L21/66
CPC分类号： H01L21/0271 , H01L21/0276
摘要： Methods for applying topographically compensated film in a semiconductor wafer fabrication process are disclosed. The processes include premapping a surface of a wafer so as to determine the local topography (e.g., z-height) of the wafer and then applying a variable depth of a film to the wafer, such that the variable depth is modulated based on the local topography of the wafer. The resultant topography of the applied film and wafer is substantially planar (e.g., within approximately 100 nm) across the wafer.
摘要翻译：公开了在半导体晶片制造工艺中应用地形学补偿膜的方法。这些过程包括预先处理晶片的表面，以便确定晶片的局部形貌（例如，z-高度），然后将薄膜的可变深度施加到晶片，使得可变深度基于本地晶圆的形貌。所施加的膜和晶片的所得形貌在晶片上基本上是平面的（例如在大约100nm内）。

13. 发明授权

US07288478B2 Method for performing chemical shrink process over BARC (bottom anti-reflective coating) 失效
标题翻译：在BARC（底部防反射涂层）上进行化学收缩工艺的方法
公开(公告)号：US07288478B2
公开(公告)日：2007-10-30
申请号：US11160670
申请日：2005-07-05
申请人： Todd Christopher Bailey , Colin J. Brodsky , Allen H. Gabor
发明人： Todd Christopher Bailey , Colin J. Brodsky , Allen H. Gabor
IPC分类号： H01L21/4763
CPC分类号： H01L21/76802 , H01L21/0273 , H01L21/31144 , H01L21/76816 , Y10T428/24322 , Y10T428/24331 , Y10T428/24521 , Y10T428/249953
摘要： A structure and a method for forming the same. The method comprises providing a structure including (a) a hole layer, (b) a BARC (bottom antireflective coating) layer on the top of the hole layer, and (c) a patterned photoresist layer on top of the BARC layer and having a photoresist hole; etching the BARC layer through the photoresist hole to extend the photoresist hole to the hole layer; performing the chemical shrinking process to shrink the extended photoresist hole; and etching the hole layer through the shrunk, extended photoresist hole so as to form a hole in the hole layer.
摘要翻译：一种结构及其形成方法。该方法包括提供一种结构，其包括（a）空穴层，（b）在空穴层顶部的BARC（底部抗反射涂层）层，和（c）在BARC层的顶部上的图案化光致抗蚀剂层，光致抗蚀剂孔; 通过光致抗蚀剂孔蚀刻BARC层以将光致抗蚀剂孔延伸到孔层; 执行化学收缩过程以收缩延伸的光致抗蚀剂孔; 并且通过收缩的延伸的光致抗蚀剂孔蚀刻孔层，以在孔层中形成孔。

14. 发明授权

US06964032B2 Pitch-based subresolution assist feature design 失效
标题翻译：基于间距的分解辅助功能设计
公开(公告)号：US06964032B2
公开(公告)日：2005-11-08
申请号：US10378579
申请日：2003-02-28
申请人： Lars W. Liebmann , Allen H. Gabor , Ronald L. Gordon , Carlos A. Fonseca , Martin Burkhardt
发明人： Lars W. Liebmann , Allen H. Gabor , Ronald L. Gordon , Carlos A. Fonseca , Martin Burkhardt
IPC分类号： G03F1/00 , G06F17/50 , H01L21/027
CPC分类号： G03F7/70441 , G03F1/36 , G03F7/70125 , G06F17/5068 , G06F2217/12
摘要： A method of designing a mask for imaging an integrated circuit (IC) design layout is provided to efficiently configure subresolution assist features (SRAFs) corresponding to an optimally configured annular illumination source of a lithographic projection system. A critical pitch is identified for the IC design, and optimal inner and outer radial coordinates of an annular illumination source are determined so that the resulting image projected through the mask will be optimized for the full range of pitches in the design layout. A relationship is provided for determining an optimal inner radius and outer radius for the annular illumination source. The number and placement of SRAFs are added to the mask design so that the resulting range of pitches substantially correspond to the critical pitch. The method of configuring SRAFs so that the image will have optimal characteristics, such as good contrast and good depth of focus, is fast.
摘要翻译：提供了一种设计用于对集成电路（IC）设计布局进行成像的掩模的方法，以有效地配置对应于光刻投影系统的最佳配置的环形照明源的分解辅助特征（SRAF）。确定IC设计的关键音调，并且确定环形照明光源的最佳内外径向坐标，以便通过掩模投射的所得图像将针对设计布局中的全部音高进行优化。提供了用于确定环形照明源的最佳内半径和外半径的关系。将SRAF的数量和位置添加到掩模设计中，使得所得到的间距范围基本上对应于临界间距。配置SRAF的方法是使图像具有最佳特征，如良好的对比度和良好的聚焦深度。

15. 发明授权

US6146793A Radiation sensitive terpolymer, photoresist compositions thereof and 193 nm bilayer systems 失效
标题翻译：辐射敏感三元共聚物，其光刻胶组合物和193纳米双层体系
公开(公告)号：US6146793A
公开(公告)日：2000-11-14
申请号：US255589
申请日：1999-02-22
申请人： Ulrich Schaedeli , Andrew J. Blakeney , Thomas Steinhausler , Daniela White , Allen H. Gabor
发明人： Ulrich Schaedeli , Andrew J. Blakeney , Thomas Steinhausler , Daniela White , Allen H. Gabor
IPC分类号： G03F7/004 , G03F7/039 , G03F7/075 , G03F7/36
CPC分类号： G03F7/039 , G03F7/0758 , G03F7/0045 , Y10S430/111
摘要： A terpolymer with chemically amplified (acid labile) moieties and organosilicon moieties suitable for use as the binder resin for a photoimageable resist photoresist composition suitable for use in 193 nm photolithographic processes.The terpolymers have the following structural units: ##STR1## where R is a methyl or hydroxyethyl group, R.sup.1 is a hydrogen atom, a methyl group or a --CH.sub.2 COOCH.sub.3 group and R.sup.2 and R.sup.3 are each independently a hydrogen atom or a methyl group.
摘要翻译：具有化学扩增（酸不稳定）部分的三元共聚物和适用于适用于193nm光刻工艺的可光致成像抗蚀剂光刻胶组合物的粘合剂树脂的有机硅部分。三元共聚物具有以下结构单元：其中R是甲基或羟乙基，R 1是氢原子，甲基或-CH 2 COOCH 3基团，R 2和R 3各自独立地是氢原子或甲基。

16. 发明授权

US5318877A Bilayer resist and process for preparing same 失效
公开(公告)号：US5318877A
公开(公告)日：1994-06-07
申请号：US155796
申请日：1993-11-22
申请人： Christopher K. Ober , Allen H. Gabor , Eric A. Lehner , Guoping Mao , Lizabeth A. Schneggenburger
发明人： Christopher K. Ober , Allen H. Gabor , Eric A. Lehner , Guoping Mao , Lizabeth A. Schneggenburger
IPC分类号： G03F7/075 , H01L21/027 , G03C1/492 , G03C1/494
CPC分类号： G03F7/075 , H01L21/0274
摘要： A resist pattern on a substrate is formed using an imageable resist layer on the surface of a substrate. The imageable resist layer comprises a silicon-incorporated polystyrene-diene block copolymer having a silicon weight percent of at least about 5 percent. The imageable layer is prepared by reacting a polystyrene-diene block copolymer with a silicon-containing compound in the presence of a platinum catalyst. In a preferred embodiment, the poly(styrene)-diene block copolymers are hydrosilylated by hydrosiloxanes using a platinum-divinyl tetramethyl disiloxane catalyst.

17. 发明授权

US08507346B2 Method of forming a semiconductor device having a cut-way hole to expose a portion of a hardmask layer 有权
标题翻译：形成具有切割孔以暴露硬掩模层的一部分的半导体器件的方法
公开(公告)号：US08507346B2
公开(公告)日：2013-08-13
申请号：US12949148
申请日：2010-11-18
申请人： Martin Burkhardt , Matthew E. Colburn , Allen H. Gabor , Oleg Gluschenkov , Scott D. Halle , Howard S. Landis , Helen Wang
发明人： Martin Burkhardt , Matthew E. Colburn , Allen H. Gabor , Oleg Gluschenkov , Scott D. Halle , Howard S. Landis , Helen Wang
IPC分类号： H01L21/336 , H01L21/8234 , H01L21/84 , H01L21/338 , H01L21/3205 , H01L21/4763 , H01L21/311 , H01L21/302 , H01L21/461
CPC分类号： H01L29/78 , H01L21/28123 , H01L21/32139 , H01L22/12 , H01L22/26
摘要： A method of forming a semiconductor device having a substrate, an active region and an inactive region includes: forming a hardmask layer over the substrate; transferring a first pattern into the hardmask layer in the active region of the semiconductor device; forming one or more fills in the inactive region; forming a cut-away hole within, covering, or partially covering, the one or more fills to expose a portion of the hardmask layer, the exposed portion being within the one or more fills; and exposing the hardmask layer to an etchant to divide the first pattern into a second pattern including at least two separate elements.
摘要翻译：一种形成具有衬底，有源区和非活性区的半导体器件的方法包括：在衬底上形成硬掩模层; 将第一图案转移到半导体器件的有源区中的硬掩模层中; 在非活性区域中形成一个或多个填充物; 在所述一个或多个填充物内部，覆盖或部分地覆盖所述硬掩模层的一部分以暴露所述硬掩模层的一部分内的切除孔，所述暴露部分在所述一个或多个填充物内; 以及将所述硬掩模层暴露于蚀刻剂以将所述第一图案划分成包括至少两个分离元件的第二图案。

18. 发明授权

US08455162B2 Alignment marks for multi-exposure lithography 失效
标题翻译：多曝光光刻对准标记
公开(公告)号：US08455162B2
公开(公告)日：2013-06-04
申请号：US13170316
申请日：2011-06-28
申请人： Allen H. Gabor , Vinayan C. Menon
发明人： Allen H. Gabor , Vinayan C. Menon
IPC分类号： G03F9/00
CPC分类号： G03F1/42 , G03F1/70 , G03F9/7076 , G03F9/708
摘要： A plurality of reticles for printing structures in the same lithography level includes an alignment structure pattern within a same relative location in each reticle. Each set of process segmentations in a grating has a reticle segmentation pitch, which is common across all gratings in the plurality of reticles. Within each pair of alignment structure patterns that occupy the same relative location in any two of the plurality of reticles, the process segmentations in one reticle are shifted relative to the process segmentations in the other reticle by a fraction of a reticle segmentation pitch. After printing all patterns in the plurality of reticles, a composite printed process segmentation structure on the substrate includes printed segmentation structures that are spaced by 1/n times the printed segmentation pitch. The pattern for the next level can be aligned to the composite printed process segmentation structure in a single alignment operation.
摘要翻译：用于在相同光刻级别打印结构的多个掩模版包括在每个掩模版中的相同相对位置内的对准结构图案。光栅中的每组处理分段具有掩模版分割间距，其在多个光栅中的所有光栅上是共同的。在每对对准结构图案对中，在多个光罩中的任何两个中占据相同的相对位置，一个掩模版中的处理分割相对于另一个掩模版中的处理分段移位一定的标线片分割间距。在印刷多个掩模版中的所有图案之后，基板上的复合印刷工艺分割结构包括间隔开印刷分割间距的1 / n倍的印刷分割结构。可以在单个对齐操作中将下一级别的模式与复合打印过程分段结构对齐。

19. 发明授权

US08361683B2 Multi-layer chip overlay target and measurement 失效
标题翻译：多层芯片覆盖目标和测量
公开(公告)号：US08361683B2
公开(公告)日：2013-01-29
申请号：US12757344
申请日：2010-04-09
申请人： Christopher P. Ausschnitt , Allen H. Gabor , Nelson M. Felix
发明人： Christopher P. Ausschnitt , Allen H. Gabor , Nelson M. Felix
IPC分类号： G03F9/00 , G01B11/00
CPC分类号： H01L23/544 , G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： A wafer includes an active region and a kerf region surrounding at least a portion of the active region. The wafer also includes a target region having a rectangular shape with a width and a length greater than the width, the target region including one or more target patterns, at least one of the target patterns being formed by two sub-patterns disposed at opposing corners of a target rectangle disposable within the target region.
摘要翻译：晶片包括活性区域和围绕有源区域的至少一部分的切口区域。晶片还包括具有宽度和长度大于宽度的矩形形状的目标区域，目标区域包括一个或多个目标图案，目标图案中的至少一个由设置在相对角部处的两个子图案形成在目标区域内可放置的目标矩形。

20. 发明申请

US20110248388A1 MULTI-LAYER CHIP OVERLAY TARGET AND MEASUREMENT 失效
标题翻译：多层芯片覆盖目标和测量
公开(公告)号：US20110248388A1
公开(公告)日：2011-10-13
申请号：US12757344
申请日：2010-04-09
申请人： Christopher P. Ausschnitt , Allen H. Gabor , Nelson M. Felix
发明人： Christopher P. Ausschnitt , Allen H. Gabor , Nelson M. Felix
IPC分类号： H01L23/544 , G03F7/20
CPC分类号： H01L23/544 , G03F7/70633 , H01L2924/0002 , H01L2924/00
摘要： A wafer includes an active region and a kerf region surrounding at least a portion of the active region. The wafer also includes a target region having a rectangular shape with a width and a length greater than the width, the target region including one or more target patterns, at least one of the target patterns being formed by two sub-patterns disposed at opposing corners of a target rectangle disposable within the target region.
摘要翻译：晶片包括有源区域和围绕有源区域的至少一部分的切口区域。晶片还包括具有宽度和长度大于宽度的矩形形状的目标区域，目标区域包括一个或多个目标图案，目标图案中的至少一个由设置在相对角部处的两个子图案形成在目标区域内可放置的目标矩形。

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