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    • 12. 发明授权
    • Algorithm for testing a memory
    • 用于测试内存的算法
    • US5561765A
    • 1996-10-01
    • US281050
    • 1994-07-27
    • Shmuel ShafferDavid Weiss
    • Shmuel ShafferDavid Weiss
    • G11C29/10G06F11/00G11C7/00
    • G11C29/10
    • A method for generating test data for testing a memory having k data bits and n address bits, where n is less than or equal to 2 times k. For each address location for which test data is desired, the address bits for the location are combined to form the test data for the location. First, two mutually-exclusive groups of n minus k non-repeating bits of the address word are selected. Second, the two groups of address bits are combined using an exclusive-OR operation. Third, the results of the exclusive-OR operation are combined with any remaining bits of the address word to form the test data for the address location. For example, in one embodiment, the most significant n minus k bits of the least significant k bits of the address word are combined, via an exclusive-OR operation, with the most significant n minus k bits of the address word. The resulting data is then concatenated with the remaining bits of the address word.
    • 一种用于产生用于测试具有k个数据位和n个地址位的存储器的测试数据的方法,其中n小于或等于2倍k。 对于需要测试数据的每个地址位置,组合位置的地址位以形成位置的测试数据。 首先,选择地址字的n个减去k个非重复位的两个相互排斥的组。 其次,使用异或运算来组合两组地址位。 第三,异或运算的结果与地址字的任何剩余位组合,形成地址位置的测试数据。 例如,在一个实施例中,地址字的最低有效k比特的最高有效n个k比特经由异或运算与地址字的最高有效n个k比特组合。 然后将结果数据与地址字的其余位连接。