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    • 161. 发明授权
    • Digital signal processor modem
    • 数字信号处理器调制解调器
    • US4620294A
    • 1986-10-28
    • US530690
    • 1983-09-09
    • Tommy Y. LeungMark A. Waldron
    • Tommy Y. LeungMark A. Waldron
    • H04L27/10H04L1/00H04L5/14H04L27/00H04L27/18G06F3/00H04L5/12
    • H04L27/0008H04L5/143H04L1/0003
    • A dual speed, full duplex modem for transmitting and receiving data on a dialed-access telephone line includes a signal processor for storing samples corresponding to a sinusoidal waveform, for selecting samples at intervals determined by the mode in which the modem is operating to synthesize a signal for modulating by data for transmission, and for autocorrelating a received signal at a frequency determined by the mode in which the modem is operating to recover data from the received signal. The signal processor includes configuring input ports, and a microcomputer receives instructions related to the mode in which the modem is to operate to output a mode-configuring word to the configuring inputs. Conversion from the signal processor's digital output to the analog signal to the line and from the line's analog signal to the signal processor's digital input take place through two time-division multiplexed coder-decoders. The stored sinusoid is mu-law compressed. The modem can dual tone, multiple frequency dial. The DTMF pair requires a different amplitude from the amplitude of the synthesized signal for modulating by data for transmission. A power series expansion of the required amplitudes of the DTMF tone pair permits both the synthesized signal for modulating by data for transmission and the tones of the DTMF pair to be calculated from the mu-law compressed sinusoid.
    • 用于在拨号接入电话线路上发送和接收数据的双速全双工调制解调器包括用于存储对应于正弦波形的样本的信号处理器,用于以由调制解调器正在操作的模式确定的间隔选择采样以合成 信号,用于通过数据进行调制以进行传输,并且以由调制解调器正在操作的模式确定的频率自动相关接收的信号,以从接收的信号中恢复数据。 信号处理器包括配置输入端口,并且微型计算机接收与调制解调器要操作的模式有关的指令,以将配置文字输出到配置输入。 从信号处理器的数字输出到模拟信号到线路和从线路的模拟信号到信号处理器的数字输入的转换通过两个时分复用的编码器解码器进行。 存储的正弦曲线是mu-law压缩的。 调制解调器可以双音,多频拨号。 DTMF对需要与合成信号的振幅不同的幅度,用于通过数据进行传输。 DTMF音调对所需幅度的幂级数扩展允许由数据进行调制的合成信号进行传输,并且可以从μ律压缩的正弦波计算DTMF对的音调。
    • 162. 发明授权
    • Remote transmitter control system
    • 远程变送器控制系统
    • US4606049A
    • 1986-08-12
    • US677434
    • 1984-12-03
    • Richard A. Daniel
    • Richard A. Daniel
    • H04L25/02H04L27/10H04B3/36
    • H04L27/10H04L25/02
    • A remote transmitter system including a control station and a remote trantter station. The control station includes a variable frequency oscillator, a modulator, a parallel to series digital data converter and a DC power supply. The remote transmitter station comprises a power storage circuit, a phase-locked-loop demodulator, a local oscillator, a modulator and a power amplifier. The variable frequency oscillator provides two signals f.sub.o and f.sub.1 that are harmonics of each other and are in-phase. These signals modulate the 0's and 1's of digital data that is transmitted along a coaxial cable to the phase-locked-loop demodulator that provides a control signal to the local oscillator and the modulated digital data signal (f.sub.o, f.sub.1) to the modulator. The local oscillator generates two signals f.sub.A and f.sub.B, that have a predetermined phase and/or frequency relationship to f.sub.o and f.sub.1. The f.sub.o and f.sub.1 signals are detected and applied to the modulator as a control signal (D.sub.o, D.sub.1) that generates a serial input signal (f.sub.A, f.sub.B) to the power amplifier and represents the binary data. The invention may be used with either phase modulation, or frequency modulation depending upon the design of the local oscillator. The two outputs f.sub.A and f.sub.B of the modulator can be designed to have any relationship of frequency for frequency modulation or phase for phase modulation.
    • 远程发射机系统,包括控制站和远程发射台。 控制站包括可变频率振荡器,调制器,并行串行数字数据转换器和直流电源。 远程发射台包括电源存储电路,锁相环解调器,本地振荡器,调制器和功率放大器。 可变频率振荡器提供两个彼此谐波的信号fo和f1,它们是同相的。 这些信号将沿着同轴电缆传输的数字数据的0和1调制到锁相环解调器,该解调器向本地振荡器提供控制信号,并向调制器提供调制数字数据信号(fo,f1)。 本地振荡器产生与fo和f1具有预定相位和/或频率关系的两个信号fA和fB。 检测fo和f1信号并作为向功率放大器生成串行输入信号(fA,fB)的控制信号(Do,D1)并将其施加到调制器,并表示二进制数据。 取决于本地振荡器的设计,本发明可以用于相位调制或频率调制。 调制器的两个输出fA和fB可被设计为具有用于频率调制或相位调制的频率的任何关系。
    • 163. 发明授权
    • FSK data communication system
    • FSK数据通信系统
    • US4596022A
    • 1986-06-17
    • US526335
    • 1983-08-25
    • Donald L. Stoner
    • Donald L. Stoner
    • H04L27/10
    • H04L27/10
    • A system for communicating digital data over a limited bandwidth transmission link, including a transition detector for detecting transitions in the binary logic state of an input digital signal and generating a transition indicator signal in response thereto; a frequency-shift key responsive to the transition indicator signal for generating a frequency-shift keyed signal to be transmitted over the link corresponding to the logic states of the input digital signal, the frequency-shift keyed signal comprised of substantially one cycle of a high-frequency signal for a bit at one logic state and substantially one-half cycle of a low-frequency signal for a bit at the other logic state; a zero-crossing detector for detecting zero-crossings of the frequency-shift keyed signal received over the link and generating a zero-crossing indicator signal; a frequency detector responsive to the zero-crossing signal for detecting the high-frequency and low-frequency signals of the frequency-shift keyed signal, and generating a frequency indicator signal; and a pulse generator responsive to the zero-crossing indicator signal and the frequency indicator signal for generating an output digital signal corresponding to the input digital signal. A synchronizer synchronizes shifts between the high-frequency and low-frequency signals of the frequency-shift keyed signal with changes in the logic state of the digital signal. The frequency-shift key includes an oscillator for generating the high-frequency and low-frequency signals, and an oscillator reset for providing substantially in-phase signal shifts between the high-frequency and low-frequency signals of the frequency-shift keyed signal.
    • 一种用于在有限带宽传输链路上传送数字数据的系统,包括用于检测输入数字信号的二进制逻辑状态的转变的转换检测器,并响应于此产生转换指示符信号; 响应于转换指示符信号的频移键,用于产生要通过对应于输入数字信号的逻辑状态的链路发送的频移键控信号,该频移键控信号包括基本上一个高的周期 在一个逻辑状态下的一位的频率信号和在另一个逻辑状态下的位的低频信号的大致一半周期; 用于检测通过链路接收的频移键控信号的过零点并产生过零指示符信号的过零检测器; 响应于过零信号的频率检测器,用于检测频移键控信号的高频和低频信号,并产生频率指示器信号; 以及响应于所述过零指示符信号和所述频率指示符信号的脉冲发生器,用于产生对应于所述输入数字信号的输出数字信号。 同步器通过数字信号的逻辑状态的变化来同步频移键控信号的高频和低频信号之间的移位。 频移键包括用于产生高频和低频信号的振荡器,以及用于在频移键控信号的高频和低频信号之间提供基本上同相的信号移位的振荡器复位。
    • 164. 发明授权
    • Method of, and apparatus for, frequency-hopped frequency-shift-keyed
digital data communications
    • 跳频频移键控数字数据通信的方法和装置
    • US4583231A
    • 1986-04-15
    • US548060
    • 1983-11-02
    • Charles M. Puckette
    • Charles M. Puckette
    • H04B1/7136H04L27/10H04B15/00H04L27/18
    • H04B1/7136H04L27/10H04B2001/71362
    • A digital data communications method and system combining frequency agility with a frequency-shift-keyed signal to transmit a unique code word representing a plurality of data states. Each code word comprises a plurality of chips, each of which is an integer subportion of the bit time interval in which one data bit is communicated. The multiple-chip word provides a frequency-hopped spread spectrum signal in which the nominal carrier frequency value is offset for transmitting binary data, or is offset in either frequency direction by different discrete amounts for transmitting multilevel digital data, to allow the data value to be properly decoded at a receiver even if the transmitter instantaneous frequency during at least one chip time interval is jammed by another signal. The frequency offset, can also be provided in complementary fashion during selected chip time intervals to even further encode the data bit being communicated and further reduce the probability of jamming. The multiple-chip code word, of normal or selected-chip-complemented form, modulates a carrier at the transmitter end. The FH-FSK carrier is demodulated at the receiver end by an inverse modulation process which converts the signal into a serial bit stream, for matched filtering transmission and reception apparatus of non-complemented and/or complemented chip-encoded words is described.
    • 数字数据通信方法和系统,其将频率捷变与频移键控信号相结合,以传送表示多个数据状态的唯一码字。 每个代码字包括多个芯片,每个芯片是一个数据位传送的位时间间隔的整数子部分。 多芯片字提供跳频扩频信号,其中标称载波频率值被偏移用于发送二进制数据,或者在任一频率方向上偏移用于传输多电平数字数据的不同离散量,以允许数据值 即使在至少一个码片时间间隔期间的发射机瞬时频率被另一个信号卡住,也可以在接收机处适当地解码。 频率偏移也可以在选定的码片时间间隔内以互补方式提供,以进一步编码被传送的数据比特进一步编码,并进一步降低卡纸的可能性。 正常或选择芯片补码形式的多芯片码字在发射端调制载波。 描述FH-FSK载波在接收端通过将该信号转换成串行比特流的逆调制处理进行解调,对于未补码和/或补码的码片编码字的匹配滤波发送和接收装置进行描述。
    • 165. 发明授权
    • Method for communicating binary data using modified frequency shift
keying techniques
    • 使用修改的频移键控技术传送二进制数据的方法
    • US4578798A
    • 1986-03-25
    • US589764
    • 1984-03-15
    • August A. Divjak, Jr.Thomas C. Holdorf
    • August A. Divjak, Jr.Thomas C. Holdorf
    • H04L27/10H03C3/00
    • H04L27/10
    • A method for communicating binary data using modified frequency shift keying techniques generally includes the steps of selecting a first bit count representative of a first untranslated frequency denoting a data signal at a first logic state, selecting a second bit count representative of a second untranslated frequency denoting a data signal at a second logic state and computing a mean bit count intermediate the first and second bit counts.A signal is detected which has a first component at a first translated frequency and a second component at a second translated frequency and defines a first interval of time having boundaries identifiable as T0 and T1, a second interval of time having boundaries identifiable as T1 and T2, a third interval of time having boundaries identifiable as T2 and T3 and a fourth interval of time having boundaries identifiable as T3 and T4. A base bit count is generated which is representative of the sum of said second and third time intervals and the first component is decoded as a data signal at said first logic state if the base bit count is equal to or greater than the mean bit count. If the base bit count is less than the mean bit count, other bit counts are generated and a bit clock initiation time is selected as that time identifiable as T1 if the base bit count is equal to or less than a fore bit count. Other times may be selected as the bit clock initiation time, depending upon the outcome of disclosed bit count comparisons.
    • 使用修改的频移键控技术来传送二进制数据的方法通常包括以下步骤:选择表示在第一逻辑状态下表示数据信号的第一非翻译频率的第一比特计数,选择​​表示第二非翻译频率表示的第二比特计数 数据信号处于第二逻辑状态,并计算第一和第二位计数之间的平均位数。 检测到具有第一转换频率的第一分量和第二转换频率的第二分量的信号,并且定义具有可识别为T0和T1的边界的第一时间间隔,具有可识别为T1和T2的边界的第二时间间隔 ,具有可识别为T2和T3的边界的第三时间间隔和具有可识别为T3和T4的边界的第四时间间隔。 如果基本位数等于或大于平均位数,则产生基本位计数,其表示所述第二和第三时间间隔的总和,并且第一分量被解码为处于所述第一逻辑状态的数据信号。 如果基本位数小于平均位计数,则如果基位计数等于或小于前位计数,则生成其他位计数,并选择位时钟启动时间作为T1可识别的时间。 根据所公开的比特数比较的结果,可以选择其他时间作为比特时钟启动时间。
    • 170. 发明授权
    • Tracking and telemetry system for severe multipath acoustic channels
    • 用于严重多声道声道的跟踪和遥测系统
    • US4463452A
    • 1984-07-31
    • US417784
    • 1982-09-13
    • Jay V. Chase, Jr.
    • Jay V. Chase, Jr.
    • H04B11/00H04L27/10
    • H04B11/00H04L27/10Y10S367/901
    • A modulation/signal processing technique for acoustic communication in show water. Digital information is transmitted in a time expended version of frequency shift keying where a tone burst at a first frequency represents a logical zero and a tone burst at a second frequency represents a logical one. There is a long quiet time between bits to allow multipath interference to decay. A relative energy detector with a fast attack/slow decay circuit for Doppler compensation is used to receive the transmitted tone bursts and reproduce a digital data train equivalent to the transmitted pulse train. A single communication channel employs two frequencies to transmit an identity code as a signal validating and identification method and two frequencies to simultaneously transmit telemetry data.
    • 浅水中声学通信的调制/信号处理技术。 在频移键控的时间扩展版本中发送数字信息,其中第一频率的音调突发表示逻辑零,并且在第二频率处的音调突发表示逻辑1。 位之间存在漫长的安静时间,以允许多路径干扰衰减。 使用具有用于多普勒补偿的快速攻击/慢衰减电路的相对能量检测器来接收所发送的音调脉冲串,并且再现与传输的脉冲序列相当的数字数据序列。 单个通信信道采用两个频率来发送身份码作为信号验证和识别方法以及两个频率以同时发送遥测数据。