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    • 151. 发明授权
    • PFC-PWM controller having interleaved switching
    • PFC-PWM控制器具有交错切换
    • US06903536B2
    • 2005-06-07
    • US10712274
    • 2003-11-12
    • Ta-yung Yang
    • Ta-yung Yang
    • G05F1/40G05F1/44H02M1/00H02M1/42H02M3/00
    • H02M1/4225H02M2001/0032H02M2001/007Y02B70/126Y02B70/16Y02P80/112
    • The present invention discloses a PFC-PWM controller having interleaved switching. A PFC stage generates a PFC signal for switching a PFC boost converter of a power converter. A PWM stage generates a PWM signal for switching a DC-to-DC converter of the power converter. The PFC-PWM controller includes a power manager for generating a discharge current and a burst-signal. Under light-load conditions, the discharge current decreases in proportion to a load of the power converter. The burst signal is utilized to disable the PFC signal in a suspended condition for power saving. A pulse width of the pulse-signal ensures a dead time to spread switching signals, such as the PFC and PWM signals, and reduces switching noise. When the discharge current decreases, the pulse width of the pulse-signal will increase and a frequency of the pulse-signal will decrease correspondingly. This further reduces power consumption under light-load and zero-load conditions.
    • 本发明公开了一种具有交错切换的PFC-PWM控制器。 PFC级产生用于切换功率转换器的PFC升压转换器的PFC信号。 PWM级产生用于切换功率转换器的DC-DC转换器的PWM信号。 PFC-PWM控制器包括用于产生放电电流和突发信号的功率管理器。 在轻负载条件下,放电电流与功率转换器的负载成比例地下降。 脉冲串信号用于禁用处于暂停状态的PFC信号以节省功率。 脉冲信号的脉冲宽度确保了扩展切换信号(如PFC和PWM信号)的死区时间,并降低了开关噪声。 当放电电流减小时,脉冲信号的脉冲宽度将增加,脉冲信号的频率将相应减小。 这进一步降低了轻负载和零负载条件下的功耗。
    • 154. 发明授权
    • Sampling circuit for measuring the reflected voltage of transformer for power converter
    • 用于测量变压器反射电压的采样电路
    • US09337713B2
    • 2016-05-10
    • US13848102
    • 2013-03-21
    • SYSTEM GENERAL CORP.
    • Chin-Yen LinJung-Sheng ChenLi LinYue-Hong Tang
    • H02M3/335H02M1/08G01R31/40
    • H02M1/08G01R31/40H02M3/33523
    • A sampling circuit of the power converter according to the present invention comprises an amplifier circuit receiving a reflected voltage for generating a first signal. A first switch and a first capacitor are utilized to generate a second signal in response to the reflected voltage. A sample-signal circuit generates a sample signal in response to a falling edge of a switching signal. The switching signal is generated in accordance with a feedback signal for regulating an output of the power converter. The feedback signal is generated in accordance with the second signal. The sample signal is utilized to control the first switch for sampling the reflected voltage. The sample signal is disabled once the first signal is lower than the second signal. The sampling circuit precisely samples the reflected voltage of the transformer of the power converter for regulating the output of the power converter.
    • 根据本发明的功率转换器的采样电路包括接收用于产生第一信号的反射电压的放大器电路。 利用第一开关和第一电容器来响应于反射电压产生第二信号。 采样信号电路响应于开关信号的下降沿产生采样信号。 根据用于调节功率转换器的输出的反馈信号产生开关信号。 反馈信号根据第二信号产生。 采样信号用于控制第一个开关以对反射电压进行采样。 第一个信号低于第二个信号时,采样信号被禁止。 采样电路对功率转换器的变压器的反射电压进行精确采样,以调节功率转换器的输出。
    • 157. 发明申请
    • ADAPTIVE ACTIVE CLAMP OF FLYBACK POWER CONVERTER WITH HIGH EFFICIENCY FOR HEAVY LOAD AND LIGHT LOAD
    • 适用于重负荷和轻负载的高效飞轮功率转换器的自适应有源钳位
    • US20140233275A1
    • 2014-08-21
    • US14182442
    • 2014-02-18
    • System General Corp.
    • TA-YUNG YANGCHIH-HSIEN HSIEHKAI-FANG WEIJUNG-SHENG CHEN
    • H02M3/335
    • H02M3/33576H02M2001/0032Y02B70/16
    • A control circuit of a flyback power converter according to the present invention comprises a low-side transistor, an active-damper, a high-side drive circuit, and a controller. The low-side transistor is coupled to switch a transformer. The active-damper is coupled in parallel with the transformer. The high-side drive circuit is coupled to drive the active-clamper. The controller generates a switching signal and an active-clamp signal. The switching signal is coupled to drive the low-side transistor. The switching signal is generated in accordance with a feedback signal for regulating an output of the flyback power converter. The active-clamp signal is coupled to control the high-side drive circuit and the active-damper. The active-clamp signal is generated in response to a demagnetizing time of the transformer. The pulse number of the active-clamp signal is less than the pulse number of the switching signal in a light load condition.
    • 根据本发明的反激式功率转换器的控制电路包括低侧晶体管,主动阻尼器,高侧驱动电路和控制器。 低侧晶体管被耦合以切换变压器。 主动阻尼器与变压器并联。 高侧驱动电路被耦合以驱动主动钳位器。 控制器产生开关信号和有源钳位信号。 开关信号被耦合以驱动低侧晶体管。 根据用于调节反激式功率转换器的输出的反馈信号产生开关信号。 有源钳位信号被耦合以控制高侧驱动电路和主动阻尼器。 响应于变压器的消磁时间而产生有源钳位信号。 有源钳位信号的脉冲数小于轻负载条件下的开关信号的脉冲数。
    • 158. 发明授权
    • Control circuit with protection circuit for power supply
    • 具有电源保护电路的控制电路
    • US08780515B2
    • 2014-07-15
    • US13218650
    • 2011-08-26
    • Chia-Liang ChienRui-Hong Lu
    • Chia-Liang ChienRui-Hong Lu
    • H02H3/20H02H3/24H02H9/04
    • H02H7/12H02M1/32H02M3/33507
    • A control circuit with protection circuit for power supply according to the present invention comprises a peak-detection circuit and a protection circuit. The peak-detection circuit detects an AC input voltage and generates a peak-detection signal. The protection circuit comprises an over-voltage protection circuit. The over-voltage protection circuit generates an over-voltage protection signal in response to the peak-detection signal. The protection circuit generates a reset signal to reduce the output of the power supply in response to the over-voltage protection signal. The present invention can protect the power supply in response to the AC input voltage effectively through the peak-detection circuit.
    • 根据本发明的具有电源保护电路的控制电路包括峰值检测电路和保护电路。 峰值检测电路检测交流输入电压并产生峰值检测信号。 保护电路包括过电压保护电路。 过电压保护电路响应峰值检测信号产生过电压保护信号。 保护电路产生复位信号,以响应过电压保护信号减小电源的输出。 本发明可以通过峰值检测电路有效地响应于AC输入电压来保护电源。
    • 160. 发明授权
    • Successive approximation multiplier-divider for signal process and method for signal process
    • 用于信号处理的逐次逼近乘法器和信号处理方法
    • US08729930B2
    • 2014-05-20
    • US13666080
    • 2012-11-01
    • System General Corp.
    • Ta-Yung Yang
    • H03K25/00H03K23/00H03K21/00
    • H03M1/66
    • A multiplier-divider circuit for signal process according to the present invention comprises a digital-to-analog converter, a first counter, a second counter, an oscillation circuit, and a control-logic apparatus. The digital-to-analog converter generates an output signal of the multiplier-divider circuit in accordance with the value of an input signal and a first signal. The first counter generates the first signal in response to a clock signal and the duty cycle of the input signal. The second counter generates a second signal in response to the clock signal and the period of the input signal. The oscillation circuit generates the clock signal in accordance with a third signal. The control-logic apparatus generates the third signal in response to the second signal and a constant. The first signal is correlated to the duty cycle of the input signal. The second signal is correlated to the period of the input signal.
    • 根据本发明的用于信号处理的乘法器分频器电路包括数模转换器,第一计数器,第二计数器,振荡电路和控制逻辑器件。 数模转换器根据输入信号和第一信号的值产生乘法器 - 分频器电路的输出信号。 第一计数器响应于时钟信号和输入信号的占空比产生第一信号。 第二计数器响应于时钟信号和输入信号的周期产生第二信号。 振荡电路根据第三信号产生时钟信号。 控制逻辑装置响应于第二信号产生第三信号和常数。 第一个信号与输入信号的占空比相关。 第二信号与输入信号的周期相关。