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    • 141. 发明申请
    • DATA DRIVER
    • 数据驱动器
    • US20150356910A1
    • 2015-12-10
    • US14536025
    • 2014-11-07
    • SAMSUNG DISPLAY CO., LTD.
    • DONG-BEOM CHO
    • G09G3/20
    • G09G3/20G09G3/3275G09G2310/027G09G2310/0275G09G2310/0286G09G2310/0289G09G2310/0291G09G2310/0297
    • A data driver includes first through n-th shift register units, first through n-th latch units, and first through n-th output buffer units. The first through n-th shift register units shift and store a plurality of image output from a timing controller. The first shift register unit includes first through m-th shift registers. The first through m-th shift registers shift and store first through m-th image data among the plurality of image data. The first through n-th latch units are connected to the first through n-th shift register units, respectively. The first latch unit includes first through m-th latches. The first through n-th output buffer units are connected to the first through n-th latch units, respectively. The first output buffer unit includes first through m-th output buffers. The first through n-th latch units sequentially latch the plurality of image data stored in the first through n-th shift register units.
    • 数据驱动器包括第一至第n移位寄存器单元,第一至第n锁存单元和第一至第n输出缓冲单元。 第一至第n移位寄存器单元移位并存储从定时控制器输出的多个图像。 第一移位寄存器单元包括第一至第m移位寄存器。 第一至第m移位寄存器在多个图像数据之间移位并存储第一至第m图像数据。 第一到第n个锁存单元分别连接到第一到第n移位寄存器单元。 第一锁存单元包括第一至第m锁存器。 第一至第n输出缓冲单元分别连接到第一至第n个锁存单元。 第一输出缓冲器单元包括第一至第m输出缓冲器。 第一到第n个锁存单元顺序地锁存存储在第一到第n移位寄存器单元中的多个图像数据。
    • 144. 发明授权
    • Display device and method of driving the same
    • 显示装置及其驱动方法
    • US09153176B2
    • 2015-10-06
    • US14026629
    • 2013-09-13
    • Samsung Display Co., Ltd.
    • Bong-Ju JunWeon-Jun Choe
    • G09G3/32
    • G09G3/3275G09G3/20G09G3/2096G09G3/3208G09G2320/0233G09G2320/0271G09G2320/046G09G2320/06G09G2330/021G09G2360/16
    • A display unit including pixels which display an image according to an image data signal transferred corresponding to each of the pixels, and a controller to receive and convert an external input video signal to transfer a luminance conversion data signal corresponding to the respective pixels. The controller includes: an input image data to receive the external input video signal; a scale factor calculation unit to determine at least one control factor for luminance conversion with respect to an input video signal corresponding to the pixels received from the input image data receiving unit; and a luminance data conversion unit to convert luminance data with respect to the respective pixels using the at least one determined control factor and to output the luminance conversion data signal.
    • 一种显示单元,包括根据与每个像素相对应地传送的图像数据信号显示图像的像素,以及控制器,用于接收和转换外部输入视频信号以传送与各个像素对应的亮度转换数据信号。 控制器包括:用于接收外部输入视频信号的输入图像数据; 比例因子计算单元,用于根据与从输入图像数据接收单元接收到的像素相对应的输入视频信号来确定亮度转换的至少一个控制因素; 以及亮度数据转换单元,用于使用所述至少一个确定的控制因子来转换相对于各个像素的亮度数据,并输出亮度转换数据信号。
    • 147. 发明申请
    • DISPLAY DRIVER
    • 显示驱动器
    • US20150221274A1
    • 2015-08-06
    • US14609916
    • 2015-01-30
    • LAPIS SEMICONDUCTOR CO., LTD.
    • Hiroaki ISHII
    • G09G3/36
    • G09G3/3677G09G3/3275G09G3/3685G09G2310/0272G09G2310/0286G09G2310/08G09G2320/0233G09G2352/00
    • First to N-th latches capture N pieces of pixel data indicative of the luminance levels of respective pixels in synchronization with first to N-th capture clock signals each having different edge timing. Voltages corresponding to the pieces of pixel data output from the first to N-th latches are applied to each of the data lines of the display device. In this case, first to N-th flip-flops formed in an N-stage shift register capture a single pulse load signal which is synchronized with a horizontal synchronizing signal in a video signal while sequentially shifting the load signal to subsequent stages in synchronization with a reference timing signal supplied from the outside. Outputs of the first to N-th flip-flops in the N-stage shift register are supplied as first to N-th capture clock signals, to the first to N-th latches, respectively.
    • 第一到第N个锁存器与每个具有不同边缘定时的第一至第N捕获时钟信号同步捕获表示各个像素的亮度级的N个像素数据。 对应于从第一至第N锁存器输出的像素数据的电压被施加到显示装置的每条数据线。 在这种情况下,形成在N级移位寄存器中的第一至第N触发器捕获与视频信号中的水平同步信号同步的单脉冲负载信号,同时依次将负载信号移位到后续级,与 从外部提供的基准定时信号。 N级移位寄存器中的第一至第N触发器的输出分别作为第一到第N捕获时钟信号提供给第一至第N个锁存器。
    • 148. 发明申请
    • DISPLAY PANEL AND DEMULTIPLEXER CIRCUIT THEREOF
    • 显示面板及其解复用器电路
    • US20150213753A1
    • 2015-07-30
    • US14337235
    • 2014-07-22
    • Au Optronics Corporation
    • Chen-Chi LinChih-Hsiang Chang
    • G09G3/20
    • G09G3/2096G09G3/3275G09G3/3685G09G2310/0213G09G2310/0297G09G2320/043
    • A display panel and a demultiplexer circuit are provided. The demultiplexer circuit includes a first to a Pth switch units. The first to the Pth switch units are coupled to a first to a Pth data lines of a display panel respectively and collectively receive a data voltage and turn on sequentially in sequence to provide the data voltage to corresponding data lines. A period of the first to the Pth switch units provide the data voltage to the first to the P data lines sequentially which is defined to a data transmission period. When the switch unit is turned on, N transistors are turned on simultaneously according to a plurality of control signals. When the switch unit is turned off, at least one of the N transistors is turned off according to a corresponding control signal.
    • 提供显示面板和解复用器电路。 解复用器电路包括第一至第P开关单元。 第一至第P开关单元分别耦合到显示面板的第一至第P数据线,并且共同接收数据电压并依次顺序地接通以将数据电压提供给对应的数据线。 第一至第P开关单元的周期将数据电压顺序地提供给定义为数据传输周期的P数据线。 当开关单元接通时,根据多个控制信号,N个晶体管同时导通。 当开关单元关闭时,N个晶体管中的至少一个根据相应的控制信号而断开。