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141. 发明授权

US09455644B2 Method and apparatus for changing a frequency of a switch prior to a level of current received from an inductor decreasing to a predetermined level 有权
标题翻译：在从电感器接收到的电流电平下降到预定电平之前改变开关频率的方法和装置
公开(公告)号：US09455644B2
公开(公告)日：2016-09-27
申请号：US14224398
申请日：2014-03-25
申请人： Marvell World Trade LTD.
发明人： Sehat Sutardja , Jianqing Lin
IPC分类号： H02M3/156 , H02M1/42 , G05F1/70 , H02M7/217
CPC分类号： H02M7/217 , G05F1/70 , H02M1/4225 , Y02B70/126
摘要： A controller including a switch, a first module, a second module, and a control module. The switch receives current from an inductor and bypasses a portion of the current from being received by a load. The switch is cycled between a first state and a second state at a frequency. The first module, for a first cycle of the switch, determines a first amount of time the switch is in the first state. The second module, based on the first amount of time, determines a second amount of time for a level of the current to decrease to a predetermined level. The second amount of time begins during the first cycle and when the switch transitions from the first state to the second state. The control module, based on the second amount of time and prior to the current decreasing to the predetermined level, changes the frequency of the switch.
摘要翻译：一种控制器，包括开关，第一模块，第二模块和控制模块。开关从电感器接收电流，并绕过电流的一部分被负载接收。开关以频率在第一状态和第二状态之间循环。第一模块，用于开关的第一周期，确定开关处于第一状态的第一时间量。第二模块基于第一时间量确定电流电平降低到预定电平的第二时间量。第二时间量在第一周期开始，并且当开关从第一状态转变到第二状态时。控制模块基于第二时间量并且在当前减小到预定水平之前改变开关的频率。

142. 发明授权

US09451569B1 Systems and methods for detecting a primary synchronization signal in a wireless communication system 有权
标题翻译：用于在无线通信系统中检测主同步信号的系统和方法
公开(公告)号：US09451569B1
公开(公告)日：2016-09-20
申请号：US14022739
申请日：2013-09-10
申请人： Marvell International Ltd.
发明人： Chusong Xiao , Qing Zhao , Manyuan Shen , Leilei Song , Hui-Ling Lou
IPC分类号： H04W56/00 , H04J11/00
CPC分类号： H04W56/001 , H04J11/0073 , H04J11/0076
摘要： Systems and methods are provided for detecting a received synchronization signal. The method includes receiving, at a receiver, a signal from a transmitter and the signal includes the received synchronization signal. The method includes processing the received signal and a plurality of candidate synchronization signals to obtain a plurality of correlation signals. Each candidate synchronization signal is associated with one of the plurality of correlation signals. The method includes selecting, based at least in part on the plurality of correlation signals, one of the plurality of candidate synchronization signals. The selected candidate synchronization signal is correlated with the received synchronization signal. The method includes detecting the received synchronization signal based at least in part on (i) the received signal, and (ii) a characteristic obtained from the correlation signal that is associated with the selected candidate synchronization signal.
摘要翻译：提供了用于检测所接收的同步信号的系统和方法。该方法包括在接收机处接收来自发射机的信号，该信号包括所接收的同步信号。该方法包括处理接收信号和多个候选同步信号以获得多个相关信号。每个候选同步信号与多个相关信号之一相关联。所述方法包括至少部分地基于所述多个相关信号来选择所述多个候选同步信号中的一个。所选择的候选同步信号与所接收的同步信号相关。该方法至少部分地基于（i）接收信号检测接收到的同步信号，以及（ii）从与所选候选同步信号相关联的相关信号获得的特性。

143. 发明授权

US09451057B1 Communication system and encoding method having low overhead 有权
标题翻译：具有低开销的通信系统和编码方法
公开(公告)号：US09451057B1
公开(公告)日：2016-09-20
申请号：US13925605
申请日：2013-06-24
申请人： Marvell International Ltd.
发明人： Brett A. McClellan
IPC分类号： H04L29/06 , H04J3/06 , H04J3/16
CPC分类号： H04L69/22 , H04J3/06 , H04J3/0602 , H04J3/1617 , H04J3/1658 , H04L1/0041 , H04L25/03057
摘要： In a method for coding a packet of information words into a frame for transmission, blocks of input data are received, the input data including control words and the packet of information words, the packet having (a) a start preceded by ones of the control words and (b) an ending followed by others of the control words, the blocks being smaller than the packet. When the block consists exclusively of information words, a one bit block header having a first sense is appended to the block to form the frame. When the block does not consist exclusively of information words: the block is condensed to accommodate a TYPE word, the TYPE word is inserted into the block, and a one bit block header having a second sense, opposite to the first sense, is appended to the block to form the frame.
摘要翻译：在将信息包的分组编码为用于发送的帧的方法中，接收输入数据的块，所述输入数据包括控制字和信息字的分组，所述分组具有（a）开始前面的控制字和（b）后面跟着其他控制字的结尾，这些块小于数据包。当该块仅由信息字组成时，具有第一感测的一位块头被附加到该块以形成该帧。当该块不仅仅由信息字组成时：该块被压缩以容纳一个TYPE字，该TYPE字被插入到该块中，并且具有与第一感测相反的第二感测的一位块标题被附加到块形成框架。

144. 发明授权

US09450660B1 Methods and apparatus for directing a beam towards a device in the presence of interference 有权
公开(公告)号：US09450660B1
公开(公告)日：2016-09-20
申请号：US14671661
申请日：2015-03-27
申请人： Marvell International Ltd.
发明人： Jungwon Lee , Hui-Ling Lou
IPC分类号： H04M1/00 , H04B7/06
CPC分类号： H04B7/0617 , H04B7/0626 , H04L25/0204 , H04L25/021 , H04L25/0244 , H04W16/28 , H04W72/046 , H04W72/082
摘要： Methods and apparatus are provided for directing a beam towards a receiving device in the presence of interference. A beam transmitted by a transmission source is received by a received device. The beam shape is affected by signals transmitted by interfering sources. The receiving device computes channel estimates associated with the transmission source and the interfering sources. A feedback signal that represents the channel estimates associated with the transmission and interfering sources is transmitted to the transmission source. The transmission source changes characteristics of the beam to compensate for the interference caused by the interfering sources. The transmission source may change the characteristics of the beam by performing precoding algorithms.

145. 发明授权

US09445219B1 Multi-level piconet data aggregation 有权
标题翻译：多级微微网数据聚合
公开(公告)号：US09445219B1
公开(公告)日：2016-09-13
申请号：US13908546
申请日：2013-06-03
申请人： MARVELL INTERNATIONAL LTD.
发明人： Sameer Bidichandani , Timothy J. Donovan , Deepack Jain , Li-Fu Jeng , Robert Mack , Neeta Srivastav , Shuangqing Yuan
IPC分类号： H04W4/00
CPC分类号： H04W4/008 , A63F13/235 , A63F2300/1031 , A63F2300/403 , H04W4/80
摘要： An example embodiment includes an apparatus. The apparatus includes piconet logic for establishing a multi-level piconet hierarchy having a top level piconet and a lower level piconet(s). The top level piconet includes a master device and master controller(s). The lower level piconet includes master controllers(s) and sub-controller(s). The apparatus includes time division multiplexing logic to solicit and control aggregated communication with master controllers. The aggregated communication comprises data from the master controller and data from a sub-controller(s).
摘要翻译：示例实施例包括一种装置。该装置包括用于建立具有顶级微微网和较低级微微网的多级微微网层级的微微网逻辑。顶级微微网包括主设备和主控制器。下层微微网包括主控制器和子控制器。该装置包括时分复用逻辑，用于请求和控制与主控制器的聚合通信。聚合通信包括来自主控制器的数据和来自子控制器的数据。

146. 发明授权

US09438820B1 Systems and methods for processing composite video signals 有权
标题翻译：用于处理复合视频信号的系统和方法
公开(公告)号：US09438820B1
公开(公告)日：2016-09-06
申请号：US14613638
申请日：2015-02-04
申请人： Marvell International Ltd.
发明人： Yichen Liu , Hongyu Zhang , Wei Zheng , Yanwei Ji
IPC分类号： H04L7/00 , H04N5/265 , H04N5/04
CPC分类号： H04N5/06
摘要： System and methods are provided for processing composite video signals. The system includes: a clock synthesizer configured to generate a line lock clock signal; an interpolation unit configured to generate source data associated with a source composite video signal, the source composite video signal being related to a source clock signal; a buffer unit configured to store the source data based at least in part on the source clock signal and provide destination data based at least in part on the line lock clock signal; a signal processing unit configured to process the destination data to extract a synchronization component and determine a phase error between the synchronization component and the line lock clock signal. The clock synthesizer is further configured to adjust the line lock clock signal based at least in part on the phase error.
摘要翻译：提供了用于处理复合视频信号的系统和方法。该系统包括：时钟合成器，被配置为产生线路锁定时钟信号; 内插单元，被配置为生成与源复合视频信号相关联的源数据，源复合视频信号与源时钟信号相关; 缓冲单元，被配置为至少部分地基于源时钟信号来存储源数据，并且至少部分地基于线锁定时钟信号提供目的地数据; 信号处理单元，被配置为处理目的地数据以提取同步分量，并确定同步分量和线路锁定时钟信号之间的相位误差。时钟合成器还被配置为至少部分地基于相位误差来调整线路锁定时钟信号。

147. 发明授权

US09437212B1 Systems and methods for suppressing noise in an audio signal for subbands in a frequency domain based on a closed-form solution 有权
标题翻译：基于闭合形式的解决方案，用于抑制频域中的子带的音频信号中的噪声的系统和方法
公开(公告)号：US09437212B1
公开(公告)日：2016-09-06
申请号：US14546552
申请日：2014-11-18
申请人： Marvell International Ltd.
发明人： Kapil Jain
IPC分类号： G10L21/02 , G10L21/0216 , G10L21/0232 , G10L21/0208
CPC分类号： G10L21/0208 , G10L21/0232
摘要： Systems and methods for reducing noise from an input signal are provided. An input signal is received. The input signal is transformed from a time domain to a plurality of subbands in a frequency domain, where each subband of the plurality of subbands includes a speech component and a noise component. For each of the subbands, an amplitude of the speech component is estimated based on an amplitude of the subband and an estimate of at least one signal-to-noise ratio (SNR) of the subband. The estimating of the amplitude of the speech component is based on a closed-form solution. The plurality of subbands in the frequency domain are filtered based on the amplitudes of the speech components.
摘要翻译：提供了用于降低输入信号噪声的系统和方法。接收输入信号。输入信号从时域变换到频域中的多个子带，其中多个子带中的每个子带包括语音分量和噪声分量。对于每个子带，基于子带的幅度和子带的至少一个信噪比（SNR）的估计来估计语音分量的幅度。语音分量的振幅估计是基于闭合形式的解决方案。基于语音分量的幅度对频域中的多个子带进行滤波。

148. 发明授权

US09436210B1 Control—mechanism for selectively shorting clock grid by electrically connecting and disconnecting clock branches once per clock cycle 有权
标题翻译：通过每个时钟周期一次电连接和断开时钟分支来选择性地短路时钟网格的控制机制
公开(公告)号：US09436210B1
公开(公告)日：2016-09-06
申请号：US14093587
申请日：2013-12-02
申请人： MARVELL INTERNATIONAL LTD.
发明人： Kim Schuttenberg , Franco Ricci
IPC分类号： G06F1/04 , G06F1/24 , G06F11/00 , G06F1/10
CPC分类号： G06F1/10
摘要： Systems, methods, and other embodiments are described that are associated with selective shorting of clock branches. In one embodiment, an apparatus includes a selective shorting device connected between a first clock branch that conducts a slow clock signal having a first frequency and a second clock branch that conducts a fast clock signal having a second frequency that is an integer multiple of the first frequency. The selective shorting device is configured to electrically connect and disconnect the first clock branch and the second clock branch. The selective shorting control mechanism is configured to control the selective shorting device to electrically connect the clock branches during a controlling portion of the slow clock signal.
摘要翻译：描述与时钟分支的选择性短路相关联的系统，方法和其他实施例。在一个实施例中，一种装置包括连接在第一时钟分支之间的选择性短路装置，所述第一时钟支路传导具有第一频率的慢时钟信号和第二时钟分支，所述第二时钟分支导通具有第二频率的第二频率，该第二频率是第一频率。选择性短路装置被配置为电连接和断开第一时钟分支和第二时钟分支。选择性短路控制机构被配置为在慢时钟信号的控制部分期间控制选择性短路装置电连接时钟分支。

149. 发明授权

US09432276B1 Systems and methods for compensating a channel estimate for phase and sampling phase jitter 有权
标题翻译：用于补偿相位和采样相位抖动的信道估计的系统和方法
公开(公告)号：US09432276B1
公开(公告)日：2016-08-30
申请号：US14927982
申请日：2015-10-30
申请人： Marvell International Ltd.
发明人： Ravi Narasimhan
IPC分类号： H04L27/26 , H04L7/00 , H04L12/26
CPC分类号： H04L43/087 , H03L7/091 , H04L7/0016 , H04L25/0224 , H04L25/024 , H04L27/2602 , H04L27/2656 , H04L27/2657 , H04L27/2675
摘要： A system including a circuit to compensate for sampling phase jitter. The system includes a channel estimator to determine, based on training symbols in a preamble of a data packet received via a communication channel, an estimate of the communication channel and a carrier frequency associated with the communication channel. The circuit compensates, based on the determined carrier frequency, a phase of the estimate of the communication channel to adjust for a carrier frequency offset associated with the communication channel, and, based on a data rate at which the data packet was received via the communication channel, selectively compensates the estimate of the communication channel for sampling phase jitter.
摘要翻译：一种包括补偿采样相位抖动的电路的系统。该系统包括信道估计器，用于基于经由通信信道接收的数据分组的前导码中的训练符号来确定通信信道的估计和与通信信道相关联的载波频率。该电路基于所确定的载波频率补偿通信信道的估计的相位，以调整与通信信道相关联的载波频率偏移，并且基于通过通信接收数据分组的数据速率通道，有选择地补偿用于采样相位抖动的通信信道的估计。

150. 发明授权

US09432057B1 Forward error correcting code encoder and decoder method and apparatus 有权
标题翻译：前向纠错码编码器及解码方法及装置
公开(公告)号：US09432057B1
公开(公告)日：2016-08-30
申请号：US14140125
申请日：2013-12-24
申请人： MARVELL INTERNATIONAL LTD.
发明人： Weishi Feng
IPC分类号： H03M13/00 , H03M13/15 , H03M13/03 , H03M13/05 , H03M13/29
CPC分类号： H03M13/151 , H03M13/1515 , H03M13/158 , H03M13/611 , H03M13/6502 , H03M13/6561
摘要： A method includes generating a first subset of codeword symbols by processing, during each of a plurality of iterations, a first input and a second input. The first input is a function of (i) an output, during a respective one of the plurality of iterations, of a last processing stage of a first plurality of processing stages and (ii) a symbol, of a first subset of original symbols, corresponding to the respective iteration. The second input is a function of (i) an output, during the respective iteration, of a last processing stage of the second plurality of processing stages and (ii) a symbol, of a second subset of original symbols, corresponding to the respective iteration. The method also includes generating a second subset of codeword symbols by processing, during each of the plurality of iterations, the first input and the second input.
摘要翻译：一种方法包括通过在多个迭代中的每一个期间处理第一输入和第二输入来生成码字符号的第一子集。第一输入是（i）在多个迭代中的相应一个迭代期间，在第一多个处理阶段的最后一个处理阶段和（ii）原始符号的第一子集的符号的输出，对应于各自的迭代。第二输入是（i）在相应迭代期间在第二多个处理阶段的最后处理阶段的输出和（ii）对应于相应迭代的原始符号的第二子集的符号的函数。该方法还包括通过在多个迭代中的每一个期间处理第一输入和第二输入来生成码字符号的第二子集。

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