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    • 136. 发明授权
    • Data strobe synchronization circuit and method for double data rate, multi-bit writes
    • 数据选通同步电路和方法,用于双倍数据速率,多位写入
    • US07561477B2
    • 2009-07-14
    • US12077878
    • 2008-03-20
    • Christopher K. MorzanoWen Li
    • Christopher K. MorzanoWen Li
    • G11C7/10G11C8/00
    • G11C7/22G11C7/1066G11C7/1078G11C7/1087G11C7/1093G11C11/4076G11C11/4094
    • A data strobe synchronization circuit includes first and second logic circuits receiving global data strobe pulses and respective enable signal. A control circuit initially applies an enable signal to the first logic circuit so that the first logic circuit generates a first data strobe pulse responsive to each global data strobe pulse. The control circuit receives a write control signal. When the write control signal becomes active, the control circuit terminates the enable signal applied to the first logic circuit and applies an enable signal to the second logic circuit. The second logic circuit then generates a second data strobe pulse responsive to the next global data strobe pulse. The first and second data strobe pulses are used to latch a data signal in respective flip-flops. The data strobe pulses may latch the data signal in pairs of flip-flops on the leading and trailing edges of the data strobe pulses.
    • 数据选通同步电路包括接收全局数据选通脉冲的第一和第二逻辑电路和相应的使能信号。 控制电路首先向第一逻辑电路施加使能信号,使得第一逻辑电路响应于每个全局数据选通脉冲产生第一数据选通脉冲。 控制电路接收写入控制信号。 当写入控制信号变为有效时,控制电路终止施加到第一逻辑电路的使能信号并向第二逻辑电路施加使能信号。 然后,第二逻辑电路响应于下一个全局数据选通脉冲产生第二数据选通脉冲。 第一和第二数据选通脉冲用于锁存相应触发器中的数据信号。 数据选通脉冲可以在数据选通脉冲的前沿和后沿成对的触发器锁存数据信号。
    • 138. 发明授权
    • Subpixel routing and processing for an imaging system or the like
    • 用于成像系统等的子像素路由和处理
    • US07488945B2
    • 2009-02-10
    • US11291273
    • 2005-11-30
    • Wen LiJohn Eric TkaczykYanfeng DuJames Leblanc
    • Wen LiJohn Eric TkaczykYanfeng DuJames Leblanc
    • G01T1/24
    • H01L27/14603G01T1/2928H01L27/14659
    • Count rates may be obtained from one or more subpixels for a given pixel in an imaging system detector. Count rates may be obtained from individual subpixels, or may be from electronically binned subpixels at least in part in various subpixel arrangements where a selected subpixel arrangement may be adaptively set according to a detected count rate. For lower count rates, two or more subpixels may be electronically binned together and the counts may be obtained from the binned subpixels, for example to mitigate a charge sharing effect. For higher count rates, the count rates of a greater number of subpixels may be individually obtained, for example to mitigate a pulse pile-up effect. Detective quantum efficiency may be optimized over a wider range of photon flux rate via the adaptive subpixel arrangement.
    • 可以从成像系统检测器中的给定像素的一个或多个子像素获得计数率。 可以从各个子像素获得计数速率,或者可以至少部分地根据检测到的计数速率自适应地选择所选择的子像素排列的各种子像素排列从电子分组的子像素获得。 对于较低的计数率,可以将两个或更多个子像素电子地分组在一起,并且可以从二进制子像素获得计数,例如以减轻电荷共享效应。 对于更高的计数率,可以单独获得更多数量的子像素的计数率,例如以减轻脉冲堆积效应。 可以通过自适应子像素排列在更宽的光子通量速率范围内优化探测量子效率。