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131. 发明申请

US20150305329A1 Formulations Containing Paraffinic Oil and Anti-Settling Agent 审中-公开
标题翻译：含有石蜡油和抗沉降剂的制剂
公开(公告)号：US20150305329A1
公开(公告)日：2015-10-29
申请号：US14405644
申请日：2012-06-29
申请人： Michael Fefer , Jun Liu
发明人： Michael Fefer , Jun Liu
IPC分类号： A01N27/00 , A01N25/04 , A01N25/30 , A01N43/653
CPC分类号： A01N27/00 , A01N25/04 , A01N25/08 , A01N25/30 , A01N43/653 , A01N61/02
摘要： The present invention features a composition comprising a paraffinic oil, an emulsifier, a pigment, a silicone surfactant and an anti-settling agent. The present invention also features a method of controlling a disease, condition or injury caused by a pest of a plant, the method comprising applying to the plant the composition defined above. A method of making the composition is also disclosed.
摘要翻译：本发明的特征在于包含石蜡油，乳化剂，颜料，硅氧烷表面活性剂和抗沉降剂的组合物。本发明还涉及一种控制由植物害虫引起的疾病，病症或损伤的方法，该方法包括向植物施用上述定义的组合物。还公开了制备该组合物的方法。

132. 发明授权

US09111788B2 Memory device constructions, memory cell forming methods, and semiconductor construction forming methods 有权
标题翻译：存储器件结构，存储单元形成方法和半导体构造形成方法
公开(公告)号：US09111788B2
公开(公告)日：2015-08-18
申请号：US13418082
申请日：2012-03-12
申请人： Jun Liu
发明人： Jun Liu
IPC分类号： H01L45/00 , H01L27/102 , G11C13/00 , H01L27/24 , H01L29/872
CPC分类号： H01L45/1608 , G11C13/003 , G11C2213/72 , H01L27/1021 , H01L27/24 , H01L27/2409 , H01L27/2463 , H01L29/6609 , H01L29/872
摘要： Memory device constructions include a first column line extending parallel to a second column line, the first column line being above the second column line; a row line above the second column line and extending perpendicular to the first column line and the second column line; memory material disposed to be selectively and reversibly configured in one of two or more different resistive states; a first diode configured to conduct a first current between the first column line and the row line via the memory material; and a second diode configured to conduct a second current between the second column line and the row line via the memory material. In some embodiments, the first diode is a Schottky diode having a semiconductor anode and a metal cathode and the second diode is a Schottky diode having a metal anode and a semiconductor cathode.
摘要翻译：存储器件结构包括平行于第二列线延伸的第一列线，第一列线在第二列线之上; 在第二列线上方的行线，并垂直于第一列线和第二列线延伸; 存储器材料，其设置成选择性地和可逆地配置为两种或更多种不同电阻状态之一; 第一二极管，被配置为经由所述存储材料在所述第一列线和所述行线之间传导第一电流; 以及第二二极管，被配置为经由存储器材料在第二列线和行线之间传导第二电流。在一些实施例中，第一二极管是具有半导体阳极和金属阴极的肖特基二极管，第二二极管是具有金属阳极和半导体阴极的肖特基二极管。

133. 发明授权

US09068118B2 Luminescent material of gallium indium oxide and preparation method thereof 有权
标题翻译：镓铟氧化物的发光材料及其制备方法
公开(公告)号：US09068118B2
公开(公告)日：2015-06-30
申请号：US13881161
申请日：2010-12-20
申请人： Mingjie Zhou , Jun Liu , Wenbo Ma
发明人： Mingjie Zhou , Jun Liu , Wenbo Ma
IPC分类号： C09K11/08 , C09K11/02 , C09K11/87 , C09K11/62
CPC分类号： C09K11/873 , C09K11/621
摘要： A luminescent material of gallium indium oxide and preparation method thereof are provided. The luminescent material of gallium indium oxide has a chemical formula of GaInO3:zM, wherein, M is the metal nano-particle which is selected from one or two of Ag, Au, Pt and Pd, and z meets the condition of 1×10−5≦z≦0.02. The method for preparing the luminescent material comprises the following steps: (1) preparing the mixed solution containing indium ion and gallium ion; (2) adding chelator and crosslinking agent into the mixed solution to obtain a chelate solution; (3) adding M nano-particles sol which is surface treated into the chelate solution, heating by water-bath and stirring, drying to obtain the precursor of the luminescent material; (4) preheating the precursor, cooling, grinding, calcining, then cooling and grinding again to obtain the luminescent material.
摘要翻译：提供了一种铟镓铟的发光材料及其制备方法。镓铟氧化物的发光材料具有GaInO 3：zM的化学式，其中M是选自Ag，Au，Pt和Pd中的一种或两种的金属纳米颗粒，z满足1×10 -5＆nlE; z＆nlE; 0.02。制备发光材料的方法包括以下步骤：（1）制备含有铟离子和镓离子的混合溶液; （2）向混合溶液中加入螯合剂和交联剂，得到螯合溶液; （3）将表面处理的M纳米颗粒溶胶加入到螯合溶液中，通过水浴加热搅拌，干燥得到发光材料的前体; （4）预热前体，冷却，研磨，煅烧，然后再次冷却和研磨，得到发光材料。

134. 发明授权

US09054681B2 High speed duty cycle correction and double to single ended conversion circuit for PLL 有权
标题翻译： PLL的高速占空比校正和双端到单端转换电路
公开(公告)号：US09054681B2
公开(公告)日：2015-06-09
申请号：US13522745
申请日：2011-08-23
申请人： Youhua Wang , Junan Zhang , Dongbing Fu , Gangyi Hu , Jun Liu , Ruzhang Li , Guangbing Chen
发明人： Youhua Wang , Junan Zhang , Dongbing Fu , Gangyi Hu , Jun Liu , Ruzhang Li , Guangbing Chen
IPC分类号： H03K3/017 , H03K5/04 , H03K7/08 , H03K5/06 , H03K5/156
CPC分类号： H03K5/06 , H03K5/1565
摘要： The present invention pertains to a high speed duty cycle correction and double to single ended conversion circuit for PLL, comprising a reshaper stage, a single-edge detection circuit and a duty cycle restorer. The present invention introduces a way to convert double-ended output of PLL VCO into single-ended signal and adjust duty cycle of PLL VCO's output waveform by 50%, so that the circuit can output single ended clock signal with 50% duty cycle.
摘要翻译：本发明涉及一种用于PLL的高速占空比校正和双端到单端转换电路，包括一个整容级，单边缘检测电路和占空比恢复器。本发明引入了将PLL VCO的双端输出转换为单端信号并将PLL VCO的输出波形的占空比调整50％的方法，使得电路可以输出50％占空比的单端时钟信号。

135. 发明授权

US09023529B2 Nanomaterials for sodium-ion batteries 有权
标题翻译：纳米材料用于钠离子电池
公开(公告)号：US09023529B2
公开(公告)日：2015-05-05
申请号：US13474963
申请日：2012-05-18
申请人： Jun Liu , Yuliang Cao , Lifen Xiao , Zhenguo Yang , Wei Wang , Daiwon Choi , Zimin Nie
发明人： Jun Liu , Yuliang Cao , Lifen Xiao , Zhenguo Yang , Wei Wang , Daiwon Choi , Zimin Nie
IPC分类号： H01M4/50 , H01M4/48 , H01M14/00 , H01M4/505 , H01M4/131 , H01M10/054
CPC分类号： H01M4/505 , H01M4/131 , H01M4/50 , H01M10/054 , H01M14/00 , Y02E60/122 , Y10T428/298
摘要： A crystalline nanowire and method of making a crystalline nanowire are disclosed. The method includes dissolving a first nitrate salt and a second nitrate salt in an acrylic acid aqueous solution. An initiator is added to the solution, which is then heated to form polyacrylatyes. The polyacrylates are dried and calcined. The nanowires show high reversible capacity, enhanced cycleability, and promising rate capability for a battery or capacitor.
摘要翻译：公开了晶体纳米线和制造结晶纳米线的方法。该方法包括将第一硝酸盐和第二硝酸盐溶解在丙烯酸水溶液中。向溶液中加入引发剂，然后将其加热形成聚丙烯酰胺。将聚丙烯酸酯干燥并煅烧。纳米线显示出高可逆容量，增强的循环性，以及电池或电容器的有前途的速率能力。

136. 发明授权

US08976562B2 Resistive memory architectures with multiple memory cells per access device 有权
标题翻译：每个访问设备具有多个存储单元的电阻式存储架构
公开(公告)号：US08976562B2
公开(公告)日：2015-03-10
申请号：US13292884
申请日：2011-11-09
申请人： Jun Liu , Mike Violette
发明人： Jun Liu , Mike Violette
IPC分类号： G11C5/06 , G11C13/00 , H01L27/24 , H01L45/00
CPC分类号： H01L45/1253 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/003 , G11C2213/72 , G11C2213/74 , G11C2213/76 , G11C2213/78 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2472 , H01L27/2481 , H01L45/06 , H01L45/1233 , H01L45/144
摘要： A resistive memory structure, for example, phase change memory structure, includes one access device and two or more resistive memory cells. Each memory cell is coupled to a rectifying device to prevent parallel leak current from flowing through non-selected memory cells. In an array of resistive memory bit structures, resistive memory cells from different memory bit structures are stacked and share rectifying devices.
摘要翻译：电阻式存储器结构，例如相变存储器结构，包括一个存取器件和两个或更多个电阻存储器单元。每个存储单元耦合到整流装置，以防止并行漏电流流过未选择的存储单元。在电阻存储器位结构的阵列中，来自不同存储器位结构的电阻存储器单元被堆叠并共享整流器件。

137. 发明授权

US08932487B2 Strontium cerate luminescent material and the preparation method and application thereof 有权
标题翻译：铈锶发光材料及其制备方法及应用
公开(公告)号：US08932487B2
公开(公告)日：2015-01-13
申请号：US13702134
申请日：2010-06-17
申请人： Mingjie Zhou , Jun Liu , Wenbo Ma
发明人： Mingjie Zhou , Jun Liu , Wenbo Ma
IPC分类号： C09K11/02 , C09K11/08 , C09K11/77 , C09K11/87 , B82Y40/00
CPC分类号： C09K11/873 , B82Y40/00 , C09K11/7718 , C09K11/87 , Y10S977/773 , Y10S977/896
摘要： Disclosed is a strontium cerate luminescent material having a chemical formula of Sr2CeO4:xM and comprising the luminescent material Sr2CeO4 and metal nanoparticle M, and the preparation method thereof, where M is at least one of Ag, Au, Pt and Pd, and x is a molar ratio of M to the luminescent material Sr2CeO4 and 0
摘要翻译：公开了具有化学式Sr2CeO4：xM并且包含发光材料Sr2CeO4和金属纳米颗粒M的锶铈化物发光材料及其制备方法，其中M是Ag，Au，Pt和Pd中的至少一种，x是 M与发光材料Sr2CeO4的摩尔比为0

138. 发明授权

US08921170B1 Integrated circuits with asymmetric pass transistors 有权
标题翻译：具有不对称传输晶体管的集成电路
公开(公告)号：US08921170B1
公开(公告)日：2014-12-30
申请号：US13408959
申请日：2012-02-29
申请人： Jun Liu , Albert Ratnakumar , Mark T. Chan , Irfan Rahim
发明人： Jun Liu , Albert Ratnakumar , Mark T. Chan , Irfan Rahim
IPC分类号： H01L21/338
CPC分类号： H01L21/823418 , H01L21/324 , H01L21/823814 , H01L27/082 , H01L27/088 , H01L29/1083 , H01L29/6653 , H01L29/66659
摘要： Asymmetric transistors such as asymmetric pass transistors may be formed on an integrated circuit. The asymmetric transistors may have gate structures. Symmetric pocket implants may be formed in source-drains on opposing sides of each transistor gate structure. Selective heating may be used to asymmetrically diffuse the implants. Selective heating may be implemented by patterning the gate structures on a semiconductor substrate so that the spacing between adjacent gate structures varies. A given gate structure may be located between first and second adjacent gate structures spaced at different respective distances from the given gate structure. A larger gate structure spacing leads to a greater substrate temperature rise than a smaller gate structure spacing. The pocket implant diffuses more in portions of the substrate with the greater temperature rise, producing asymmetric transistors. Asymmetric pass transistors may be controlled by static control signals from memory elements to implement circuits such as programmable multiplexers.
摘要翻译：不对称晶体管，例如不对称传输晶体管可以形成在集成电路上。不对称晶体管可以具有栅极结构。可以在每个晶体管栅极结构的相对侧上的源极漏极中形成对称的袋状植入物。选择性加热可用于不对称地扩散植入物。可以通过在半导体衬底上图案化栅极结构来实现选择性加热，使得相邻栅极结构之间的间隔变化。给定的栅极结构可以位于与给定栅极结构不同的相应距离处间隔开的第一和第二相邻栅极结构之间。较大的栅极结构间隔导致比较小栅极结构间隔更大的衬底温度升高。在较大的温度上升的情况下，口袋植入物在衬底的部分扩散，产生不对称晶体管。不对称传输晶体管可以由来自存储器元件的静态控制信号来控制，以实现诸如可编程多路复用器之类的电路。

139. 发明申请

US20140378559A1 COMPOSITIONS OF 1,1,1,3,3-PENTAFLUOROPROPANE AND CYCLOPENTANE 审中-公开
标题翻译： 1,1,1,3,3-二芳基和环戊烷的组成
公开(公告)号：US20140378559A1
公开(公告)日：2014-12-25
申请号：US14368990
申请日：2011-12-19
申请人： Jun Liu , Sanglu Qin , Xiangrui Wang , Xia Cao , Ryan Hulse , Yunjie Xing , Zhongxi Huang , Zhili Lu
发明人： Jun Liu , Sanglu Qin , Xiangrui Wang , Xia Cao , Ryan Hulse , Yunjie Xing , Zhongxi Huang , Zhili Lu
IPC分类号： B01F17/00 , C09K3/30
CPC分类号： B01F17/0035 , C08J9/141 , C08J9/142 , C08J9/146 , C08J9/149 , C08J2201/022 , C08J2203/12 , C08J2203/14 , C08J2203/142 , C08J2203/202 , C08J2205/05 , C08J2205/052 , C08J2205/06 , C08J2205/10 , C08J2375/04 , C09K3/30
摘要： A composition comprising HFC-245fa, cyclopentane, and a third solvent component, wherein the composition is in a homogenous one-phase solution state at temperatures less than the boiling temperature of the composition, and uses thereof, including as blowing agents.
摘要翻译：包含HFC-245fa，环戊烷和第三溶剂组分的组合物，其中所述组合物在低于所述组合物的沸点温度的温度下为均匀的单相溶液状态，以及其用途，包括作为发泡剂。

140. 发明授权

US08878276B2 Diode for variable-resistance material memories, processes of forming same, and methods of using same 有权
标题翻译：用于可变电阻材料存储器的二极管，其形成方法及其使用方法
公开(公告)号：US08878276B2
公开(公告)日：2014-11-04
申请号：US13529852
申请日：2012-06-21
申请人： Jun Liu , Michael P. Violette
发明人： Jun Liu , Michael P. Violette
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： H01L45/1675 , G11C13/0014 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/06 , H01L45/1233 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
摘要： A variable-resistance material memory (VRMM) device includes a container conductor disposed over an epitaxial semiconductive prominence that is coupled to a VRMM. A VRMM device may also include a conductive plug in a recess that is coupled to a VRMM. A VRMM array may also include a conductive plug in a surrounding recess that is coupled to a VRMM. Apparatuses include the VRMM with one of the diode constructions.
摘要翻译：可变电阻材料存储器（VRMM）装置包括设置在耦合到VRMM的外延半导体突起上的容器导体。 VRMM装置还可以包括耦合到VRMM的凹部中的导电插头。 VRMM阵列还可以包括耦合到VRMM的周围凹部中的导电插头。装置包括具有二极管结构之一的VRMM。

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