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    • 123. 发明授权
    • Local punchthrough stop for ultra large scale integration devices
    • 超大规模集成设备的本地突破
    • US5686321A
    • 1997-11-11
    • US647266
    • 1996-05-06
    • Joe KoChih-Hung Lin
    • Joe KoChih-Hung Lin
    • H01L21/336H01L29/10H01L29/78H01L21/265
    • H01L29/66583H01L29/1083H01L29/66537H01L29/66553H01L29/7833
    • The invention relates to an improved MOSFET device structure for use in ultra large scale integration and the method of forming the device structure. A local punchthrough stop region is formed directly under the gate electrode using ion implantation. The local punchthrough stop region reduces the expansion of the depletion region in the channel and thereby increases the punchthrough voltage. The local punchthrough stop region is self-aligned with the gate electrode and source/drain region so that critical spacings are maintained even for sub micron devices. The source and drain junction capacitances are also reduced. The invention can be used in either N channel or P channel MOSFET devices. The invention can be used with a conventional source/drain structure as well as a double doped drain structure and a light doped drain structure.
    • 本发明涉及用于超大规模集成的改进的MOSFET器件结构以及形成器件结构的方法。 使用离子注入在栅电极正下方形成局部穿通停止区域。 局部穿通停止区域减小了通道中耗尽区的扩展,从而增加了穿透电压。 局部穿通停止区域与栅极电极和源极/漏极区域自对准,使得即使对于亚微米器件也保持临界间隔。 源极和漏极结电容也减小。 本发明可用于N沟道或P沟道MOSFET器件。 本发明可以与传统的源极/漏极结构以及双掺杂漏极结构和掺杂掺杂的漏极结构一起使用。
    • 125. 发明授权
    • Maskless method for formation of a field implant channel stop region
    • 用于形成场注入通道停止区域的无掩模方法
    • US5518941A
    • 1996-05-21
    • US312122
    • 1994-09-26
    • Chih-Hung LinJoe Ko
    • Chih-Hung LinJoe Ko
    • H01L21/336H01L21/762H01L21/265
    • H01L29/6659H01L21/76202
    • This invention provides a method of forming a field implant channel stop region and a device using a field implant channel stop region to improve isolation between devices in integrated circuits using field effect transistors. The field implant channel stop region is formed without the use of an extra mask or extra masking steps by means of either a large angle tilted ion implant beam or a higher energy normally directed ion implant beam. The field implant channel stop region is formed with the mask used to form the light doped drain region in place. The field implant channel stop region forms a local increase in the doping level in the device well thereby forming the channel stop region.
    • 本发明提供一种形成场注入通道停止区域的方法和使用场注入通道停止区域的装置,以改善使用场效应晶体管的集成电路中的器件之间的隔离。 通过大角度倾斜离子注入光束或较高能量的正向定向离子注入光束,形成场注入通道停止区域,而不需要使用额外的掩模或额外的掩模步骤。 场用注入沟道阻挡区域形成有用于在适当位置形成光掺杂漏极区域的掩模。 场注入沟道停止区域在器件阱中形成掺杂水平的局部增加,从而形成沟道停止区域。
    • 126. 发明授权
    • “无鸟”现场隔离方法
    • US5393693A
    • 1995-02-28
    • US254533
    • 1994-06-06
    • Joe KoChih-Hung Lin
    • Joe KoChih-Hung Lin
    • H01L21/762H01L21/76
    • H01L21/7621H01L21/76213
    • A method of forming field oxide isolation regions for submicron technology using oxygen implantation is described. A first insulating layer is formed over a silicon substrate. A second insulating layer is formed over the first insulating layer. A first opening is formed in the first and second insulating layers. Sidewall spacers are formed on the vertical surfaces of the first and second insulating layers, within the first opening, to define a second, smaller opening. A portion of the silicon substrate is removed in the region defined by the second, smaller opening, to form an etched region of the silicon substrate. The sidewall spacers are removed. Oxygen is implanted into the etched region of the silicon substrate and into the region of the silicon substrate under the former location of the sidewall spacers. A portion of the polycrystalline silicon in and above the etched region of the silicon substrate. The field oxide isolation region is formed by heating. The remainder of the first and second insulating layers are removed.
    • 描述了使用氧气注入形成亚微米技术的场氧化物隔离区域的方法。 在硅衬底上形成第一绝缘层。 在第一绝缘层上形成第二绝缘层。 在第一和第二绝缘层中形成第一开口。 在第一开口内的第一和第二绝缘层的垂直表面上形成侧壁间隔物,以限定第二较小的开口。 在由第二较小开口限定的区域中去除硅衬底的一部分,以形成硅衬底的蚀刻区域。 去除侧壁间隔物。 将氧气注入到硅衬底的蚀刻区域中并进入硅衬底的位于侧壁间隔物的前面位置的区域中。 在硅衬底的蚀刻区域内和上方的多晶硅的一部分。 通过加热形成场氧化物隔离区域。 去除第一和第二绝缘层的其余部分。