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    • 111. 发明授权
    • Voltage-to-current converter circuit
    • 电压 - 电流转换器电路
    • US4618814A
    • 1986-10-21
    • US622159
    • 1984-06-19
    • Kazuo KatoHideo Sato
    • Kazuo KatoHideo Sato
    • G08C19/02G05F1/56H03F1/30H03F3/45G05F1/44
    • G05F1/561H03F1/301H03F3/45977
    • A voltage-to-current converter circuit for outputting a current accurately proportional to the input signal voltage, which converter circuit includes an operational amplifier for providing an output corresponding to a difference between the input signal and a feedback signal, and includes a feedback circuit for detecting the output current in the form of a voltage by making the output current flow through the reference resistor and for feeding back the detected voltage. Further, the feedback circuit includes a polarity inverting circuit which holds the voltage detected by the reference resistor and inverts the polarity of the voltage, and then feeds back to the operational amplifier.
    • 一种用于输出与输入信号电压精确成比例的电流的电压 - 电流转换器电路,该转换器电路包括用于提供对应于输入信号和反馈信号之间的差的输出的运算放大器,并且包括反馈电路 通过使输出电流流过参考电阻器来检测电压形式的输出电流并反馈检测到的电压。 此外,反馈电路包括极性反转电路,其保持由参考电阻检测的电压并使电压的极性反转,然后反馈到运算放大器。
    • 118. 发明授权
    • Memory utilization control system for compressed digital picture data
transmission system
    • 用于压缩数字图像数据传输系统的存储器利用控制系统
    • US4554597A
    • 1985-11-19
    • US548415
    • 1983-11-03
    • Hiroyuki SugiyamaTakeshi ShibamotoHideo SatoTsuneo FurukiMitsuo KuboKoji Tanaka
    • Hiroyuki SugiyamaTakeshi ShibamotoHideo SatoTsuneo FurukiMitsuo KuboKoji Tanaka
    • G11B9/06G11B20/10H04N1/21H04N5/937H04N9/806H04N9/877H04N5/76
    • H04N1/2141H04N1/2112H04N9/8066H04N9/877H04N2101/00
    • An improved memory utilization control system for compressed digital picture data transmission systems, comprises an input terminal coupled to the memory circuit having a capacity of one frame, an address signal generator generating an address signal which successively indicates write-in addresses in first and second memory regions each amounting to one field in the memory circuit when picture element data of frame-transmission to be reproduced in the first and second fields are applied to the input terminal, and for generating two address signals which respectively and successively indicate write-in addresses in the first and second memory regions when picture element data of field-transmission are applied to the input terminal, a write-in pulse generator generating write-in pulses for writing the picture element data into the memory circuit, and a read-out control circuit for reading out stored picture element data from the first memory region during reproduction of the first field, and for reading out stored picture element data from the second memory region during reproduction of the second field, so that a total capacity of the memory circuit required otherwise is reduced drastically.
    • 一种用于压缩数字图像数据传输系统的改进的存储器利用控制系统,包括耦合到具有一帧容量的存储器电路的输入端,产生连续地指示第一和第二存储器中的写入地址的地址信号的地址信号发生器 当在第一和第二场中要再现的帧传输的图像元素数据被施加到输入端时,分别存储在存储器电路中的一个场的区域,并且用于产生分别连续地指示写入地址的两个地址信号 当场传输的图像元素数据被施加到输入端时的第一和第二存储区域,产生用于将像素数据写入存储器电路的写入脉冲的写入脉冲发生器,以及读出控制电路 用于在第一场的再现期间从第一存储区读出存储的像素数据, 并且用于在再现第二场期间从第二存储器区域读出存储的图像元素数据,使得否则需要的存储器电路的总容量急剧减小。