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111. 发明申请

US20070149382A1 Dielectric ceramic composition, electronic device, and multilayer ceramic capacitor 有权
标题翻译：介电陶瓷组合物，电子器件和多层陶瓷电容器
公开(公告)号：US20070149382A1
公开(公告)日：2007-06-28
申请号：US11593485
申请日：2006-11-07
申请人： Kazushige Ito , Akira Sato , Akitoshi Yoshii , Masayuki Okabe , Atsushi Takeda , Takaki Shinkawa
发明人： Kazushige Ito , Akira Sato , Akitoshi Yoshii , Masayuki Okabe , Atsushi Takeda , Takaki Shinkawa
IPC分类号： C04B35/468
CPC分类号： H01G4/1209 , H01G4/1227 , H01G4/30 , Y10T428/252 , Y10T428/256 , Y10T428/258 , Y10T428/2991
摘要： A dielectric ceramic composition including dielectric particles comprising a main ingredient phase having barium titanate as its main ingredient and a diffusion phase present at the periphery of said main ingredient phase, wherein when an average value of the depth where sub ingredient elements present at said diffusion phase diffuses from a surface of said diffusion phase toward a center of said dielectric particle is designated as an average diffusion depth, a dispersion of the average diffusion depth among the dielectric particles is, in terms of CV value, 5 to 30%. According to the present invention, an electronic device excellent in all of the dielectric constant, high temperature accelerated life, TC bias, and IR temperature dependency can be provided.
摘要翻译： 1.一种电介质陶瓷组合物，其特征在于，包含以钛酸钡为主成分的主成分相和存在于所述主成分相周边的扩散相的电介质粒子，其中，当所述扩散相存在次成分元素的深度的平均值时，从所述扩散相的表面朝向所述介电粒子的中心扩散为平均扩散深度，以CV值计，介电粒子的平均扩散深度的分散度为5〜30％。根据本发明，可以提供所有介电常数，高温加速寿命，TC偏压和IR温度依赖性优异的电子器件。

112. 发明申请

US20070142209A1 Dielectric ceramic composition, electronic device, and multilayer ceramic capacitor 审中-公开
标题翻译：介电陶瓷组合物，电子器件和多层陶瓷电容器
公开(公告)号：US20070142209A1
公开(公告)日：2007-06-21
申请号：US11606936
申请日：2006-12-01
申请人： Kazushige Ito , Akira Sato , Akitoshi Yoshii , Masayuki Okabe , Atsushi Takeda , Takaki Shinkawa
发明人： Kazushige Ito , Akira Sato , Akitoshi Yoshii , Masayuki Okabe , Atsushi Takeda , Takaki Shinkawa
IPC分类号： C04B35/468
CPC分类号： H01G4/1209 , B32B18/00 , C04B35/468 , C04B35/4682 , C04B35/6261 , C04B35/62655 , C04B2235/3206 , C04B2235/3208 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3236 , C04B2235/3239 , C04B2235/3248 , C04B2235/36 , C04B2235/405 , C04B2235/6025 , C04B2235/656 , C04B2235/658 , H01G4/1227 , H01G4/30
摘要： A dielectric ceramic composition including dielectric particles and grain boundary phases present among these dielectric particles, wherein when measuring a concentration of Si and/or element “A” contained in the grain boundary phases (where, “A” is at least one element selected from cationic elements with an effective ion radius in sixfold coordination of 0.065 nm to 0.085 nm), the concentration of the Si and/or element “A” disperses depending on the position in the grain boundary phases, and the dispersion of the concentration of Si and/or elmemt “A” in the grain boundary phases is, in terms of CV value, larger than 10% and less than 58%. According to the present invention, a dielectric ceramic composition and an electronic device excellent in capacity-temperature characteristic while realizing a good high temperature accelerated life can be realized.
摘要翻译：在这些电介质颗粒中存在介电粒子和晶界相的介电陶瓷组合物，其中当测量晶界相中所含的Si和/或元素“A”的浓度时（其中“A”为至少一种选自具有有效离子半径的六元配位的阳离子元素为0.065nm至0.085nm），Si和/或元素“A”的浓度根据晶界相位置而分散，Si和晶粒边界相中的/或榆树“A”的CV值大于10％且小于58％。根据本发明，可以实现电介质陶瓷组合物和在实现良好的高温加速寿命的同时优异的电容温度特性的电子装置。

113. 发明申请

US20070077458A1 Ferrite substrate for thin-film inductors, thin-film common mode filter using the substrate, thin-film common mode filter array using the substrate and manufacturing method of the substrate 有权
标题翻译：用于薄膜电感的铁氧体衬底，使用衬底的薄膜共模滤波器，使用衬底的薄膜共模滤波器阵列和衬底的制造方法
公开(公告)号：US20070077458A1
公开(公告)日：2007-04-05
申请号：US11607065
申请日：2006-12-01
申请人： Shigeru Shoji , Akira Sato , Yukio Kawaguchi , Kazumitsu Tanaka , Toshikazu Tanishima
发明人： Shigeru Shoji , Akira Sato , Yukio Kawaguchi , Kazumitsu Tanaka , Toshikazu Tanishima
IPC分类号： H01F1/00 , C04B35/26
CPC分类号： C04B35/645 , C04B35/265 , C04B35/6262 , C04B35/64 , C04B35/6455 , C04B2235/3208 , C04B2235/3267 , C04B2235/3279 , C04B2235/3281 , C04B2235/3284 , C04B2235/3298 , C04B2235/662 , C04B2235/77 , C04B2235/96 , C04B2235/9607 , C04B2235/963 , H01F1/344 , H01F41/0246
摘要： A ferrite substrate for thin-film inductors is provided by means of blending raw materials to meet a composition of di-iron trioxide (Fe2O3): 40 to 55 molt %, nickel oxide (NiO): 5 to 35 molt, zinc oxide (ZnO): 10 to 40 molt %, and bismuth trioxide (Bi2O3): 150 to 750 ppm, or of Fe2O3: 40 to 55 molt %, NiO: 5 to 35 mol %, ZnO: 10 to 40 mol %, cupric oxide (CuO): 5 to 10 molt, and manganese dioxide (MnO2): 0.5 to 2 molt %, and then molding and sintering the blended material, and applying hot isostatic pressing to the sintered article. A thin-film common mode filter and a thin-film common mode filter array using the ferrite substrate and the manufacturing method of the substrate are also provided.
摘要翻译：用于薄膜电感器的铁氧体衬底通过混合原料以满足三氧化二铁（Fe 2 O 3 O 3）的组成来提供：40至55摩尔％，氧化镍（NiO）：5〜35摩尔，氧化锌（ZnO）：10〜40摩尔％，三氧化二铋（Bi 2 O 3 O 3）：150 至750ppm，或Fe 2 O 3 O 3：40〜55摩尔％，NiO：5〜35摩尔％，ZnO：10〜40摩尔％，氧化铜（ CuO）：5〜10摩尔，二氧化锰（MnO 2/2）：0.5〜2摩尔％，然后成型并烧结混合材料，并对烧结体进行热等静压。还提供了使用铁氧体衬底的薄膜共模滤波器和薄膜共模滤波器阵列以及衬底的制造方法。

114. 发明申请

US20070061276A1 Device and method for registering a plurality of types of information 审中-公开
标题翻译：用于登记多种类型的信息的装置和方法
公开(公告)号：US20070061276A1
公开(公告)日：2007-03-15
申请号：US10595030
申请日：2003-07-10
申请人： Akira Sato , Seishi Okamoto , Hiroya Inakoshi , Takahisa Ando
发明人： Akira Sato , Seishi Okamoto , Hiroya Inakoshi , Takahisa Ando
IPC分类号： G06F17/30
CPC分类号： G06F16/93
摘要： A common registration area for registering a plurality of types of information as unclassified information not classified for each category is displayed on a screen, and when a user performs an operation of registering arbitrary information in the registration area, specified information is registered as the unclassified information.
摘要翻译：在屏幕上显示用于将多种类型的信息注册为未分类的信息的公共登记区域，并且当用户执行在登记区域中登记任意信息的操作时，指定的信息被登记为未分类信息。

115. 发明申请

US20060232911A1 Electronic device, dielectric ceramic composition, and method of production of the same 有权
标题翻译：电子器件，介电陶瓷组合物及其制造方法
公开(公告)号：US20060232911A1
公开(公告)日：2006-10-19
申请号：US11389075
申请日：2006-03-27
申请人： Kazushige Ito , Akira Sato
发明人： Kazushige Ito , Akira Sato
IPC分类号： H01G4/06
CPC分类号： H01G4/1227 , B32B2311/22 , C04B35/4682 , C04B35/6303 , C04B35/64 , C04B2235/3203 , C04B2235/3205 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3239 , C04B2235/3241 , C04B2235/3244 , C04B2235/3249 , C04B2235/3256 , C04B2235/3258 , C04B2235/3262 , C04B2235/3409 , C04B2235/3418 , C04B2235/3436 , C04B2235/3454 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/663 , C04B2235/72 , C04B2235/79 , C04B2237/346 , C04B2237/405 , H01G4/30
摘要： A dielectric ceramic position having at least a main component including barium titanate, a first subcomponent including at least one type of compound selected from MgO, CaO, BaO, a SrO, a second subcomponent including at least one type of compound selected from Al2O3, Li2O, and B2O3, a third subcomponent including at least one type of compound selected from V2O5, MoO3, and WO3, a fourth subcomponent including an oxide of R1 (where R1 is at least one type of element selected from Sc, Er, Tm, Yb, and Lu), and a fifth subcomponent including CaZrO3 or CaO+ZrO2.
摘要翻译：具有至少包含钛酸钡的主要成分的电介质陶瓷位置，包含至少一种选自MgO，CaO，BaO，SrO的化合物的第一副成分，第二副成分，其包含至少一种选自Al _{2个O 3，3个2个O 2和2个2个O 3，第三个次要组分包括至少一种选自V 2 O 5，MoO 3和WO 3的化合物，a，包括R1的氧化物（其中R1是选自Sc，Er，Tm，Yb和Lu中的至少一种元素）的第四副成分和包含CaZrO 3或CaO + ZrO 3的第五副成分， SUB> 2 。}

116. 发明申请

US20060180882A1 MEMS device and manufacturing method of MEMS device 审中-公开
标题翻译： MEMS器件的MEMS器件和制造方法
公开(公告)号：US20060180882A1
公开(公告)日：2006-08-17
申请号：US11353041
申请日：2006-02-14
申请人： Akira Sato , Shogo Inaba
发明人： Akira Sato , Shogo Inaba
IPC分类号： H01L21/00 , H01L29/82
CPC分类号： B81C1/00587
摘要： A MEMS device includes a wiring laminated through an interlayer insulating film on a semiconductor substrate, the interlayer insulating film partially opened up to an upper portion of the substrate, and a structure disposed in the opening, wherein on a sidewall of the interlayer insulating film exposed in the opening that faces the structure and on a surface of the uppermost layer of the interlayer insulating film, a silicon nitride film is formed.
摘要翻译： MEMS器件包括通过半导体衬底上的层间绝缘膜层叠的布线，部分地向基板的上部开放的层间绝缘膜和布置在开口中的结构，其中在层间绝缘膜的侧壁暴露在面向结构的开口和层间绝缘膜的最上层的表面上形成氮化硅膜。

117. 发明申请

US20060151620A1 Semiconductor devices and manufacturing method therefor and electric commerce method and transponder reader 有权
标题翻译：半导体器件及其制造方法和电子商务方法及应答器阅读器
公开(公告)号：US20060151620A1
公开(公告)日：2006-07-13
申请号：US11370902
申请日：2006-03-09
申请人： Mitsuo Usami , Akira Sato
发明人： Mitsuo Usami , Akira Sato
IPC分类号： G06K19/06
CPC分类号： G06K19/07728 , G06K19/07745 , G06K19/07749 , G06K19/0775 , H01L2224/16225 , H01L2224/16227 , H01L2924/07811 , H01L2924/13091 , H01L2924/00
摘要： A wireless IC tag is provided which includes a plate-shaped first conductor, a plate-shaped second conductor, and an IC chip which is sandwiched between the first conductor and the second conductor via a front surface and a rear surface of the IC chip. The IC chip includes a double voltage rectifier circuit to rectify an alternating voltage induced between the front surface and the rear surface of the IC chip. The second conductor functions as an antenna and also includes a slit extending from a center portion thereof in a longitudinal direction. The first conductor electrically connects both sides of the slit via the front surface and the rear surface of the IC chip.
摘要翻译：提供了一种无线IC标签，其包括经由IC芯片的前表面和后表面夹在第一导体和第二导体之间的板状第一导体，板状第二导体和IC芯片。 IC芯片包括用于对在IC芯片的前表面和后表面之间感应的交流电压进行整流的双电压整流电路。第二导体用作天线，并且还包括从其纵向方向上的中心部分延伸的狭缝。第一导体经由IC芯片的前表面和后表面电连接狭缝的两侧。

118. 发明授权

US07061748B2 Multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US07061748B2
公开(公告)日：2006-06-13
申请号：US11165286
申请日：2005-06-24
申请人： Kazushige Ito , Akira Sato
发明人： Kazushige Ito , Akira Sato
IPC分类号： H01G4/06 , C04B35/46
CPC分类号： C04B35/4682 , B32B18/00 , B32B2311/22 , C04B35/62665 , C04B35/638 , C04B35/64 , C04B2235/3203 , C04B2235/3205 , C04B2235/3206 , C04B2235/3208 , C04B2235/3213 , C04B2235/3215 , C04B2235/3217 , C04B2235/3224 , C04B2235/3225 , C04B2235/3239 , C04B2235/3241 , C04B2235/3244 , C04B2235/3249 , C04B2235/3256 , C04B2235/3258 , C04B2235/3262 , C04B2235/3409 , C04B2235/3418 , C04B2235/3427 , C04B2235/3436 , C04B2235/3445 , C04B2235/3454 , C04B2235/6582 , C04B2235/6584 , C04B2235/6588 , C04B2235/662 , C04B2235/72 , C04B2235/782 , C04B2235/785 , C04B2237/12 , C04B2237/346 , C04B2237/40 , C04B2237/405 , C04B2237/704 , C04B2237/706
摘要： A multilayer ceramic capacitor containing dielectric layers, in which each of the dielectric layers has a main component containing barium titanate, a first auxiliary component containing at least one kind selected from MgO, CaG, BaO, and SrO, a second auxiliary component containing a silicon oxide as a main component, a third auxiliary component containing at least one kind selected from the group consisting of V2O5, MoO3, and WO3, a fourth auxiliary component containing an oxide of at least one kind of first rare-earth element (R1) selected from Sc, Er, Tm, Yb, and Lu, a fifth auxiliary component containing CaZrO3 or a mixture (CaO+ZrO2) of CaO and ZrO2, and a liquid phase addition of organic metal salts of Zr and Ca.
摘要翻译：一种包含电介质层的多层陶瓷电容器，其中每个电介质层具有包含钛酸钡的主要成分，含有选自MgO，CaG，BaO和SrO中的至少一种的第一辅助成分，含有硅的第二辅助成分氧化物作为主要成分，第三辅助成分含有选自V 2 O 5，MoO 3 3，和WO 3，含有选自Sc，Er，Tm，Yb和Lu中的至少一种第一稀土元素（R1）的氧化物的第四辅助成分，含有 CaZrO 3 3或CaO和ZrO 2 2的混合物（CaO + ZrO 2/2），Zr的有机金属盐和可以

119. 发明授权

US06987662B2 Multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器
公开(公告)号：US06987662B2
公开(公告)日：2006-01-17
申请号：US11043267
申请日：2005-01-27
申请人： Takako Hibi , Kazunori Noguchi , Mari Miyauchi , Akira Sato
发明人： Takako Hibi , Kazunori Noguchi , Mari Miyauchi , Akira Sato
IPC分类号： H01G4/20 , H01G4/06
CPC分类号： H01G4/30 , H01G4/12
摘要： A multilayer ceramic capacitor 1 having internal electrode layers 3, internal dielectric layers 2 having the thickness of less than 2 μm, and external dielectric layers 20 wherein; the internal dielectric layers 2 and the external dielectric layers 20 include a plural number of dielectric particles 2a, 20a, and when y1 is ratio(D50a/D50b) of D50a and D50b where D50a is an average particle size of dielectric particles 2a included in the internal dielectric layers 2 and D50b is an average particle size of dielectric particles 20a included in the external dielectric layer 20 and located at least 5 μm away from an internal electrode layer 3a, arranged outermost part of all the internal electrode layers, to the stacked direction, and x is thickness of the internal dielectric layer 2, y1 and x satisfy the following equations, y1≦−0.75x+2.275 and y1≧−0.75x+1.675. According to the present invention, even when thickness of internal dielectric layers 2 were made thinner, a multilayer ceramic capacitor 1 wherein improvements in all kinds of electric characteristics, specially an improvement in TC bias characteristic while having sufficient dielectric constant can be expected.
摘要翻译：具有内部电极层3，厚度小于2μm的内部电介质层2和外部电介质层20的多层陶瓷电容器1，其中：内部电介质层2和外部电介质层20包括多个电介质粒子2a，20a，当y1为D50a和D50b的比率（D50a / D50b）时，D50 a是包含在内部电介质层2中的电介质粒子2a的平均粒径，D50b是包含在外部电介质层20中并且位于离内部电极至少5m的电介质粒子20a的平均粒径层3a，所有内部电极层的最外面的部分为堆叠方向，x为内部电介质层2的厚度，y 1和x满足下列等式：y 1 <= - 0.75×+ 2.275和y 1> = - 0.75x + 1.675。根据本发明，即使使内部电介质层2的厚度变薄，也可以期望具有各种电特性的改善的多层陶瓷电容器1，特别是具有足够介电常数的TC偏置特性的改善。

120. 发明申请

US20060005996A1 Method of attaching electronic components to printed circuit board and attachment structure thereof 失效
公开(公告)号：US20060005996A1
公开(公告)日：2006-01-12
申请号：US11172991
申请日：2005-07-05
申请人： Shigeru Muto , Akira Sato , Kohya Shimano , Norio Tamate , Tomoyuki Honda , Takuji Yamamoto , Kazuhisa Yamamoto , Takatoshi Ota , Hiroshi Ikeba
发明人： Shigeru Muto , Akira Sato , Kohya Shimano , Norio Tamate , Tomoyuki Honda , Takuji Yamamoto , Kazuhisa Yamamoto , Takatoshi Ota , Hiroshi Ikeba
IPC分类号： H05K1/18
CPC分类号： H05K3/325 , H05K3/3447 , H05K3/3468 , H05K2201/10409 , Y10T29/49144
摘要： In a method of attaching an electronic component to a printed circuit board by a plurality of screws that are inserted into corresponding through holes cut in the board from a surface of the board and then screwed into corresponding screw holes formed in the component mounted on an opposite surface, the component is screwed onto the board using one of the screws and the component and the screw are soldered onto the board with lead-free solder. After they have been cooled down, the component is screwed onto the board using remaining screws. With this, the strength of the connection between the component and board is improved and also the occurrence of warp of the board and component can be prevented.

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