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    • 111. 发明申请
    • Acceleration sensor
    • 加速度传感器
    • US20060053889A1
    • 2006-03-16
    • US11224334
    • 2005-09-12
    • Akira YamamotoYasuo Sugimori
    • Akira YamamotoYasuo Sugimori
    • G01P15/00
    • F16F1/326G01H11/06G01P1/023G01P15/125G01P15/18
    • A three-axis acceleration sensor having a simple construction is provided for improving shock resistance without lowering sensor sensitivity. An acceleration sensor for detecting acceleration in three orthogonal directions comprises an electrode substrate pair including electrode substrates (4) opposed to each other, and each having fixed electrodes (4c, 4b, 4a) corresponding to three axes, respectively, a diaphragm (2) acting as a movable electrode, and an umbrella-like weight (3) mounted centrally of the diaphragm (2). Acceleration is detected based on variations in capacitance between the fixed electrodes (4c, 4b, 4a) and diaphragm (2). Each electrode substrate (4) has an electret layer (1) formed to cover surfaces of the fixed electrodes (4c, 4b, 4a). At least one of the electrode substrates defines, centrally thereof, a through hole (7). A shaft portion of the umbrella-like weight (3) extends through the through hole (7) from outside, and is connected to the diaphragm (2).
    • 提供了具有简单结构的三轴加速度传感器,用于提高抗冲击性而不降低传感器灵敏度。
    • 112. 发明授权
    • Scanning type display optical system
    • 扫描式显示光学系统
    • US06980367B2
    • 2005-12-27
    • US10686807
    • 2003-10-15
    • Akira Yamamoto
    • Akira Yamamoto
    • G02B26/10G02B13/22G02B17/08G02B25/02G02B26/08G02B27/00G02B27/02
    • G02B27/0031G02B26/0833
    • A scanning display optical system is disclosed that can optically correct the distortion of images formed by two-dimensional scanning of a light beam. The scanning display optical system comprises a deflection device deflecting a light beam from a light source two-dimensionally and an image-forming optical system forming an image with the light beam deflected by the deflection device. A direction from which the light beam coming from the light source is incident on the deflection device is oblique with respect to at least one of the two deflection axes of the deflection device. The image-forming optical system includes an optical element which is tilted and/or shifted with respect to a center axis of a two-dimensional deflection range over which the light beam is deflected by the deflection device.
    • 公开了一种扫描显示光学系统,其可以光学校正由光束的二维扫描形成的图像的失真。 扫描显示光学系统包括使来自二维光源的光束偏转的偏转装置和由偏转装置偏转的光束形成图像的图像形成光学系统。 来自光源的光束入射到偏转装置上的方向相对于偏转装置的两个偏转轴中的至少一个倾斜。 图像形成光学系统包括相对于二维偏转范围的中心轴倾斜和/或偏移光学元件的光学元件,光束被偏转装置偏转。
    • 114. 发明授权
    • Trouble determining apparatus for DC boosting circuit
    • 直流升压电路故障诊断装置
    • US06960903B2
    • 2005-11-01
    • US10887811
    • 2004-07-12
    • Akira Yamamoto
    • Akira Yamamoto
    • H02M3/155B62D5/04G05F1/40
    • H02M1/32B62D5/0484
    • A trouble determining apparatus for a chopper type DC boosting circuit capable of determining whether or not a switching device is in trouble securely and quickly and when the switching circuit is in trouble, preventing other circuit from being in a trouble. Upon determining a short-circuit trouble of a transistor Q, a boosting circuit control unit 22 is turned OFF a power relay RL and then determines whether or not a voltage VP1 of a connecting point P1 rises over a first set voltage VS1 by the time when a first predetermined time t1 elapses since an ignition switch IG is turned ON with the transistor Q set to OFF. Upon determining an open trouble of the transistor Q, the boosting circuit control unit 22 determines whether or not the voltage VP1 of the connecting point P1 falls below a second set voltage by the time when a second predetermined time t2 elapses since the transistor Q is turned ON with the power relay RL set to OFF and whether or not the voltage VP1 falls from a state before the transistor Q is turned ON by more than a third set voltage.
    • 能够确定切换装置是否处于安全快速的故障的切断式直流升压电路的故障判定装置,以及当切换电路处于故障状态时,防止其他电路出现故障。 在确定晶体管Q的短路故障时,升压电路控制单元22断开功率继电器RL,然后确定连接点P 1的电压VP 1是否上升超过第一设定电压VS 1,通过 由于点火开关IG在晶体管Q设置为OFF时导通,所以经过第一预定时间t 1的时间。 在确定晶体管Q的开路故障时,升压电路控制单元22确定连接点P 1的电压VP 1在从第二预定时间t 2经过以后的时刻下降到低于第二设定电压 在功率继电器RL设定为OFF并且电压VP1是否从晶体管Q导通之前的状态下降多于第三设定电压的情况下Q接通。
    • 117. 发明授权
    • Television tuner which maintains UHF band tuning circuit bandwidth constant in low to high band range
    • 电视调谐器,保持UHF频段调谐电路带宽在低到高频带范围内恒定
    • US06933984B2
    • 2005-08-23
    • US09995544
    • 2001-11-28
    • Masaki YamamotoAkira Yamamoto
    • Masaki YamamotoAkira Yamamoto
    • H03J3/06H04B1/18H04B1/26H04N5/44H04N5/50
    • H03J3/06
    • A tuning circuit's bandwidth is maintained almost constant throughout a UHF low to high band range so as to prevent interference by a neighboring channel, particularly in receiving high band television signals, and also to improve NF in receiving low band television signals, eliminating a difference in NF between channels. To realize this, a UHF tuner comprises: a UHF tuning circuit which has a varactor diode first and second inductance elements serially interconnected and connected in parallel with the varactor diode, where the varactor diode 11a varies a tuning frequency within a prescribed frequency range in the UHF band; and impedance means which is serially inserted between an input terminal and the junction of the two inductance elements, where the impedance by the impedance means increases as a frequency increases within the prescribed frequency range in the UHF band.
    • 调谐电路的带宽在整个UHF低至高频带范围内几乎保持恒定,以防止相邻信道的干扰,特别是在接收高频电视信号时,也可以改善接收低频电视信号的NF,从而消除 通道之间的NF。 为了实现这一点,UHF调谐器包括:UHF调谐电路,其具有串联地互连并与变容二极管并联连接的变容二极管第一和第二电感元件,其中变容二极管11a在规定频率范围内改变调谐频率 UHF频带; 以及阻抗装置,其串联插入在两个电感元件的输入端子和结点之间,其中阻抗装置的阻抗随UHF频带中的规定频率范围内的频率增加而增加。
    • 119. 发明申请
    • Demodulator and address information extractor
    • 解调器和地址信息提取器
    • US20050169404A1
    • 2005-08-04
    • US10513149
    • 2004-01-26
    • Akira Yamamoto
    • Akira Yamamoto
    • G11B20/14H04L27/00H04L27/227H04L27/22
    • G11B20/1403G11B7/0053H04L27/2275H04L2027/0028H04L2027/0046
    • In a demodulator for demodulating a BPSK modulated signal, demodulation performance degradation caused by analog circuits such as fabrication variation is suppressed, and furthermore, frequency variation in the BPSK modulated signal is followed by the demodulator. A multiplication circuit 105 multiplies a carrier, generated from a BPSK modulated signal by a carrier information extraction circuit 101 and a carrier generation circuit 102, by a digital BPSK modulated signal obtained by digitizing the BPSK modulated signal by an A/D converter 104 via a LPF 103. A carrier period integration circuit 106 integrates the multiplication result with respect to the period of the carrier, and the integration result is then binarized in a discriminator 107, thereby realizing demodulation.
    • 在用于解调BPSK调制信号的解调器中,抑制了由诸如制造变化的模拟电路引起的解调性能下降,此外,解调器跟随BPSK调制信号的频率变化。 乘法电路105通过载波信息提取电路101和载波生成电路102从BPSK调制信号生成的载波通过A / D转换器104经由A / D转换器104对BPSK调制信号进行数字化而获得的数字BPSK调制信号进行乘法运算 LPF 103.载波周期积分电路106相对于载波的周期积分乘法结果,然后在鉴频器107中对积分结果进行二值化,从而实现解调。