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101. 发明授权

US08363481B2 Non-volatile semiconductor memory device and method of making the same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08363481B2
公开(公告)日：2013-01-29
申请号：US12521997
申请日：2008-01-31
申请人： Masaru Kidoh , Hiroyasu Tanaka , Masaru Kito , Ryota Katsumata , Hideaki Aochi , Mitsuru Sato
发明人： Masaru Kidoh , Hiroyasu Tanaka , Masaru Kito , Ryota Katsumata , Hideaki Aochi , Mitsuru Sato
IPC分类号： G11C16/06
CPC分类号： H01L27/11578 , G11C16/0483 , H01L21/8221 , H01L27/0688 , H01L27/105 , H01L27/11568 , H01L27/11575 , H01L27/11582
摘要： A non-volatile semiconductor memory device according to the present invention includes a substrate; a first word-line provided above the substrate surface, the first word-line having a plate shape in an area where a memory cell is formed; a second word-line provided above the first word-line surface, the second word-line having a plate shape; a plurality of metal wirings connecting the first and second word-lines with a driver circuit; and a plurality of contacts connecting the first and second word-lines with the metal wirings. The contact of the first word-line is formed in a first word-line contact area. The contact of the second word-line is formed in a second word-line contact area. The first word-line contact area is provided on a surface of the first word-line that is drawn to the second word-line contact area.
摘要翻译：根据本发明的非易失性半导体存储器件包括：衬底; 设置在所述衬底表面上方的第一字线，所述第一字线在形成存储器单元的区域中具有板形; 设置在所述第一字线表面上方的第二字线，所述第二字线具有板形; 将第一和第二字线与驱动电路连接的多个金属布线; 以及将第一和第二字线与金属布线连接的多个触点。第一字线的接触形成在第一字线接触区域中。第二字线的接触形成在第二字线接触区域中。第一字线接触区域被提供在第一字线的被拉到第二字线接触区域的表面上。

102. 发明授权

US08247863B2 Nonvolatile semiconductor memory device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08247863B2
公开(公告)日：2012-08-21
申请号：US12708161
申请日：2010-02-18
申请人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
发明人： Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
IPC分类号： H01L29/792
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/792 , H01L29/7926
摘要： A memory string comprises: a pair of columnar portions; a first insulating layer surrounding a side surface of the columnar portions; a charge storage layer surrounding a side surface of the first insulating layer; a second insulating layer surrounding a side surface of the charge storage layer; and a first conductive layer surrounding a side surface of the second insulating layer. A select transistor comprises: a second semiconductor layer extending from an upper surface of the columnar portions; a third insulating layer surrounding a side surface of the second semiconductor layer; a fourth insulating layer surrounding a side surface of the third insulating layer; and a second conductive layer surrounding a side surface of the fourth insulating layer. The first semiconductor layer is formed continuously in an integrated manner with the second semiconductor layer. The first insulating layer is formed continuously in an integrated manner with the third insulating layer.
摘要翻译：存储器串包括：一对柱状部分; 围绕所述柱状部分的侧表面的第一绝缘层; 围绕所述第一绝缘层的侧表面的电荷存储层; 围绕电荷存储层的侧表面的第二绝缘层; 以及围绕所述第二绝缘层的侧表面的第一导电层。选择晶体管包括：从柱状部分的上表面延伸的第二半导体层; 围绕所述第二半导体层的侧表面的第三绝缘层; 围绕所述第三绝缘层的侧表面的第四绝缘层; 以及围绕所述第四绝缘层的侧表面的第二导电层。第一半导体层以与第二半导体层一体化的方式连续地形成。第一绝缘层与第三绝缘层一体地形成。

103. 发明申请

US20120135595A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20120135595A1
公开(公告)日：2012-05-31
申请号：US13365600
申请日：2012-02-03
申请人： Masaru Kito , Ryota Katsumata , Masaru Kidoh , Hiroyasu Tanaka , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Masaru Kito , Ryota Katsumata , Masaru Kidoh , Hiroyasu Tanaka , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L21/336
CPC分类号： H01L29/7881 , H01L27/115 , H01L27/11556
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a first columnar semiconductor layer extending in a direction perpendicular to a substrate; a charge accumulation layer formed on the first columnar semiconductor layer via a first air gap and accumulating charges; a block insulation layer contacting the charge accumulation layer; and a plurality of first conductive layers contacting the block insulation layer.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：在垂直于衬底的方向上延伸的第一柱状半导体层; 电荷累积层，经由第一气隙形成在第一柱状半导体层上，并积累电荷; 与电荷累积层接触的块绝缘层; 以及与块绝缘层接触的多个第一导电层。

104. 发明授权

US08148769B2 Nonvolatile semiconductor memory device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08148769B2
公开(公告)日：2012-04-03
申请号：US12534576
申请日：2009-08-03
申请人： Masaru Kito , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
发明人： Masaru Kito , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
IPC分类号： H01L29/788
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/792 , H01L29/7926
摘要： A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors, one of which is connected to each of ends of each of the memory strings. Each of the memory strings is provided with a first semiconductor layer having a pair of columnar portions extending in a perpendicular direction with respect to a substrate, and a joining portion formed so as to join lower ends of the pair of columnar portions; a charge storage layer formed so as to surround a side surface of the columnar portions; and a first conductive layer formed so as to surround the side surface of the columnar portions and the charge storage layer, and configured to function as a control electrode of the memory cells. Each of the select transistors is provided with a second semiconductor layer extending upwardly from an upper surface of the columnar portions; and a second conductive layer formed so as to surround a side surface of the second semiconductor layer with a gap interposed, and configured to function as a control electrode of the select transistors.
摘要翻译：非易失性半导体存储器件包括多个存储串，每个存储串具有串联连接的多个电可重写存储单元; 并选择晶体管，其中一个连接到每个存储器串的每一端。每个存储器串都具有第一半导体层，该第一半导体层具有相对于衬底在垂直方向上延伸的一对柱状部分，以及形成为连接该一对柱状部分的下端的接合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分的侧面和电荷存储层的第一导电层，并且被配置为用作存储单元的控制电极。每个选择晶体管设置有从柱状部分的上表面向上延伸的第二半导体层; 以及第二导电层，其被形成为以间隔开的方式围绕所述第二半导体层的侧表面，并且被配置为用作所述选择晶体管的控制电极。

105. 发明申请

US20110233644A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20110233644A1
公开(公告)日：2011-09-29
申请号：US12839895
申请日：2010-07-20
申请人： Yoshiaki FUKUZUMI , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi
发明人： Yoshiaki FUKUZUMI , Ryota Katsumata , Masaru Kito , Masaru Kidoh , Hiroyasu Tanaka , Hideaki Aochi
IPC分类号： H01L29/792
CPC分类号： H01L29/7926 , H01L21/28282 , H01L27/11578 , H01L27/11582 , H01L29/42344 , H01L29/66833
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes first and second stacked structural bodies, first and second semiconductor pillars, a memory unit connection portion, a selection unit stacked structural body, first and second selection unit semiconductor pillars, a selection unit connection portion, and first to fifth interconnections. The semiconductor pillars pierce the stacked structural bodies. The first and second interconnections are connected to the first and second semiconductor pillars, respectively. The memory unit connection portion connects the first and second semiconductor pillars. The selection unit semiconductor pillars pierce the selection unit stacked structural body. The third and fourth interconnections are connected to the first and second selection unit semiconductor pillars, respectively. The selection unit connection portion connects the first and second selection unit semiconductor pillars. The fifth interconnection is connected to the third interconnection on a side opposite to the selection unit stacked structural body.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括第一和第二堆叠结构体，第一和第二半导体柱，存储单元连接部分，选择单元堆叠结构体，第一和第二选择单元半导体柱，选择单元连接部分，以及第一至第五互连。半导体支柱刺穿堆叠的结构体。第一和第二互连分别连接到第一和第二半导体柱。存储单元连接部分连接第一和第二半导体柱。选择单元半导体柱刺穿选择单元堆叠结构体。第三和第四互连分别连接到第一和第二选择单元半导体柱。选择单元连接部分连接第一和第二选择单元半导体柱。第五互连在与选择单元堆叠结构体相反的一侧连接到第三互连。

106. 发明申请

US20110227140A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US20110227140A1
公开(公告)日：2011-09-22
申请号：US12834390
申请日：2010-07-12
申请人： Megumi ISHIDUKI , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hideaki Aochi
发明人： Megumi ISHIDUKI , Yoshiaki Fukuzumi , Ryota Katsumata , Masaru Kidoh , Masaru Kito , Hideaki Aochi
IPC分类号： H01L27/115 , H01L21/8246
CPC分类号： H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： According to one embodiment, a semiconductor memory device includes a substrate, a stacked body, a memory film, and a SiGe film. The stacked body includes a plurality of conductive layers and a plurality of insulating layers alternately stacked above the substrate. The memory film includes a charge storage film. The memory film is provided on a sidewall of a memory hole punched through the stacked body. The SiGe film is provided inside the memory film in the memory hole.
摘要翻译：根据一个实施例，半导体存储器件包括衬底，层叠体，存储膜和SiGe膜。层叠体包括交替层叠在基板的上方的多个导电层和多个绝缘层。记忆膜包括电荷存储膜。记忆膜设置在穿过堆叠体的冲击的存储孔的侧壁上。 SiGe膜被提供在存储器孔内的记忆膜内部。

107. 发明申请

US20110175159A1 NON-VOLATILE SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：非挥发性半导体存储器件
公开(公告)号：US20110175159A1
公开(公告)日：2011-07-21
申请号：US13120987
申请日：2009-08-25
申请人： Kiyotaro Itagaki , Yoshihisa Iwata , Hiroyasu Tanaka , Masaru Kidoh , Ryota Katsumata , Masaru Kito , Hideaki Aochi , Akihiro Nitayama
发明人： Kiyotaro Itagaki , Yoshihisa Iwata , Hiroyasu Tanaka , Masaru Kidoh , Ryota Katsumata , Masaru Kito , Hideaki Aochi , Akihiro Nitayama
IPC分类号： H01L29/792
CPC分类号： H01L27/1157 , G11C5/02 , G11C16/0483 , G11C16/08 , G11C16/30 , H01L27/11565 , H01L27/11573 , H01L27/11582 , H01L29/7926
摘要： Each of the memory blocks includes: a first conductive layer expanding in parallel to the substrate over the first area, n layers of the first conductive layers being formed in a lamination direction and shared by the plurality of memory strings; a first semiconductor layer; and an electric charge accumulation layer. The memory strings are arranged with m columns in a second direction for each of the memory blocks. The wiring layers are arranged in the second direction, formed to extend to the vicinity of one end of the first conductive layer in the first direction from one side of the memory block, and connected via contact plugs to the first conductive layers. A relation represented by (Formula 1) is satisfied: (Formula 1) m>=n
摘要翻译：每个存储块包括：在第一区域上平行于衬底扩展的第一导电层，n个第一导电层的层以层叠方向形成并由多个存储器串共享; 第一半导体层; 和电荷蓄积层。对于每个存储块，存储器串按第二方向布置有m列。布线层沿第二方向布置，形成为从存储块的一侧沿第一方向延伸到第一导电层的一端附近，并且经由接触插塞连接到第一导电层。满足式（1）所示的关系：（式1）m> = n

108. 发明授权

US07969789B2 Method for driving nonvolatile semiconductor memory device 有权
标题翻译：用于驱动非易失性半导体存储器件的方法
公开(公告)号：US07969789B2
公开(公告)日：2011-06-28
申请号：US12536226
申请日：2009-08-05
申请人： Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
发明人： Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Masaru Kidoh , Hiroyasu Tanaka , Megumi Ishiduki , Yosuke Komori , Hideaki Aochi
IPC分类号： G11C16/04
CPC分类号： H01L27/11578 , G11C11/5671 , G11C16/0475 , G11C16/0483 , H01L27/11551 , H01L27/11556 , H01L27/11582
摘要： In a nonvolatile semiconductor memory device having n (n is an integer of two or more) electrode films stacked and having charge storage layers provided above and below each of the electrode films, when data “0” is written by injecting electrons into the charge storage layer on a source line side of a memory cell of the number k (k is an integer of 1 to (n−1)) as counted from an end on a bit line side in a selected semiconductor pillar, positive program potential is given to the electrode film of the number 1 to k as counted from the bit line side, and 0 V is given to the electrode film of the number (k+1) to n, therewith positive potential is given to the bit line and 0 V is given to the source line.
摘要翻译：在具有n（n为2以上的整数）的电极膜的非易失性半导体存储装置中，在各电极膜的上下配置有电荷存储层的情况下，在将数据“0”注入到电荷存储部在选择的半导体柱中从位线侧的端部开始计数k（k为1〜（n-1）的整数）的存储单元的源极侧的层，将正的程序电位赋予从位线侧计数1〜k的电极膜，向数字（k + 1）〜n的电极膜施加0V，其中给定位线为0V，0V为给源线。

109. 发明授权

US07847334B2 Non-volatile semiconductor storage device and method of manufacturing the same 有权
标题翻译：非易失性半导体存储装置及其制造方法
公开(公告)号：US07847334B2
公开(公告)日：2010-12-07
申请号：US12403919
申请日：2009-03-13
申请人： Ryota Katsumata , Masaru Kito , Hiroyasu Tanaka , Masaru Kidoh , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
发明人： Ryota Katsumata , Masaru Kito , Hiroyasu Tanaka , Masaru Kidoh , Yoshiaki Fukuzumi , Hideaki Aochi , Yasuyuki Matsuoka
IPC分类号： H01L29/788
CPC分类号： H01L21/764 , H01L27/11551 , H01L27/11556 , H01L27/11575 , H01L27/11578
摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings comprises: a first columnar semiconductor layer extending in a vertical direction to a substrate; a charge accumulation layer formed around the first columnar semiconductor layer via a first insulation layer; and a first conductive layer formed around the charge accumulation layer via a second insulation layer. Each of the first conductive layers is formed to expand in a two-dimensional manner, and air gaps are formed between the first conductive layers located there above and there below.
摘要翻译：非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。每个存储器串包括：沿垂直方向延伸到衬底的第一柱状半导体层; 电荷累积层，经由第一绝缘层形成在第一柱状半导体层周围; 以及经由第二绝缘层形成在电荷累积层周围的第一导电层。每个第一导电层被形成为以二维方式膨胀，并且在位于其上方和下方的第一导电层之间形成气隙。

110. 发明授权

US07821058B2 Nonvolatile semiconductor memory and method for manufacturing the same 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US07821058B2
公开(公告)日：2010-10-26
申请号：US11970992
申请日：2008-01-08
申请人： Masaru Kidoh , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Hideaki Aochi , Hiroyasu Tanaka , Yasuyuki Matsuoka , Yoshio Ozawa , Mitsuru Sato
发明人： Masaru Kidoh , Ryota Katsumata , Masaru Kito , Yoshiaki Fukuzumi , Hideaki Aochi , Hiroyasu Tanaka , Yasuyuki Matsuoka , Yoshio Ozawa , Mitsuru Sato
IPC分类号： H01L27/115 , H01L21/8247 , H01L29/792
CPC分类号： H01L29/792 , G11C16/0483 , H01L27/0688 , H01L27/11568 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory including: a columnar semiconductor; a charge storage insulating film including: a first insulating film formed around the columnar semiconductor, a charge storage film formed around the first insulating film, and a second insulating film formed around the charge storage film; an electrode extending two-dimensionally to surround the charge storage insulating film, the electrode having a groove; and a metal silicide formed on a sidewall of the groove.
摘要翻译：根据本发明的一个方面，提供了一种非易失性半导体存储器，包括：柱状半导体; 电荷存储绝缘膜，包括：围绕所述柱状半导体形成的第一绝缘膜，围绕所述第一绝缘膜形成的电荷存储膜，以及形成在所述电荷存储膜周围的第二绝缘膜; 电极，其二维地延伸以包围电荷存储绝缘膜，所述电极具有凹槽; 以及形成在所述槽的侧壁上的金属硅化物。

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