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    • 102. 发明授权
    • Patch density measuring apparatus and image forming apparatus
    • 贴片密度测定装置及成像装置
    • US07194214B2
    • 2007-03-20
    • US11039828
    • 2005-01-24
    • Osamu Takahashi
    • Osamu Takahashi
    • G03G15/00
    • G03G15/5058G03G15/5041G03G2215/0164
    • When a regular reflection light receiving unit is receiving a reflected light in a non-image area where the test patches are not formed, a clamp switch is closed. Then, a first reference voltage generated by a pull-up resistor and a zener diode is corresponded to an electric potential of a terminal of a capacitor on the side of an A/D converter. The capacitor is charged by the difference in electric potential between the first reference voltage and an output voltage from the regular reflection light receiving unit. Next, the clamp switch is opened. After the regular reflection light receiving unit receives the reflected light from an image area where the test patches are formed with this state of things, the output voltage from the regular reflection light receiving unit is changed. The difference in density between the image area and the non-image area can be quantified by the A/D converter.
    • 当正反射光接收单元在未形成测试片的非图像区域中接收到反射光时,闭合开关。 然后,由上拉电阻和齐纳二极管产生的第一参考电压对应于A / D转换器一侧的电容器的端子的电位。 电容器由第一参考电压和来自正反射光接收单元的输出电压之间的电位差来充电。 接下来,夹紧开关打开。 在正常反射光接收单元接收到来自具有这种状态的测试贴片的图像区域的反射光之后,来自正反射光接收单元的输出电压被改变。 图像区域和非图像区域之间的密度差可以通过A / D转换器来量化。
    • 106. 发明申请
    • Systems and methods for improving performance of a forwarding mechanism in a pipelined processor
    • 用于提高流水线处理器中转发机制性能的系统和方法
    • US20060149930A1
    • 2006-07-06
    • US11007066
    • 2004-12-08
    • Hiroaki MurakamiOsamu Takahashi
    • Hiroaki MurakamiOsamu Takahashi
    • G06F9/30
    • G06F9/3826G06F9/3828G06F9/3832G06F9/3867
    • Systems and methods for forwarding instruction results from various pipeline stages to the initial stages of the pipelines, where the results can be used in the execution of subsequent instructions. In one embodiment, a forwarding mechanism is designed so that sets of one or more dynamic data selection circuits are placed in an alternating linear series with corresponding data registers. Each data register may be coupled to several dynamic data selection circuits, each of which corresponds to a different port or destination register. The dynamic data selection circuits coupled to a single data register are successively positioned in a direction that is perpendicular to the direction of the alternating linear array. Each dynamic data selection circuit may consist of a 2-input NOR gate coupled to drive a discharge transistor. The dynamic data selection circuits themselves may be aligned with the alternating series of latches and data selection circuits.
    • 将各种流水线阶段的指令结果转发到管道的初始阶段的系统和方法,其中结果可用于执行后续指令。 在一个实施例中,转发机制被设计成使得一组或多个动态数据选择电路的集合被放置在与对应的数据寄存器的交替线性序列中。 每个数据寄存器可以耦合到几个动态数据选择电路,每个动态数据选择电路对应于不同的端口或目的地寄存器。 耦合到单个数据寄存器的动态数据选择电路被连续地定位在垂直于交替线性阵列的方向的方向上。 每个动态数据选择电路可以由耦合以驱动放电晶体管的2输入或非门组成。 动态数据选择电路本身可以与交替的锁存器和数据选择电路对齐。
    • 107. 发明申请
    • Patch density measuring apparatus and image forming apparatus
    • 贴片密度测定装置及成像装置
    • US20050163519A1
    • 2005-07-28
    • US11039828
    • 2005-01-24
    • Osamu Takahashi
    • Osamu Takahashi
    • G01N21/47G01J1/18G01N21/55G03G15/00G03G21/00
    • G03G15/5058G03G15/5041G03G2215/0164
    • When a regular reflection light receiving unit is receiving a reflected light in a non-image area where the test patches are not formed, a clamp switch is closed. Then, a first reference voltage generated by a pull-up resistor and a zener diode is corresponded to an electric potential of a terminal of a capacitor on the side of an A/D converter. The capacitor is charged by the difference in electric potential between the first reference voltage and an output voltage from the regular reflection light receiving unit. Next, the clamp switch is opened. After the regular reflection light receiving unit receives the reflected light from an image area where the test patches are formed with this state of things, the output voltage from the regular reflection light receiving unit is changed. The difference in density between the image area and the non-image area can be quantified by the A/D converter.
    • 当正反射光接收单元在未形成测试片的非图像区域中接收到反射光时,闭合开关。 然后,由上拉电阻和齐纳二极管产生的第一参考电压对应于A / D转换器一侧的电容器的端子的电位。 电容器由第一参考电压和来自正反射光接收单元的输出电压之间的电位差来充电。 接下来,夹紧开关打开。 在正常反射光接收单元接收到来自具有这种状态的测试贴片的图像区域的反射光之后,来自正反射光接收单元的输出电压被改变。 图像区域和非图像区域之间的密度差可以通过A / D转换器来量化。
    • 108. 发明申请
    • Systems and methods for operating logic circuits
    • 用于操作逻辑电路的系统和方法
    • US20050162186A1
    • 2005-07-28
    • US10764179
    • 2004-01-23
    • Hiroaki MurakamiOsamu TakahashiJieming Qi
    • Hiroaki MurakamiOsamu TakahashiJieming Qi
    • G05B19/05H03K19/00H03K19/173H03K19/20
    • H03K19/1737H03K19/0016
    • Systems and methods for reducing the power consumption of some combinations of logic gates by reducing the number of unnecessary transitions that are made by logic gates that do not affect the output of the logic. In one embodiment, a modified exclusive-OR (XOR) gate is coupled to a modified multiplexer. The XOR gate has two inputs, Ain, and Bin, and an output, XORout, which is provided as an input to the multiplexer. Another input to the multiplexer is Cin. A select signal is input to the multiplexer to select either Cin or XORout to be provided at the output of the multiplexer. If XORout is selected, the XOR gate operates in a first mode in which it functions as a normal XOR gate. If Cin is selected, the XOR gate operates in a second mode in which the XOR gate uses less power than when the XOR gate operates normally.
    • 通过减少不影响逻辑输出的逻辑门进行的不必要的转换次数来减少逻辑门的某些组合的功耗的系统和方法。 在一个实施例中,修改的异或(XOR)门耦合到修改的多路复用器。 异或门具有两个输入:中的A 中的B ,输出XOR 输出,作为输入 复用器。 复用器的另一个输入是中的C 。 选择信号被输入到多路复用器以选择要在多路复用器的输出处提供的或XOR 输出中的C 。 如果选择XOR ,则异或门以第一模式工作,其中它用作正常的异或门。 如果选择了中的C ,则异或门以第二模式工作,其中XOR门比XOR门正常工作时使用的功率更小。
    • 109. 发明申请
    • Time correction system, time correction instruction device, pointer type timepiece, and time correction method
    • 时间校正系统,时间校正指示装置,指针式时计和时间校正方法
    • US20050105401A1
    • 2005-05-19
    • US10752089
    • 2004-01-07
    • Hidehiro AkahaneOsamu Takahashi
    • Hidehiro AkahaneOsamu Takahashi
    • G04G5/00G04R20/00G04C9/00
    • G04R20/00G04R20/28G04R60/14
    • A time correction system has a timepiece with pointers for displaying the time, and a correction instruction device. The correction instruction device has a timing section for timing reference time data, a time input section for inputting pointed time data corresponding to the time indicated by the pointers, a comparison section for comparing the reference time data and the pointed time data, and a communication section for outputting a correction instruction signal based on the results of this comparison to the pointer type timepiece. The pointer type timepiece has an external signal detection circuit for receiving the correction instruction signal, a drive control section for controlling the driving of the pointers, and a time correction control circuit for matching the readings of the pointers with the reference time data based on the received correction instruction signal.
    • 时间校正系统具有用于显示时间的指针的钟表和校正指示装置。 校正指示装置具有用于定时基准时间数据的定时部分,用于输入与指针所指示的时间相对应的指向时间数据的时间输入部分,用于比较参考时间数据和指示时间数据的比较部分,以及通信 部分,用于基于与指针型时计的该比较的结果输出校正指令信号。 指针式时计具有用于接收校正指示信号的外部信号检测电路,用于控制指针的驱动的驱动控制部,以及基于时钟校正控制电路,用于将指针的读数与基准时间数据进行匹配 接收到校正指令信号。