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101. 发明授权

US5943111A Layered superlattice ferroelectric liquid crystal display 失效
标题翻译：分层超晶格铁电液晶显示器
公开(公告)号：US5943111A
公开(公告)日：1999-08-24
申请号：US94086
申请日：1998-06-09
申请人： Larry D. McMillan
发明人： Larry D. McMillan
IPC分类号： G02F1/136 , G02F1/13357 , G09F9/30 , H01J9/02 , H01J29/04 , H01J31/12 , C09K19/02
CPC分类号： G02F1/133603
摘要： A thin film of ferroelectric layered superlattice material in a flat panel display device is energized to selectively influence the display image. In one embodiment, a voltage pulse causes the layered superlattice material to emit electrons that impinge upon a phosphor, causing the phosphor to emit light. In another embodiment, an electric potential creates a remanent polarization in the layered superlattice material, which exerts an electric field in liquid crystal layer, thereby influencing the transmissivity of light through the liquid crystal. The layered superlattice material is a metal oxide formed using a special liquid precursor containing an alkoxycarboxylate. The thin film of layered superlattice material is formed using a spin-on technique and low-temperature heat treating. The thin film thickness is preferably in the range 500-1400 .ANG. so that polarizability and transparency of the thin film is enhanced.
摘要翻译：平板显示装置中的铁电层状超晶格材料薄膜被通电以选择性地影响显示图像。在一个实施例中，电压脉冲使得层状超晶格材料发射撞击磷光体的电子，导致磷光体发光。在另一个实施例中，电位在层状超晶格材料中产生剩余极化，其在液晶层中施加电场，从而影响透过液晶的透射率。层状超晶格材料是使用含有烷氧基羧酸盐的特殊液体前体形成的金属氧化物。使用旋涂技术和低温热处理形成层状超晶格材料的薄膜。薄膜厚度优选在500-1400范围内，从而提高了薄膜的极化率和透明度。

102. 发明授权

US5466629A Process for fabricating ferroelectric integrated circuit 失效
标题翻译：铁电集成电路制造工艺
公开(公告)号：US5466629A
公开(公告)日：1995-11-14
申请号：US383575
申请日：1995-02-03
申请人： Takashi Mihara , Hiroyuki Yoshimori , Hitoshi Watanabe , Larry D. McMillan , Carlos P. De Araujo
发明人： Takashi Mihara , Hiroyuki Yoshimori , Hitoshi Watanabe , Larry D. McMillan , Carlos P. De Araujo
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L21/70 , H01L27/00
CPC分类号： H01L27/10852 , H01L27/10808 , H01L28/60 , H01L28/55
摘要： An oversize ferroelectric capacitor is located against the contact hole to the MOSFET source/drain in a DRAM. A barrier layer made of titanium nitride, titanium tungsten, tantalum, titanium, tungsten, molybdenum, chromium, indium tin oxide, tin dioxide, ruthenium oxide, silicon, silicide, or polycide lies between the ferroelectric layer and the source drain. The barrier layer may act as the bottom electrode of the ferroelectric capacitor, or a separate bottom electrode made of platinum may be used. In another embodiment in which the barrier layer forms the bottom electrode, an oxide layer less than 5 nm thick is located between the barrier layer and the ferroelectric layer and the barrier layer is made of silicon, silicide, or polycide. A thin silicide layer forms and ohmic contact between the barrier layer and the source/drain. The capacitor and the barrier layer are patterned in a single mask step. The ends of the capacitor are stepped or tapered. In another embodiment both the bottom and top electrode may be made of silicon, silicide, polycide or a conductive oxide, such as indium tin oxide, tin dioxide, or ruthenium oxide.
摘要翻译：超大型铁电电容器位于DRAM中的MOSFET源极/漏极的接触孔处。在铁电层和源极漏极之间，由氮化钛，钛钨，钽，钛，钨，钼，铬，氧化铟锡，二氧化锡，氧化钌，硅，硅化物或多晶硅化物形成的阻挡层。阻挡层可以用作铁电电容器的底部电极，或者可以使用由铂制成的单独的底部电极。在其中阻挡层形成底部电极的另一个实施例中，小于5nm厚的氧化物层位于势垒层和铁电层之间，阻挡层由硅，硅化物或多硅化物制成。薄的硅化物层在阻挡层和源极/漏极之间形成欧姆接触。在单个掩模步骤中对电容器和阻挡层进行图案化。电容器的端部是阶梯式或锥形的。在另一个实施例中，底部和顶部电极可以由硅，硅化物，多晶硅或导电氧化物，例如氧化铟锡，二氧化锡或氧化钌制成。

103. 发明授权

US4279947A Deposition of silicon nitride 失效
标题翻译：沉积氮化硅
公开(公告)号：US4279947A
公开(公告)日：1981-07-21
申请号：US23568
申请日：1979-03-26
申请人： Jon C. Goldman , Larry D. McMillan , James B. Price
发明人： Jon C. Goldman , Larry D. McMillan , James B. Price
IPC分类号： C23C16/34 , C23C11/14
CPC分类号： C23C16/345
摘要： Silicon nitride is pyrolytically deposited by the reaction of a halosilane with ammonia in an evacuated system. The process is particularly useful in providing uniform layers of silicon nitride on silicon wafers to be used in the fabrication of semiconductor devices.
摘要翻译：在真空系统中氮化硅通过卤代硅烷与氨的反应被热解沉积。该工艺在用于制造半导体器件的硅晶片上提供均匀的氮化硅层是特别有用的。

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