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    • 91. 发明授权
    • Amplifier apparatus
    • 放大器装置
    • US09036836B2
    • 2015-05-19
    • US13701554
    • 2011-06-16
    • Mingxue ZhangSeigo OzakiTsuyoshi Haga
    • Mingxue ZhangSeigo OzakiTsuyoshi Haga
    • H03F99/00H03F3/38H03F3/20H03F3/217
    • H03F3/183H03F1/0233H03F1/26H03F3/20H03F3/217H03F3/2173H03F2200/03H03F2200/351
    • Disclosed is a technique for reducing noise superimposed on an output signal while keeping loop gain constant without increasing the circuit scale and without changing the transfer function of the amplifier apparatus (frequency characteristics of gain and phase). According to the technique, there are included a power-supply voltage control unit 7 for detecting the amplitude level S9 of an input audio signal S1 and outputting power with a voltage value indicated by target set voltage value information Vs corresponding to this amplitude level S9, and a PWM modulation unit 2 including a PWM converter 23 for converting the pulse width of the input audio signal S1 and a correction unit for correcting the signal modulated by the PWM converter 23. The PWM modulation unit 2 corrects the pulse width of a PWM signal S5 modulated by the PWM converter 23 so that the correction unit will cancel out a change in amplification gain of a power amplification unit 4 according to the target set voltage value information Vs.
    • 公开了一种降低叠加在输出信号上的噪声的技术,同时保持环路增益恒定,而不增加电路规模,并且不改变放大器装置的传递函数(增益和相位的频率特性)。 根据该技术,包括电源电压控制单元7,用于检测输入音频信号S1的振幅电平S9,并输出具有与该振幅电平S9对应的目标设定电压值信息Vs表示的电压值的电力, 以及PWM调制单元2,其包括用于转换输入音频信号S1的脉冲宽度的PWM转换器23和用于校正由PWM转换器23调制的信号的校正单元。PWM调制单元2校正PWM信号的脉冲宽度 S5调制,使得校正单元将根据目标设定电压值信息Vs抵消功率放大单元4的放大增益的变化。
    • 93. 发明申请
    • Noise and Cross-Talk Attenuation in an Audio System by Offsetting Outputs in Phase
    • 音频系统中的噪声和串扰衰减通过在相位上偏移输出
    • US20150063593A1
    • 2015-03-05
    • US14490459
    • 2014-09-18
    • Douglas E. HeinemanMark A. Alexander
    • Douglas E. HeinemanMark A. Alexander
    • H03G3/30H03G1/04
    • H03G3/3026H03F1/26H03F3/185H03F3/189H03F3/2173H03F3/45H03F3/45179H03F2200/03H03G1/04H03K5/003
    • An amplifier may include two or more pulse-width modulators (PWMs) controlling respective sets of switches to produce an amplified version of a source signal. The clocking for the amplifier may be controlled to delay signal processing within the PWMs relative to one another in time, thereby providing an effective time offset between the absolute moment in time of the edge transition of the controlling signals to the respective sets of switches. The PWMs may include a decrementor that counts down to zero from the next PWM duty-cycle value when a new data sample is detected, beginning a new count when the next sample is present. The PWM output may correspond to the counter value, outputting a pulse when the counter value is nonzero. A “data-sample-ready” signal may be decoded from a master counter, which may be clocked based on the high speed PWM clock, and the delay mechanism may be based on adjusting the decode value to determine when the PWM should initialize to the next data sample.
    • 放大器可以包括两个或更多个脉冲宽度调制器(PWM),其控制各组开关以产生源信号的放大版本。 可以控制放大器的时钟,以在时间上相对于彼此延迟PWM内的信号处理,从而在控制信号的边沿转换到相应的开关组之间的绝对时刻之间提供有效的时间偏移。 当检测到新的数据样本时,PWM可以包括从下一个PWM占空比值向下递减到零的递减器,当存在下一个采样时,开始新的计数。 PWM输出可对应于计数器值,当计数器值不为零时输出脉冲。 可以从主计数器解码“数据采样就绪”信号,该主计数器可以基于高速PWM时钟来计时,并且延迟机制可以基于调整解码值来确定PWM何时应该初始化为 下一个数据样本。