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    • 95. 发明申请
    • Method of depositing a metal seed layer on semiconductor substrates
    • 在半导体衬底上沉积金属种子层的方法
    • US20050085068A1
    • 2005-04-21
    • US10981319
    • 2004-11-03
    • Tony ChiangGongda YaoPeijun DingFusen ChenBarry ChinGene KoharaZheng XuHong Zhang
    • Tony ChiangGongda YaoPeijun DingFusen ChenBarry ChinGene KoharaZheng XuHong Zhang
    • H01L21/285H01L21/768H01L21/4763
    • H01L21/76843C23C14/046C23C14/165H01L21/2855H01L21/76805H01L21/76844H01L21/76846H01L21/76862H01L21/76865H01L21/76871H01L21/76877H01L21/76879H01L21/76883
    • We disclose a method of applying a sculptured layer of material on a semiconductor feature surface using ion deposition sputtering, wherein a surface onto which the sculptured layer is applied is protected to resist erosion and contamination by impacting ions of a depositing layer, said method comprising the steps of a) applying a first portion of a sculptured layer with sufficiently low substrate bias that a surface onto which said sculptured layer is applied is not eroded away or contaminated in an amount which is harmful to said semiconductor device performance or longevity; and b) applying a subsequent portion of said sculptured layer with sufficiently high substrate bias to sculpture a shape from said the first portion, while depositing additional layer material. The method is particularly applicable to the sculpturing of barrier layers, wetting layers, and conductive layers upon semiconductor feature surfaces and is especially helpful when the conductive layer is copper. In the application of a barrier layer, a first portion of barrier layer material is deposited on the substrate surface using standard sputtering techniques or using an ion deposition plasma, but in combination with sufficiently low substrate bias voltage (including at no applied substrate voltage) that the surfaces impacted by ions are not sputtered in an amount which is harmful to device performance or longevity. Subsequently, a second portion of barrier material is applied using ion deposition sputtering at increased substrate bias voltage which causes resputtering (sculpturing) of the first portion of barrier layer material, while enabling a more anisotropic deposition of newly depositing material. A conductive material, and particularly a copper seed layer applied to the feature may be accomplished using the same sculpturing technique as that described above with reference to the barrier layer.
    • 我们公开了使用离子沉积溅射在半导体特征表面上施加雕刻层的材料的方法,其中施加有雕刻层的表面被保护以通过冲击沉积层的离子来抵抗侵蚀和污染,所述方法包括 步骤:a)以足够低的衬底偏压施加雕刻层的第一部分,使得施加所述雕刻层的表面不会以对所述半导体器件的性能或寿命有害的量被腐蚀掉或污染; 以及b)将所述雕刻层的后续部分施加足够高的衬底偏压,以从所述第一部分雕刻形状,同时沉积附加层材料。 该方法特别适用于在半导体特征表面上雕刻阻挡层,润湿层和导电层,并且当导电层是铜时尤其有用。 在施加阻挡层时,使用标准溅射技术或使用离子沉积等离子体将阻挡层材料的第一部分沉积在衬底表面上,但是与足够低的衬底偏置电压(包括没有施加的衬底电压)组合, 受离子影响的表面不会以对器件性能或寿命有害的量溅射。 随后,使用离子沉积溅射在增加的衬底偏置电压下施加阻挡材料的第二部分,这导致阻挡层材料的第一部分的再溅射(雕刻),同时能够进行更多的各向异性沉积新沉积的材料。 应用于特征的导电材料,特别是铜种子层可以使用与上述参考阻挡层所述相同的雕刻技术来实现。
    • 96. 发明申请
    • Semiconductor device having void free contact and method for fabricating the contact
    • 具有无空隙接触的半导体器件和用于制造接触的方法
    • US20050014358A1
    • 2005-01-20
    • US10893618
    • 2004-07-15
    • Bi-O Lim
    • Bi-O Lim
    • H01L21/28H01L21/4763H01L21/768
    • H01L21/76843H01L21/76862H01L21/76871H01L21/76877H01L2221/1089
    • The present invention relates to a semiconductor device and a method for fabricating a contact of the semiconductor device, and in particular, to the method for fabricating a semiconductor contact of the device for electrically coupling upper and lower metal wires or coupling an electrode and a metal wire and a method for fabricating the contact. The method comprises forming an interlayer insulating layer on a semiconductor substrate; forming a contact hole by selectively removing the interlayer insulating layer; forming a barrier metal layer on a surface of the interlayer insulating layer; increasing roughness of a surface of the interlayer insulating layer at an area around an inlet of the contact hole; forming a contact by filling the contact hole with a conductive material. According to this method, the conductive layer is slowly deposited around the inlet of the contact hole relative to the other areas of the contact hole, such that it is possible to form a void free contact with high aspect ration.
    • 本发明涉及一种用于制造半导体器件的接触的半导体器件和方法,特别涉及用于制造用于电耦合上下金属线或耦合电极和金属的器件的半导体接触的方法 线和用于制造接触的方法。 该方法包括在半导体衬底上形成层间绝缘层; 通过选择性地去除所述层间绝缘层来形成接触孔; 在所述层间绝缘层的表面上形成阻挡金属层; 在接触孔的入口周围的区域增加层间绝缘层的表面的粗糙度; 通过用导电材料填充接触孔来形成接触。 根据该方法,导电层相对于接触孔的其他区域缓慢地沉积在接触孔的入口周围,使得可以形成具有高的纵向比例的无空隙接触。