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91. 发明授权

US09090993B2 Epitaxial substrate comprising a superlattice group and method for manufacturing the epitaxial substrate 有权
标题翻译：包含超晶格组的外延衬底和用于制造外延衬底的方法
公开(公告)号：US09090993B2
公开(公告)日：2015-07-28
申请号：US13570665
申请日：2012-08-09
申请人： Makoto Miyoshi , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
发明人： Makoto Miyoshi , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
IPC分类号： H01L21/02 , C30B29/40 , C30B25/18 , H01L29/15 , C30B29/68 , H01L33/00 , H01L33/04 , H01L33/12 , H01L29/778 , H01L29/872
CPC分类号： C30B29/403 , C30B25/18 , C30B25/183 , C30B29/68 , H01L21/02381 , H01L21/02458 , H01L21/02507 , H01L21/0254 , H01L29/155 , H01L29/7786 , H01L29/872 , H01L33/007 , H01L33/04 , H01L33/12
摘要： Provided is a crack-free epitaxial substrate with reduced warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes a (111) single crystal Si substrate, a superlattice layer group in which a plurality of superlattice layers are laminated, and a crystal layer. The superlattice layer is formed of a first unit layer and a second unit layer made of group-III nitrides having different compositions being alternately and repeatedly laminated. The crystal layer is made of a group-III nitride and formed above the base substrate so as to be positioned at an upper side of the superlattice layer group relative to the base substrate. The superlattice layer group has a compressive strain contained therein. In the superlattice layer group, the more distant the superlattice layer is from the base substrate, the greater the compressive strain becomes.
摘要翻译：提供了一种具有减小翘曲的无裂纹外延衬底，其中硅衬底用作基底衬底。外延衬底包括（111）单晶Si衬底，层叠有多个超晶格层的超晶格层组和晶体层。超晶格层由第一单位层和由具有不同组成的III-III族氮化物制成的第二单元层交替地和重复地层叠形成。晶体层由III族氮化物制成，并且形成在基底基板上方，以便相对于基底衬底位于超晶格层组的上侧。超晶格层组中含有压应变。在超晶格层组中，超晶格层离基底越远，压应变越大。

92. 发明授权

US08853828B2 Epitaxial substrate for semiconductor device, method for manufacturing epitaxial substrate for semiconductor device, and semiconductor device 有权
标题翻译：用于半导体器件的外延衬底，用于制造用于半导体器件的外延衬底的方法和半导体器件
公开(公告)号：US08853828B2
公开(公告)日：2014-10-07
申请号：US13353759
申请日：2012-01-19
申请人： Shigeaki Sumiya , Makoto Miyoshi , Tomohiko Sugiyama , Mikiya Ichimura , Yoshitaka Kuraoka , Mitsuhiro Tanaka
发明人： Shigeaki Sumiya , Makoto Miyoshi , Tomohiko Sugiyama , Mikiya Ichimura , Yoshitaka Kuraoka , Mitsuhiro Tanaka
IPC分类号： H01L29/20 , H01L21/02 , C30B29/40 , C30B25/18 , H01L29/872 , H01L29/778
CPC分类号： H01L21/0254 , C30B25/18 , C30B25/183 , C30B29/403 , H01L21/02381 , H01L21/02458 , H01L21/02488 , H01L21/02494 , H01L21/02502 , H01L21/0262 , H01L29/2003 , H01L29/7786 , H01L29/872
摘要： An epitaxial substrate, in which a group of group-III nitride layers is formed on a single-crystal silicon substrate so that a crystal plane is approximately parallel to a substrate surface, comprises: a first group-III nitride layer formed of AlN on the base substrate; a second group-III nitride layer formed of InxxAlyyGazzN (xx+yy+zz=1, 0≦xx≦1, 0
摘要翻译：在单晶硅衬底上形成一组III族氮化物层，使得晶面大致平行于衬底表面的外延衬底包括：由第一III族氮化物层形成的第一III族氮化物层基底; 在第一III族氮化物层上由InxxAlyyGazzN（xx + yy + zz = 1,0,0

93. 发明授权

US08598626B2 Epitaxial substrate for semiconductor device, schottky junction structure, and leakage current suppression method for schottky junction structure 有权
标题翻译：用于半导体器件的外延衬底，肖特基结结构和用于肖特基结结构的漏电流抑制方法
公开(公告)号：US08598626B2
公开(公告)日：2013-12-03
申请号：US12853685
申请日：2010-08-10
申请人： Makoto Miyoshi , Yoshitaka Kuraoka , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
发明人： Makoto Miyoshi , Yoshitaka Kuraoka , Shigeaki Sumiya , Mikiya Ichimura , Tomohiko Sugiyama , Mitsuhiro Tanaka
IPC分类号： H01L29/778
CPC分类号： H01L29/7787 , H01L21/0237 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L29/045 , H01L29/2003 , H01L29/66462
摘要： Provided is an epitaxial substrate for semiconductor device that is capable of achieving a semiconductor device having high reliability in reverse characteristics of schottky junction. An epitaxial substrate for semiconductor device obtained by forming, on a base substrate, a group of group III nitride layers by lamination such that a (0001) crystal plane of each layer is approximately parallel to a substrate surface includes: a channel layer formed of a first group III nitride having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1, z1>0); and a barrier layer formed of a second group III nitride having a composition of Inx2Aly2N (x2+y2=1, x2>0, y2>0), wherein the second group III nitride is a short-range-ordered mixed crystal having a short-range order parameter α satisfying a range where 0≦α≦1.
摘要翻译：本发明提供一种能够实现肖特基结的反向特性的高可靠性的半导体装置的半导体装置用外延基板。一种用于半导体器件的外延衬底，其通过在基底衬底上通过层叠形成III族氮化物层，使得每个层的（0001）晶面大致平行于衬底表面而形成，其包括：沟道层，其由具有Inx1Aly1Gaz1N（x1 + y1 + z1 = 1，z1> 0）的组成的第一III族氮化物; 和由具有Inx2Aly2N（x2 + y2 = 1，x2> 0，y2> 0）的组成的第二III族氮化物形成的阻挡层，其中第二III族氮化物是短距离有序混合晶体满足0 @α@ 1范围的 - 序列参数α。

94. 发明申请

US20120211765A1 EPITAXIAL SUBSTRATE FOR SEMICONDUCTOR ELEMENT, SEMICONDUCTOR ELEMENT, AND METHOD FOR PRODUCING EPITAXIAL SUBSTRATE FOR SEMICONDUCTOR ELEMENT 有权
标题翻译：用于半导体元件的外延衬底，半导体元件和用于生产半导体元件的外延衬底的方法
公开(公告)号：US20120211765A1
公开(公告)日：2012-08-23
申请号：US13457931
申请日：2012-04-27
申请人： Makoto MIYOSHI , Shigeaki Sumiya , Mikiya Ichimura , Mitsuhiro Tanaka
发明人： Makoto MIYOSHI , Shigeaki Sumiya , Mikiya Ichimura , Mitsuhiro Tanaka
IPC分类号： H01L29/20 , H01L21/20
CPC分类号： H01L21/02381 , C23C16/0272 , C23C16/029 , C23C16/303 , C30B25/02 , C30B29/403 , C30B29/68 , H01L21/0237 , H01L21/02458 , H01L21/02494 , H01L21/02505 , H01L21/02507 , H01L21/0251 , H01L21/0254 , H01L29/1075 , H01L29/2003 , H01L29/7786 , H01L29/872
摘要： Provided is an epitaxial substrate using a silicon substrate as a base substrate. An epitaxial substrate, in which a group of group-III nitride layers are formed on a (111) single crystal Si substrate such that a (0001) crystal plane of the group of group-III nitride layers is substantially in parallel with a surface of the substrate, includes: a first group-III nitride layer made of AlN with many defects configured of at least one kind from a columnar or granular crystal or domain; a second group-III nitride layer whose interface with the first group-III nitride layer is shaped into a three-dimensional concave-convex surface; and a third group-III nitride layer epitaxially formed on the second group-III nitride layer as a graded composition layer in which the proportion of existence of Al is smaller in a portion closer to a fourth group-III nitride.
摘要翻译：提供了使用硅衬底作为基底的外延衬底。一种外延衬底，其中在（111）单晶Si衬底上形成一组III族氮化物层，使得III族氮化物层组的（0001）晶面基本上平行于所述基板包括：由AlN制成的第一III族氮化物层，其具有由柱状或粒状晶体或畴中至少一种构成的许多缺陷; 与第一III族氮化物层的界面成形为三维凹凸面的第二III族氮化物层; 以及外延形成在第二III族氮化物层上的第三III族氮化物层，作为梯度组成层，其中Al的存在比例在更接近第四族III族氮化物的部分中较小。

95. 发明授权

US07982241B2 Epitaxial substrate, semiconductor device substrate, and HEMT device 有权
标题翻译：外延衬底，半导体器件衬底和HEMT器件
公开(公告)号：US07982241B2
公开(公告)日：2011-07-19
申请号：US12535859
申请日：2009-08-05
申请人： Yoshitaka Kuraoka , Makoto Miyoshi , Shigeaki Sumiya , Mitsuhiro Tanaka
发明人： Yoshitaka Kuraoka , Makoto Miyoshi , Shigeaki Sumiya , Mitsuhiro Tanaka
IPC分类号： H01L29/24 , H01L29/778
CPC分类号： H01L29/66462 , H01L21/02378 , H01L21/02458 , H01L21/02513 , H01L21/0254 , H01L29/1608 , H01L29/2003 , H01L29/267 , H01L29/7787
摘要： A buffer layer formed of Inx1Aly1Gaz1N formed on a base, with an upper part of the buffer layer containing columnar polycrystalline including a grain boundary existing in a direction substantially perpendicular to a surface of the base. The number of grain boundaries in the lower part of the buffer layer is greater than that in the upper part, and a full width at half maximum of an X-ray rocking curve of the upper part is 300-3000 seconds, RMS of the surface of the buffer layer is 0.2 nm-6 nm, and the ratio of the grain boundary width of the crystal grain of the upper part in a direction parallel to the base surface to the formation thickness of the buffer layer is 0.5-1.5.
摘要翻译：由Inx1Aly1Gaz1N形成的缓冲层，其形成在基底上，缓冲层的上部包含柱状多晶，其中包含沿基本上垂直于基底表面的方向存在的晶界。缓冲层下部的晶粒数大于上部的晶界数，上部的X射线摇摆曲线的半峰全宽为300〜3000秒，表面的RMS为的缓冲层的面积的比例为0.2nm〜6nm，上部晶粒的与晶面平行的方向的晶界宽度与缓冲层的形成厚度的比率为0.5〜1.5。

96. 发明申请

US20110024795A1 EPITAXIAL SUBSTRATE FOR SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND PROCESS FOR PRODUCING EPITAXIAL SUBSTRATE FOR SEMICONDUCTOR DEVICE 有权
标题翻译：用于半导体器件的外延衬底，半导体器件和用于生产用于半导体器件的外延衬底的工艺
公开(公告)号：US20110024795A1
公开(公告)日：2011-02-03
申请号：US12884560
申请日：2010-09-17
申请人： Makoto Miyoshi , Yoshitaka Kuraoka , Shigeaki Sumiya , Mitsuhiro Tanaka
发明人： Makoto Miyoshi , Yoshitaka Kuraoka , Shigeaki Sumiya , Mitsuhiro Tanaka
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/2003 , C23C16/303 , H01L21/0237 , H01L21/02378 , H01L21/02433 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L29/201 , H01L29/66462 , H01L29/778 , H01L29/7786
摘要： Provided is an epitaxial substrate capable of manufacturing a HEMT device that has excellent two-dimensional electron gas characteristics and is capable of performing normally-off operation. A channel layer is formed of a first group III nitride represented by Inx1Aly1Gaz1N (x1+y1+z1=1) so as to have a composition in a range determined by x1=0 and 0≦y1≦0.3. A barrier layer is formed of a second group III nitride represented by Inx2Aly2Gaz2N (x2+y2+z2=1) so as to have a composition, in a ternary phase diagram with InN, AlN and GaN being vertices, in a range surrounded by four straight lines determined in accordance with the composition (AlN molar fraction) of the first group III nitride and to have a thickness of 5 nm or less.
摘要翻译：提供了能够制造具有优异的二维电子气特性并且能够执行常关操作的HEMT器件的外延衬底。沟道层由Inx1Aly1Gaz1N（x1 + y1 + z1 = 1）表示的第一III族氮化物形成，以使得其组成在由x1 = 0和0＆lt; 1lE; y1＆nlE; 0.3确定的范围内。阻挡层由Inx2Aly2Gaz2N（x2 + y2 + z2 = 1）表示的第二III族氮化物形成，以具有以InN，AlN和GaN为顶点的三元相图中的组成，在四个围绕的范围内根据第一III族氮化物的组成（AlN摩尔分数）确定并且具有5nm或更小的厚度的直线。

97. 发明授权

US07825417B2 Epitaxial wafers, method for manufacturing of epitaxial wafers, method of suppressing bowing of these epitaxial wafers and semiconductor multilayer structures using these epitaxial wafers 有权
标题翻译：外延晶片，外延晶片的制造方法，使用这些外延晶片抑制这些外延晶片的弯曲的方法和半导体多层结构
公开(公告)号：US07825417B2
公开(公告)日：2010-11-02
申请号：US12193811
申请日：2008-08-19
申请人： Masahiro Sakai , Mitsuhiro Tanaka , Takashi Egawa
发明人： Masahiro Sakai , Mitsuhiro Tanaka , Takashi Egawa
IPC分类号： H01L27/15 , H01L21/00
CPC分类号： C30B29/403 , C30B25/20 , H01L21/0237 , H01L21/0242 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/02661 , Y10T428/24942
摘要： A technique for suppressing the bowing of an epitaxial wafer is provided. The epitaxial wafer is prepared by successively epitaxially growing a target group III-nitride layer, an interlayer and another group III-nitride layer on a substrate with a buffer layer. The interlayer is mainly composed of a mixed crystal of GaN and InN expressed in a general formula (GaxIny)N (0≦x≦1, 0≦y≦1, x+y=1) (or a crystal of GaN), and does not contain Al. The interlayer is epitaxially formed at a lower growth temperature than those of the group III-nitride layers, more specifically at a temperature in a range of at least 350° C. to not more than 1000° C.
摘要翻译：提供了抑制外延晶片弯曲的技术。通过在具有缓冲层的衬底上连续外延生长目标III族氮化物层，中间层和另一III族氮化物层来制备外延晶片。中间层主要由通式（GaxIny）N（0＆nlE; x＆nlE; 1,0

98. 发明申请

US20100051961A1 EPITAXIAL SUBSTRATE, SEMICONDUCTOR DEVICE SUBSTRATE, AND HEMT DEVICE 有权
标题翻译：外延衬底，半导体器件衬底和HEMT器件
公开(公告)号：US20100051961A1
公开(公告)日：2010-03-04
申请号：US12535859
申请日：2009-08-05
申请人： Yoshitaka Kuraoka , Makoto Miyoshi , Shigeaki Sumiya , Mitsuhiro Tanaka
发明人： Yoshitaka Kuraoka , Makoto Miyoshi , Shigeaki Sumiya , Mitsuhiro Tanaka
IPC分类号： H01L29/778 , H01L29/24
CPC分类号： H01L29/66462 , H01L21/02378 , H01L21/02458 , H01L21/02513 , H01L21/0254 , H01L29/1608 , H01L29/2003 , H01L29/267 , H01L29/7787
摘要： A buffer layer formed of Inx1Aly1Gaz1N formed on a base, with an upper part of the buffer layer containing columnar polycrystalline including a grain boundary existing in a direction substantially perpendicular to a surface of the base. The number of grain boundaries in the lower part of the buffer layer is greater than that in the upper part, and a full width at half maximum of an X-ray rocking curve of the upper part is 300-3000 seconds, RMS of the surface of the buffer layer is 0.2 nm-6 nm, and the ratio of the grain boundary width of the crystal grain of the upper part in a direction parallel to the base surface to the formation thickness of the buffer layer is 0.5-1.5.
摘要翻译：由Inx1Aly1Gaz1N形成的缓冲层，其形成在基底上，缓冲层的上部包含柱状多晶，其中包含沿基本上垂直于基底表面的方向存在的晶界。缓冲层下部的晶粒数大于上部的晶界数，上部的X射线摇摆曲线的半峰全宽为300〜3000秒，表面的RMS为的缓冲层的面积的比例为0.2nm〜6nm，上部晶粒的与晶面平行的方向的晶界宽度与缓冲层的形成厚度的比率为0.5〜1.5。

99. 发明授权

US06824935B2 Substrate having colored layers and method for producing the same 有权
标题翻译：具有着色层的基板及其制造方法
公开(公告)号：US06824935B2
公开(公告)日：2004-11-30
申请号：US10246461
申请日：2002-09-19
申请人： Mitsuhiro Tanaka , Yoshihide Koyama , Kazuya Yoshimura
发明人： Mitsuhiro Tanaka , Yoshihide Koyama , Kazuya Yoshimura
IPC分类号： G02F11335
CPC分类号： G02F1/133514 , G02F1/133555 , Y10T428/1086
摘要： The substrate having colored layers of the present invention includes: a substrate; a reflection layer formed on the substrate; and colored layers of different colors formed on the reflection layer and including a plurality of pixel regions, wherein each of the plurality of pixel regions includes a plurality of colorless regions that are substantially colorless.
摘要翻译：具有本发明的着色层的基板包括：基板; 形成在基板上的反射层; 以及形成在反射层上并且包括多个像素区域的不同颜色的着色层，其中多个像素区域中的每一个包括基本上无色的多个无色区域。

100. 发明授权

US06661483B1 Liquid crystal display device 有权
标题翻译：液晶显示装置
公开(公告)号：US06661483B1
公开(公告)日：2003-12-09
申请号：US09620731
申请日：2000-07-20
申请人： Hiroyuki Moriwaki , Mitsuhiro Tanaka
发明人： Hiroyuki Moriwaki , Mitsuhiro Tanaka
IPC分类号： G02F11335
CPC分类号： G02F1/13363 , G02F1/1397 , G02F2001/133638 , G02F2203/02 , G02F2413/02 , G02F2413/08 , G02F2413/10
摘要： An object of the invention is to prevent color shifting which occurs in a liquid crystal display device in a white display state as well as in a black display state. The liquid crystal display device includes a single polarization layer, a single phase retardation layer, a reflective layer, and a liquid crystal layer, and produces a display by utilizing light reflected from the reflective layer. Based on the wavelength &lgr; of incident light, the retardation value ReF of the phase retardation layer is set approximately equal to (1/4+K/2) &lgr;, and the retardation value ReL of the liquid crystal layer is set approximately equal to (1/2+L/2)&lgr; (K=0, 1, 2, . . . : L=0, 1, 2, . . . ). The angle &Dgr;&phgr; that the absorption axis of the polarization layer makes with the retardation axis of the phase retardation layer is set as 0°
摘要翻译：本发明的目的是防止在白色显示状态以及黑色显示状态下在液晶显示装置中发生的颜色偏移。液晶显示装置包括单极化层，单相位延迟层，反射层和液晶层，并且通过利用从反射层反射的光产生显示。基于入射光的波长λ，将相位延迟层的延迟值ReF设定为近似等于（1/4 + K / 2）λ，将液晶层的延迟值ReL设定为近似等于（ 1/2 + L / 2）λ（K = 0,1,2，...：L = 0,1,2，...）。偏振层的吸收轴与相位延迟层的延迟轴形成的角度Deltaphi设定为0°

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