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    • 93. 发明授权
    • Slice amplifier using FET's
    • 使用FET的片式放大器
    • US4816699A
    • 1989-03-28
    • US094680
    • 1987-10-09
    • Masakazu MoriTetsuo WadaYuji MiyakiKazuo YamaneKazuhiro SuzukiYoshinori Ohkuma
    • Masakazu MoriTetsuo WadaYuji MiyakiKazuo YamaneKazuhiro SuzukiYoshinori Ohkuma
    • H03G11/00H03K5/08H03K19/003
    • H03K5/08H03G11/00H03K19/00384
    • A slice amplifier using field effect transistors (FET's) is provided which is suitable for achieving a correct discrimination of logics "0" and "1" of an input signal (S.sub.in) at very high speed by reshaping the input signal (S.sub.in) into rectangular shaped pulses (S.sub.out). The top and bottom of each pulse are determined to predetermined constant levels by using a first FET (T.sub.1) and a second FET (T.sub.2) with the aid of a first monitor and control unit (41) and second monitor and control unit (42). The first and second monitor and control units (41, 42) monitor the drain voltages of the first and second FET's (T.sub.1, T.sub.2) and control the gate-source voltages thereof, respectively, so as to realize the predetermined constant levels.
    • PCT No.PCT / JP86 / 00639 Sec。 371日期1987年10月9日第 102(e)1987年10月9日PCT PCT 1986年12月17日PCT公布。 第WO87 / 04027号公报 日期1987年7月2日。提供一种使用场效应晶体管(FET)的片式放大器,其适用于通过重新形成对正确鉴别输入信号(Sin)的逻辑“0”和“1” 输入信号(Sin)变成矩形脉冲(Sout)。 借助于第一监视和控制单元(41)和第二监视和控制单元(42),通过使用第一FET(T1)和第二FET(T2)将每个脉冲的顶部和底部确定为预定的恒定电平, 。 第一和第二监视和控制单元(41,42)分别监视第一和第二FET(T1,T2)的漏极电压并分别控制其栅极 - 源极电压,以便实现预定的恒定电平。
    • 95. 发明授权
    • Hierarchical data transmission system
    • 分层数据传输系统
    • US4727541A
    • 1988-02-23
    • US804550
    • 1985-12-04
    • Masakazu MoriTakeo FukushimaNaonobu Fujimoto
    • Masakazu MoriTakeo FukushimaNaonobu Fujimoto
    • H04J3/06H04J3/04H04L5/22
    • H04L5/22H04J3/047
    • A hierarchical data transmission system is comprised, on the transmitter side, of pre-group multiplexers and a main-group multiplexer and, on the receiver side, of a main-group demultiplexer and pre-group demultiplexers. The main-group multiplexer is fabricated as a parallel-serial converting unit, and the main-group demultiplexer is fabricated as a serial-parallel converting unit. Each of the pre-group multiplexers produces a pre-group data train having a sub-data signal which is also utilized for distinguishing one pre-group data train from another. Each of the pre-group demultiplexers is provided with a discriminator operative, by using the sub-data signal, to distinguish one received pre-group data train from another.
    • 分组数据传输系统在发射机侧包括组前多路复用器和主组多路复用器,并且在接收机侧包括主组解复用器和组前解复用器。 主组多路复用器被制造为并行串行转换单元,并且主组解复用器被制造为串行 - 并行转换单元。 每个前置组多路复用器产生具有子数据信号的预组数据序列,该子数据信号也用于区分一组预组数据串与另一组。 每个组前解复用器都具有鉴别器,通过使用子数据信号来区分一个接收到的组前数据序列与另一个。