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91. 发明授权

US09048320B2 Display device including oxide semiconductor layer 有权
标题翻译：显示装置包括氧化物半导体层
公开(公告)号：US09048320B2
公开(公告)日：2015-06-02
申请号：US12556695
申请日：2009-09-10
申请人： Shunpei Yamazaki , Kengo Akimoto , Shigeki Komori , Hideki Uochi , Tomoya Futamura , Takahiro Kasahara
发明人： Shunpei Yamazaki , Kengo Akimoto , Shigeki Komori , Hideki Uochi , Tomoya Futamura , Takahiro Kasahara
IPC分类号： G02F1/1333 , G02F1/136 , H01L29/786 , H01L27/02 , H01L27/12
CPC分类号： H01L29/7869 , H01L27/0266 , H01L27/1225 , H01L27/124
摘要： A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
摘要翻译：保护电路包括非线性元件，其包括栅电极，覆盖栅电极的栅极绝缘层，与栅绝缘层上的栅电极重叠的第一氧化物半导体层，与沟道形成区重叠的沟道保护层的第一氧化物半导体层，以及一对第一布线层和第二布线层，其端部与沟道保护层上的栅电极重叠，并且其中层叠有导电层和第二氧化物半导体层。在栅极绝缘层上，具有不同性质的氧化物半导体层彼此结合，由此可以进行与肖特基结的稳定操作。因此，可以降低结漏电，提高非线性元件的特性。

92. 发明授权

US09006729B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US09006729B2
公开(公告)日：2015-04-14
申请号：US12943558
申请日：2010-11-10
申请人： Kengo Akimoto , Junichiro Sakata , Yoshiaki Oikawa , Shunpei Yamazaki
发明人： Kengo Akimoto , Junichiro Sakata , Yoshiaki Oikawa , Shunpei Yamazaki
IPC分类号： H01L29/10 , H01L29/12 , H01L29/786 , H01L29/45
CPC分类号： H01L29/7869 , H01L29/45
摘要： It is an object to provide a method for manufacturing a highly reliable semiconductor device having a thin film transistor formed using an oxide semiconductor and having stable electric characteristics. The semiconductor device includes an oxide semiconductor film overlapping with a gate electrode with a gate insulating film interposed therebetween; and a source electrode and a drain electrode which are in contact with the oxide semiconductor film. The source electrode and the drain electrode include a mixture, metal compound, or alloy containing one or more of a metal with a low electronegativity such as titanium, magnesium, yttrium, aluminum, tungsten, and molybdenum. The concentration of hydrogen in the source electrode and the drain electrode is 1.2 times, preferably 5 times or more as high as that of hydrogen in the oxide semiconductor film.
摘要翻译：本发明的目的是提供一种用于制造具有使用氧化物半导体形成并且具有稳定的电特性的薄膜晶体管的高度可靠的半导体器件的方法。半导体器件包括与栅电极重叠的氧化物半导体膜，其间插入有栅极绝缘膜; 以及与氧化物半导体膜接触的源电极和漏电极。源电极和漏极包括含有一种或多种具有低电负性的金属如钛，镁，钇，铝，钨和钼的混合物，金属化合物或合金。源电极和漏电极中的氢浓度是氧化物半导体膜中的氢的浓度的1.2倍，优选为5倍以上。

93. 发明授权

US08941114B2 Display device including protective circuit 有权
标题翻译：显示装置包括保护电路
公开(公告)号：US08941114B2
公开(公告)日：2015-01-27
申请号：US12553122
申请日：2009-09-03
申请人： Shunpei Yamazaki , Kengo Akimoto , Shigeki Komori , Hideki Uochi , Tomoya Futamura , Takahiro Kasahara
发明人： Shunpei Yamazaki , Kengo Akimoto , Shigeki Komori , Hideki Uochi , Tomoya Futamura , Takahiro Kasahara
IPC分类号： H01L29/04 , H01L27/12 , G02F1/1368 , H01L29/786 , G02F1/1362
CPC分类号： H01L27/1214 , G02F1/13624 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/66742 , H01L29/7869 , H01L29/78693
摘要： A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.
摘要翻译：保护电路包括非线性元件，其包括栅电极，覆盖栅电极的栅极绝缘层，一对第一和第二布线层，其端部与栅极绝缘层上的栅电极重叠，并且其中层叠第二氧化物半导体层和导电层，以及与至少栅电极重叠并与栅极绝缘层接触的第一氧化物半导体层，导电层的侧面部和顶面部的一部分，以及在第一布线层和第二布线层中的第二氧化物半导体层的侧面部分。在栅极绝缘层上，具有不同性质的氧化物半导体层彼此结合，由此可以进行与肖特基结的稳定操作。因此，可以降低结漏电，提高非线性元件的特性。

94. 发明授权

US08872171B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08872171B2
公开(公告)日：2014-10-28
申请号：US12785664
申请日：2010-05-24
申请人： Shunpei Yamazaki , Kengo Akimoto
发明人： Shunpei Yamazaki , Kengo Akimoto
IPC分类号： H01L29/10
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/24 , H01L29/247 , H01L29/4908 , H01L29/513 , H01L29/78609 , H01L29/78693 , H01L29/78696
摘要： Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.
摘要翻译：包括在电路中的薄膜晶体管的电特性的均匀性和稳定性对于包括所述电路的显示装置的性能至关重要。本发明的目的是提供一种具有低氢含量的氧化物半导体膜，并且其用于具有良好限定的电特性的反交错薄膜晶体管中。为了达到上述目的，栅极绝缘膜，氧化物半导体层和沟道保护膜依次用溅射法形成，而不暴露在空气中。氧化物半导体层形成为在包含一定比例氧气的气氛中限制氢污染。此外，使用硅，氧和/或氮的化合物形成在氧化物半导体层的沟道形成区之上和之下设置的层。

95. 发明授权

US08866144B2 Thin film semiconductor device having silicon nitride film 有权
标题翻译：具有氮化硅膜的薄膜半导体器件
公开(公告)号：US08866144B2
公开(公告)日：2014-10-21
申请号：US12983538
申请日：2011-01-03
申请人： Toru Takayama , Shunpei Yamazaki , Kengo Akimoto
发明人： Toru Takayama , Shunpei Yamazaki , Kengo Akimoto
IPC分类号： H01L29/04 , H01L31/036 , H01L23/48 , H01L23/52 , H01L29/66 , H01L29/49 , H01L27/12 , H01L29/423 , B32B17/06 , C23C14/06 , B32B17/04 , H01L21/318 , H01L21/314 , C23C14/58 , H01L27/13
CPC分类号： H01L21/0217 , B32B17/04 , B32B17/06 , C23C14/0652 , C23C14/5846 , H01L21/02266 , H01L21/3145 , H01L21/3185 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L27/1248 , H01L27/1255 , H01L27/13 , H01L27/3244 , H01L27/3248 , H01L27/3297 , H01L29/42384 , H01L29/4908 , H01L29/518 , H01L29/66757 , H01L2224/16225 , H01L2924/181 , H01L2924/00012
摘要： An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 μm in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.
摘要翻译：本发明的目的是将适合作为栅极绝缘膜和保护膜的固化和高质量的绝缘膜应用于在应变点或更低的温度下在玻璃基板上形成绝缘膜的技术，以及通过使用它实现高效率和高可靠性的半导体器件。在本发明的半导体器件中，通过氧化硅膜在晶体半导体膜上形成沟道长度为0.35〜2.5μm的场效应晶体管的栅极绝缘膜，其中，硅氮化物膜含有浓度为1×1021 / cm3以下的氢，相对于含有7.13％的氟化氢铵（NH4HF2）和氟化铵（NH4HF2）的混合溶液，蚀刻速率为10nm /分钟以下的特性 NH4F）为15.4％。

96. 发明授权

US08841662B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08841662B2
公开(公告)日：2014-09-23
申请号：US12917548
申请日：2010-11-02
申请人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
发明人： Shunpei Yamazaki , Suzunosuke Hiraishi , Kengo Akimoto , Junichiro Sakata
IPC分类号： H01L29/786 , H01L27/12
CPC分类号： H01L29/66969 , H01L21/02164 , H01L21/02178 , H01L21/02565 , H01L21/02631 , H01L27/1225 , H01L29/7869
摘要： An object is, in a thin film transistor including an oxide semiconductor layer, to reduce contact resistance between the oxide semiconductor layer and source and drain electrode layers electrically connected to the oxide semiconductor layer. The source and drain electrode layers have a stacked-layer structure of two or more layers in which a layer in contact with the oxide semiconductor layer is formed using a metal whose work function is lower than the work function of the oxide semiconductor layer or an alloy containing such a metal. Layers other than the layer in contact with the oxide semiconductor layer of the source and drain electrode layers are formed using an element selected from Al, Cr, Cu, Ta, Ti, Mo, or W, an alloy containing any of these elements as a component, an alloy containing any of these elements in combination, or the like.
摘要翻译：在包括氧化物半导体层的薄膜晶体管中，目的是减少氧化物半导体层与与氧化物半导体层电连接的源电极层和漏电极层之间的接触电阻。源极和漏极电极层具有两层或多层的层叠结构，其中使用功函数低于氧化物半导体层的功函数或合金的金属形成与氧化物半导体层接触的层含有这样的金属。使用选自Al，Cr，Cu，Ta，Ti，Mo或W的元素形成与源极和漏极电极层的氧化物半导体层接触的层以外的层，包含任何这些元素作为组分，包含任何这些元素组合的合金等。

97. 发明授权

US08822264B2 Semiconductor device and method for manufacturing the semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08822264B2
公开(公告)日：2014-09-02
申请号：US13356044
申请日：2012-01-23
申请人： Shunpei Yamazaki , Kengo Akimoto
发明人： Shunpei Yamazaki , Kengo Akimoto
IPC分类号： H01L21/34 , H01L21/469 , H01L21/336
CPC分类号： H01L29/78696 , H01L21/02318 , H01L21/02323 , H01L21/0234 , H01L21/02565 , H01L29/247 , H01L29/4908 , H01L29/66969 , H01L29/7869 , H01L29/78693
摘要： An object is to provide favorable interface characteristics of a thin film transistor including an oxide semiconductor layer without mixing of an impurity such as moisture. Another object is to provide a semiconductor device including a thin film transistor having excellent electric characteristics and high reliability, and a method by which a semiconductor device can be manufactured with high productivity. A main point is to perform oxygen radical treatment on a surface of a gate insulating layer. Accordingly, there is a peak of the oxygen concentration at an interface between the gate insulating layer and a semiconductor layer, and the oxygen concentration of the gate insulating layer has a concentration gradient. The oxygen concentration is increased toward the interface between the gate insulating layer and the semiconductor layer.
摘要翻译：本发明的目的是提供一种薄膜晶体管的有利的界面特性，该薄膜晶体管包括氧化物半导体层，而不混入杂质如水分。另一个目的是提供一种包括具有优异的电特性和高可靠性的薄膜晶体管的半导体器件，以及可以以高生产率制造半导体器件的方法。要点是在栅极绝缘层的表面进行氧自由基处理。因此，在栅极绝缘层与半导体层之间的界面处存在氧浓度的峰值，并且栅极绝缘层的氧浓度具有浓度梯度。氧浓度朝向栅极绝缘层和半导体层之间的界面增加。

98. 发明授权

US08563976B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US08563976B2
公开(公告)日：2013-10-22
申请号：US12960664
申请日：2010-12-06
申请人： Shunpei Yamazaki , Kengo Akimoto
发明人： Shunpei Yamazaki , Kengo Akimoto
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/45 , H01L29/66742
摘要： A semiconductor device includes an oxide semiconductor layer including a channel formation region which includes an oxide semiconductor having a wide band gap and a carrier concentration which is as low as possible, and a source electrode and a drain electrode which include an oxide conductor containing hydrogen and oxygen vacancy, and a barrier layer which prevents diffusion of hydrogen and oxygen between an oxide conductive layer and the oxide semiconductor layer. The oxide conductive layer and the oxide semiconductor layer are electrically connected to each other through the barrier layer.

99. 发明授权

US08492760B2 Semiconductor device and method for manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08492760B2
公开(公告)日：2013-07-23
申请号：US13368392
申请日：2012-02-08
申请人： Shunpei Yamazaki , Hidekazu Miyairi , Akiharu Miyanaga , Kengo Akimoto , Kojiro Shiraishi
发明人： Shunpei Yamazaki , Hidekazu Miyairi , Akiharu Miyanaga , Kengo Akimoto , Kojiro Shiraishi
IPC分类号： H01L21/336 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/78618
摘要： One of the objects of the present invention is to provide a thin film transistor using an oxide semiconductor film containing indium (In), gallium (Ga), and zinc (Zn), in which the contact resistance between the oxide semiconductor layer and a source and drain electrodes is reduced, and to provide a method for manufacturing the thin film transistor. An ohmic contact is formed by intentionally providing a buffer layer having a higher carrier concentration than the IGZO semiconductor layer between the IGZO semiconductor layer and the source and drain electrode layers.
摘要翻译：本发明的目的之一是提供一种使用含有铟（In），镓（Ga）和锌（Zn））的氧化物半导体膜的薄膜晶体管，其中氧化物半导体层和源极之间的接触电阻并且减少了漏电极，并且提供了制造薄膜晶体管的方法。通过有意地提供具有比IGZO半导体层和源极和漏极电极层之间的IGZO半导体层更高的载流子浓度的缓冲层来形成欧姆接触。

100. 发明授权

US08481377B2 Method for manufacturing a semiconductor device with impurity doped oxide semiconductor 有权
标题翻译：制造具有杂质掺杂氧化物半导体的半导体器件的方法
公开(公告)号：US08481377B2
公开(公告)日：2013-07-09
申请号：US13026518
申请日：2011-02-14
申请人： Kengo Akimoto , Ryosuke Watanabe , Masashi Tsubuku , Shunpei Yamazaki
发明人： Kengo Akimoto , Ryosuke Watanabe , Masashi Tsubuku , Shunpei Yamazaki
IPC分类号： H01L21/338
CPC分类号： H01L29/7869 , H01L29/41733 , H01L29/66969 , H01L29/78618
摘要： It is an object to provide a semiconductor device including an oxide semiconductor, in which miniaturization of a transistor is achieved and the concentration of an electric field is relieved. The width of a gate electrode is reduced and a space between a source electrode layer and a drain electrode layer is shortened. By adding a rare gas in a self-alignment manner with the use of a gate electrode as a mask, a low-resistance region in contact with a channel formation region can be provided in an oxide semiconductor layer. Accordingly, even when the width of the gate electrode, that is, the line width of a gate wiring is small, the low-resistance region can be provided with high positional accuracy, so that miniaturization of a transistor can be realized.
摘要翻译：本发明的目的是提供一种包括氧化物半导体的半导体器件，其中实现了晶体管的小型化和电场的集中。栅电极的宽度减小，源电极层和漏电极层之间的间隔缩短。通过使用栅电极作为掩模以自对准的方式添加稀有气体，可以在氧化物半导体层中提供与沟道形成区域接触的低电阻区域。因此，即使栅电极的宽度，即栅极配线的线宽小，也能够提供高电位区域的高位置精度，能够实现晶体管的小型化。

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