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    • 92. 发明申请
    • FIELD EFFECT TRANSISTOR
    • 场效应晶体管
    • US20080258243A1
    • 2008-10-23
    • US12060505
    • 2008-04-01
    • Masayuki KurodaTetsuzo Ueda
    • Masayuki KurodaTetsuzo Ueda
    • H01L49/00
    • H01L29/7787H01L29/045H01L29/2003H01L29/4236H01L29/42376H01L29/452H01L29/518H01L29/66462
    • A field effect transistor includes: a first nitride semiconductor layer having a plane perpendicular to a (0001) plane or a plane tilted with respect to the (0001) plane as a main surface; a second nitride semiconductor layer formed on the first nitride semiconductor layer and having a wider bandgap than the first nitride semiconductor layer; a third nitride semiconductor layer formed on the second nitride semiconductor layer; and a source electrode and a drain electrode formed so as to contact at least a part of the second nitride semiconductor layer or the third nitride semiconductor layer. A recess that exposes a part of the second nitride semiconductor layer is formed between the source electrode and the drain electrode in the third nitride semiconductor layer. A gate electrode is formed in the recess and an insulating film is formed between the third nitride semiconductor layer and the gate electrode.
    • 场效应晶体管包括:具有垂直于(0001)面的平面或相对于(0001)面倾斜的平面作为主表面的第一氮化物半导体层; 形成在所述第一氮化物半导体层上并且具有比所述第一氮化物半导体层更宽的带隙的第二氮化物半导体层; 形成在所述第二氮化物半导体层上的第三氮化物半导体层; 以及形成为与第二氮化物半导体层或第三氮化物半导体层的至少一部分接触的源电极和漏电极。 在第三氮化物半导体层中的源电极和漏电极之间形成露出第二氮化物半导体层的一部分的凹部。 在凹部中形成栅电极,在第三氮化物半导体层和栅电极之间形成绝缘膜。
    • 93. 发明授权
    • Field effect transistor having vertical channel structure
    • 场效应晶体管具有垂直沟道结构
    • US07439595B2
    • 2008-10-21
    • US11287482
    • 2005-11-28
    • Tetsuzo Ueda
    • Tetsuzo Ueda
    • H01L29/76
    • H01L29/8122H01L29/2003H01L29/66856
    • A first SiO2 thin film, a tungsten gate electrode, and a second SiO2 thin film are selectively formed on a first n+-type GaN contact semiconductor layer in that order and in a multilayer film structure having the three layers, a stripe-shaped opening is formed. Via the opening, an undoped GaN channel semiconductor layer and the second n+-type GaN contact semiconductor layer are formed so that both the layers are regrown by, for example, metal organic chemical vapor deposition. A source electrode and a drain electrode are formed so as to contact the corresponding second and first n+-type GaN contact semiconductor layers. The regrown undoped GaN channel semiconductor layer and the regrown second n+-type GaN contact semiconductor layer are horizontally grown portions and hence, the contact area of the electrode can be made larger than the area of the opening.
    • 第一个SiO 2薄膜,钨栅电极和第二SiO 2薄膜选择性地形成在第一n + + / GaN接触半导体层,并且在具有三层的多层膜结构中形成条形开口。 通过开口,形成未掺杂的GaN沟道半导体层和第二n + + + GaN接触半导体层,使得这两个层通过例如金属有机化学气相沉积而再生长。 源电极和漏电极形成为与相应的第二和第n + +型GaN接触半导体层接触。 再生未掺杂的GaN沟道半导体层和再生长的第二n + + + GaN接触半导体层是水平生长的部分,因此可以使电极的接触面积大于开口的面积。
    • 94. 发明授权
    • Semiconductor photodetecting device and method of manufacturing the same
    • 半导体光电检测装置及其制造方法
    • US07411232B2
    • 2008-08-12
    • US11180581
    • 2005-07-14
    • Tetsuzo UedaSeiichiro Tamai
    • Tetsuzo UedaSeiichiro Tamai
    • H01L31/113
    • H01L31/101H01L27/14625H01L27/14647H01L31/02165H01L31/02327
    • A semiconductor photodetecting device is provided for enabling a solid-state image sensor to meet the requirements of higher quality imaging and more reduction in cost. The photodetecting device of the present invention includes: a semiconductor substrate; and an epitaxial layer formed on the semiconductor substrate by epitaxial growth. The epitaxial layer has a multilayer structure including: a first pn junction layer; a first insulating layer; a second pn junction layer; a second insulating layer; and a third pn junction layer. The first insulating layer and the second insulating layer have openings, and the first pn junction layer and the second pn junction layer are adjacent to each other through the openings of the first insulating layer which is placed in between these pn junction layers, and the second pn junction layer and the third pn junction layer are adjacent to each other through the openings of the second insulating layer which is placed in between these pn junction layers. Each of the insulating layers has a periodic structure of refractive indices in the stacking direction as well as a periodic structure of similar-shaped openings which are concentric in the in-plane direction, and therefore has filtering and light condensing functions for the pn junction layer which is formed beneath the insulating layer.
    • 提供了一种半导体光电检测装置,用于使固态图像传感器能够满足更高质量成像的要求,并且降低成本。 本发明的受光器件包括:半导体衬底; 以及通过外延生长在半导体衬底上形成的外延层。 外延层具有多层结构,其包括:第一pn结层; 第一绝缘层; 第二pn结层; 第二绝缘层; 和第三个pn结层。 第一绝缘层和第二绝缘层具有开口,并且第一pn结层和第二pn结层通过放置在这些pn结层之间的第一绝缘层的开口彼此相邻,并且第二绝缘层 pn结层和第三pn结层通过放置在这些pn结层之间的第二绝缘层的开口彼此相邻。 绝缘层中的每一层具有层叠方向的折射率的周期性结构以及在面内方向上同心的类似形状的开口的周期性结构,因此具有用于pn结层的滤波和聚光功能 其形成在绝缘层下方。
    • 100. 发明授权
    • Layered substrates for epitaxial processing, and device
    • 用于外延处理的分层衬底和器件
    • US07198671B2
    • 2007-04-03
    • US09904131
    • 2001-07-11
    • Tetsuzo Ueda
    • Tetsuzo Ueda
    • C30B25/00
    • H01L21/0262C23C16/44C30B25/18H01L21/0237H01L21/0242H01L21/02458H01L21/02532H01L21/0254H01L21/02658H01L33/007
    • A substrate comprising at least two layers which have different thermal expansion coefficients (TECs) is used for subsequent epitaxial growth of semiconductors. A typical example is an epitaxial growth of III-V Nitride (InGaAlBNAsP alloy semiconductor) on sapphire. Due to the thermal mismatch between III-V Nitrides and sapphire, epitaxially-processed wafers bow in a convex manner during cool down after the growth. A layered substrate compensates for the thermal mismatch between the epitaxial layered the top layer of the substrate, resulting in a flat wafer suitable for subsequent processing at high yields. The layered substrate is achieved by attaching to the back side of the substrate a material which has a lower TEC, for example silicon on the backside of the sapphire, to reduce or eliminate the bowing. Silicon is attached or grown on a sapphire wafer by such as wafer bonding or epitaxial growth. Since the above attachment process is done at an elevated temperature, the sapphire on silicon structure may bow in a convex manner at room temperature due to the thermal mismatch. Hence, for the subsequent growth of GaN on the sapphire on silicon wafer, direct heating is desirable rather than heating on a heat sink material. Another example is simultaneous epitaxial growths of GaN on a front side and silicon on the backside of the sapphire. A special growth system for this double-sided growth is also described.
    • 包含具有不同热膨胀系数(TEC)的至少两层的衬底用于半导体的随后的外延生长。 一个典型的例子是在蓝宝石上III-V氮化物(InGaAlBNAsP合金半导体)的外延生长。 由于III-V氮化物和蓝宝石之间的热不匹配,外延处理的晶片在生长后的冷却期间以凸起的方式弯曲。 分层衬底补偿层叠在衬底顶层的外延之间的热失配,得到适合于以高产率进行后续处理的平坦晶片。 层叠基板通过将具有较低TEC(例如蓝宝石背面的硅)的材料附着到基板的背面来实现,以减少或消除弯曲。 硅通过诸如晶片结合或外延生长在蓝宝石晶片上附着或生长。 由于上述附着过程在升高的温度下进行,所以由于热失配,硅结构上的蓝宝石可能在室温下以凸的方式弯曲。 因此,对于在硅晶片上的蓝宝石上的随后的GaN生长,期望直接加热而不是对散热材料进行加热。 另一个例子是在前侧的GaN的同时外延生长和蓝宝石背面的硅。 还描述了这种双面增长的特殊增长系统。