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91. 发明申请

US20070257595A1 ELECTRON EMITTING DEVICE AND ELECTROMAGNETIC WAVE GENERATING DEVICE USING THE SAME 有权
标题翻译：电子发射装置和使用该电子发射装置的电磁波产生装置
公开(公告)号：US20070257595A1
公开(公告)日：2007-11-08
申请号：US11620076
申请日：2007-01-05
申请人： Yutaka Hirose , Daisuke Ueda
发明人： Yutaka Hirose , Daisuke Ueda
IPC分类号： H01J99/00
CPC分类号： H01J1/304 , B82Y10/00 , H01J9/025 , H01J2201/30469 , Y10T29/49002
摘要： Provided is an electron emitting device which can achieve high electron emission efficiency even in the case where excitation energy is low. The device includes a carbon nanotube layer which is formed on an SiC substrate and is made up of plural carbon nanotubes vertically oriented with respect to a surface of the SiC substrate; an MgO layer which is formed on and touches the carbon nanotube layer; an ohmic electrode which is connected to the carbon nanotube layer; an electrode which is facing the MgO layer with an air-gap between the MgO layer and the electrode; and a voltage source which applies a voltage between the electrode and the ohmic electrode.
摘要翻译：提供了即使在激发能量低的情况下也能够实现高电子发射效率的电子发射器件。该装置包括碳纳米管层，其形成在SiC衬底上并且由相对于SiC衬底的表面垂直取向的多个碳纳米管构成; 形成在碳纳米管层上并与其接触的MgO层; 连接到碳纳米管层的欧姆电极; 在MgO层和电极之间具有气隙的面向MgO层的电极; 以及在电极和欧姆电极之间施加电压的电压源。

92. 发明申请

US20070170463A1 Nitride semiconductor device 有权
标题翻译：氮化物半导体器件
公开(公告)号：US20070170463A1
公开(公告)日：2007-07-26
申请号：US11647218
申请日：2006-12-29
申请人： Hiroaki Ueno , Manabu Yanagihara , Tetsuzo Ueda , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Hiroaki Ueno , Manabu Yanagihara , Tetsuzo Ueda , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L31/00
CPC分类号： H01L29/7783 , H01L21/02381 , H01L21/0242 , H01L21/02458 , H01L21/02502 , H01L21/0254 , H01L29/1066 , H01L29/2003 , H01L29/4175 , H01L29/432 , H01L29/452 , H01L29/7787
摘要： A nitride semiconductor device includes: a first semiconductor layer made of first nitride semiconductor; a second semiconductor layer formed on a principal surface of the first semiconductor layer and made of second nitride semiconductor having a bandgap wider than that of the first nitride semiconductor; a control layer selectively formed on, or above, an upper portion of the second semiconductor layer and made of third nitride semiconductor having a p-type conductivity; source and drain electrodes formed on the second semiconductor layer at respective sides of the control layer; a gate electrode formed on the control layer; and a fourth semiconductor layer formed on a surface of the first semiconductor layer opposite to the principal surface, having a potential barrier in a valence band with respect to the first nitride semiconductor and made of fourth nitride semiconductor containing aluminum.
摘要翻译：氮化物半导体器件包括：由第一氮化物半导体制成的第一半导体层; 第二半导体层，其形成在第一半导体层的主表面上并且由具有比第一氮化物半导体的带隙宽的第二氮化物半导体构成; 选择性地形成在所述第二半导体层的上部并且由上述第二半导体层的上部制成的具有p型导电性的第三氮化物半导体的控制层; 源极和漏极，形成在控制层的相应侧上的第二半导体层上; 形成在所述控制层上的栅电极; 以及形成在与所述主表面相对的所述第一半导体层的表面上的第四半导体层，所述第四半导体层相对于所述第一氮化物半导体具有价带中的势垒，并且由包含铝的第四氮化物半导体制成。

93. 发明申请

US20070026676A1 Via hole machining for microwave monolithic integrated circuits 有权
标题翻译：微波单片集成电路的通孔加工
公开(公告)号：US20070026676A1
公开(公告)日：2007-02-01
申请号：US11194419
申请日：2005-08-01
申请人： Ming Li , Xinbing Liu , Hiroyuki Sakai , Masaaki Nishijima , Daisuke Ueda
发明人： Ming Li , Xinbing Liu , Hiroyuki Sakai , Masaaki Nishijima , Daisuke Ueda
IPC分类号： H01L21/302
CPC分类号： B23K26/0624 , B23K26/40 , B23K2103/50
摘要： A method for forming a via in a sapphire substrate with a laser machining system that includes an ultrafast pulsed laser source. The sapphire substrate is provided. Pulses of laser light are substantially focused to a beam spot on the first surface of the sapphire substrate such that each focused pulse of laser light ablates a volume of the sapphire substrate having a depth less than the substrate thickness. The beam spot of the focused laser light pulses is scanned over a via portion of the first surface of the sapphire substrate. The sapphire substrate is moved in a direction substantially normal to the first surface to control the volume of the sapphire substrate ablated by each pulse of laser light to be substantially constant. The pulsing and scanning steps are repeated until the via is formed extending from the first surface to the second surface of the sapphire substrate.
摘要翻译：一种在具有包括超快脉冲激光源的激光加工系统的蓝宝石衬底中形成通孔的方法。提供蓝宝石衬底。激光的脉冲基本上聚焦到蓝宝石衬底的第一表面上的束斑上，使得每个聚焦的激光脉冲消除了具有小于衬底厚度的深度的蓝宝石衬底的体积。聚焦激光脉冲的束斑在蓝宝石衬底的第一表面的通孔部分上扫描。蓝宝石衬底沿着基本上垂直于第一表面的方向移动，以控制由每个激光脉冲消融的蓝宝石衬底的体积基本恒定。重复脉冲和扫描步骤，直到形成从蓝宝石衬底的第一表面延伸到第二表面的通孔。

94. 发明授权

US07064359B2 Switching semiconductor device and switching circuit 有权
标题翻译：开关半导体器件和开关电路
公开(公告)号：US07064359B2
公开(公告)日：2006-06-20
申请号：US10912567
申请日：2004-08-06
申请人： Hidetoshi Ishida , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Hidetoshi Ishida , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L29/42316 , H01L29/2003 , H01L29/7787 , Y10S257/918
摘要： A switching semiconductor device includes a first compound layer formed on a single crystal substrate which includes silicon carbide or sapphire, and including a general formula InxGa1-xN, where 0≦x≦1; a second compound layer formed on the first compound layer, and including a general formula InyALzGa1-y-zN, where 0≦y≦1 and 0
摘要翻译：开关半导体器件包括形成在包括碳化硅或蓝宝石的单晶衬底上的第一复合层，并且包括通式为N 1 Ga 1-x N，其中 0 <= x <= 1; 形成在第一化合物层上的第二化合物层，并且包含通式为Y 1，Y z，Ga 1-y z N，其中0 < = y <= 1，0

95. 发明申请

US20060108659A1 Schottky barrier diode and diode array 有权
公开(公告)号：US20060108659A1
公开(公告)日：2006-05-25
申请号：US11272878
申请日：2005-11-15
申请人： Manabu Yanagihara , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Manabu Yanagihara , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L31/07
CPC分类号： H01L29/872 , H01L21/26506 , H01L27/0605 , H01L27/0814 , H01L29/0692 , H01L29/417 , H01L29/66143
摘要： A Schottky barrier diode includes a first semiconductor layer and a second semiconductor layer successively formed above a semiconductor substrate with a buffer layer formed between the first and second semiconductor layers and the semiconductor substrate. A Schottky electrode and an ohmic electrode spaced from each other are formed on the second semiconductor layer, and a back face electrode is formed on the back face of the semiconductor substrate. The Schottky electrode or the ohmic electrode is electrically connected to the back face electrode through a via penetrating through at least the buffer layer.

96. 发明申请

US20060038636A1 Resonator and filter using the same 失效
标题翻译：谐振器和滤波器使用相同
公开(公告)号：US20060038636A1
公开(公告)日：2006-02-23
申请号：US11194460
申请日：2005-08-02
申请人： Naohiro Tsurumi , Kazuhiro Yahata , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda , Atsuhiko Kanda
发明人： Naohiro Tsurumi , Kazuhiro Yahata , Yasuhiro Uemoto , Tsuyoshi Tanaka , Daisuke Ueda , Atsuhiko Kanda
IPC分类号： H03H9/58
CPC分类号： H03H9/173 , H03H3/04 , H03H9/172 , H03H9/564 , H03H2003/021
摘要： An acoustic resonator includes: a substrate; a resonator film which is supported above the main surface of the substrate and includes a piezoelectric film and a pair of a top electrode and a bottom electrode which are formed on part of the top surface and part of the bottom surface of the piezoelectric film, respectively, to face each other via the piezoelectric film; and a support which is formed on the main surface of the substrate to support the resonator film from below. A resonance cavity is provided in part of a region between the substrate and the resonator film below at least a portion of part of the resonator film where the top electrode and the bottom electrode coincide with each other and an isolation cavity is provided in other part of said region where the support and the resonance cavity do not exist.
摘要翻译：声谐振器包括：基板; 一种谐振膜，其被支撑在基板的主表面上方，分别包括压电膜和一对顶电极和底电极，它们分别形成在压电膜的顶表面和底表面的一部分上通过压电膜相互面对; 以及形成在基板的主表面上以从下方支撑谐振膜的支撑体。谐振腔被设置在基板和谐振器膜之间的区域的一部分的下方，在谐振膜的至少一部分之上，其中顶部电极和底部电极彼此重合，并且在另一部分中设置隔离腔所述区域不存在支撑和谐振腔。

97. 发明授权

US06982479B2 Semiconductor package with leadframe inductors 失效
标题翻译：带引线框电感的半导体封装
公开(公告)号：US06982479B2
公开(公告)日：2006-01-03
申请号：US10669219
申请日：2003-09-24
申请人： Masaaki Nishijima , Tsuyoshi Tanaka , Daisuke Ueda
发明人： Masaaki Nishijima , Tsuyoshi Tanaka , Daisuke Ueda
IPC分类号： H01L23/02
CPC分类号： H01L23/49861 , H01L23/057 , H01L23/481 , H01L23/49541 , H01L23/66 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/49 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01032 , H01L2924/10162 , H01L2924/1305 , H01L2924/1306 , H01L2924/13064 , H01L2924/16195 , H01L2924/181 , H01L2924/19042 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2224/45099 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device in which an inductance element formed in a resin package has stable characteristics, impedance matching is achieved easily, and the stability of high-frequency characteristics is improved, more particularly a semiconductor chip sealed within mold resin having a conductor lead extending from an inside of the mold resin to an outside. A portion of the conductor lead inside the mold resin forms an inductance element, at least a part of which is narrower than the external portion of the conductor outside the mold resin.
摘要翻译：形成在树脂封装中的电感元件的半导体器件具有稳定的特性，容易实现阻抗匹配，提高了高频特性的稳定性，更具体地说，密封在具有从模具树脂内部到外面。导体引线在模具树脂内的一部分形成电感元件，其电感元件的至少一部分比模具树脂外导体的外部部分窄。

98. 发明申请

US20050272224A1 Method for dividing substrate 失效
标题翻译：基板分割方法
公开(公告)号：US20050272224A1
公开(公告)日：2005-12-08
申请号：US11146020
申请日：2005-06-07
申请人： Tetsuzo Ueda , Daisuke Ueda
发明人： Tetsuzo Ueda , Daisuke Ueda
IPC分类号： H01L21/301 , H01L21/304 , H01L21/78 , H01L33/00 , H01S5/02 , H01S5/343
CPC分类号： H01L21/3043 , B82Y20/00 , H01L21/78 , H01L33/0095 , H01S5/0201 , H01S5/0213 , H01S5/34333
摘要： The present invention aims at providing a method for dividing a substrate that is capable of dividing each substrate into chips in the same square-like form without causing chip breaking and capable of forming all cleaved facets flat. In the method for dividing a substrate of the present invention, an electron beam 1 with the intensity that causes a dislocation inside the substrate is irradiated to a substrate surface 2 to generate a crack starting from such dislocation, and a cleaved facet 5 is formed to divide the substrate.
摘要翻译：本发明的目的在于提供一种分割基板的方法，该方法能够将每个基板分成相同方形的芯片，而不会造成断屑并且能够形成所有的切割面平面。在本发明的基板分割方法中，将具有导致基板内的位错的强度的电子束1照射到基板表面2，以从该位错开始产生裂纹，并且形成切割面5 划分基板。

99. 发明申请

US20050269577A1 Surface treatment method and surface treatment device 审中-公开
标题翻译：表面处理方法及表面处理装置
公开(公告)号：US20050269577A1
公开(公告)日：2005-12-08
申请号：US11146036
申请日：2005-06-07
申请人： Tetsuzo Ueda , Daisuke Ueda
发明人： Tetsuzo Ueda , Daisuke Ueda
IPC分类号： C25F3/02 , C25F3/12 , H01L21/306 , H01L21/3063 , H01L27/15 , H01L33/00 , H01S5/02 , H01S5/042 , H01S5/183 , H01S5/323
CPC分类号： C25F3/02 , C25F3/12 , H01L21/30625 , H01L21/30635 , H01L33/0095 , H01S5/0213 , H01S5/0217 , H01S5/0425 , H01S5/18369 , H01S5/32341
摘要： The present invention is conceived in order to accomplish an object of providing a surface treatment method and a surface treatment device that can planarize, at high speed, the surface of a nitride semiconductor with an excellent evenness. The surface treatment device includes an electrolyte supply port 15 for supplying a KOH electrolyte 14 containing fine metal particles and an abrasive, a storage container 40 having an opening on the top surface and is for storing the KOH electrolyte 14 supplied from the electrolyte supply port 15, a wafer holder 12 for fixing the GaN substrate 11 and bringing the surface of the GaN substrate 11 into contact with the KOH electrolyte 14 by impregnating the surface of the substrate into the KOH electrolyte 14 in the storage container 40 from above, a load 13 placed on the wafer holder 12, a device housing 16, a polishing pad 17 for polishing the surface of the GaN substrate 11 and an ultraviolet light source 42.
摘要翻译：为了实现提供表面处理方法和表面处理装置的目的，本发明的目的是提供一种能够以高的平均化均匀化的氮化物半导体的表面。表面处理装置包括用于供给包含金属微粒和研磨剂的KOH电解质14的电解质供给口15，在顶面具有开口的储存容器40，用于储存从电解质供给口15供给的KOH电解质14 ，用于固定GaN衬底11并使GaN衬底11的表面与KOH电解质14接触的晶片保持器12，通过将衬底的表面从上方浸渍到存储容器40中的KOH电解质14中，负载13 放置在晶片保持器12上，器件壳体16，用于抛光GaN衬底11的表面的抛光垫17和紫外光源42。

100. 发明申请

US20050205892A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20050205892A1
公开(公告)日：2005-09-22
申请号：US11081622
申请日：2005-03-17
申请人： Manabu Yanagihara , Daisuke Ueda
发明人： Manabu Yanagihara , Daisuke Ueda
IPC分类号： H01L21/338 , H01L29/732 , H01L29/812
CPC分类号： H01L29/66871 , H01L29/812
摘要： The semiconductor device of the present invention includes a device formation region formed on a substrate and including at least one semiconductor region, and a first electrode and a second electrode formed spaced apart from each other on the device formation region. A semi-insulating film is formed to cover the surface of a portion of the semiconductor region, which portion is located between the first and second electrodes and in which portion a depletion layer extends when a reverse bias is applied between the first and second electrodes.
摘要翻译：本发明的半导体器件包括形成在衬底上并且包括至少一个半导体区域的器件形成区域，以及在器件形成区域上彼此间隔开形成的第一电极和第二电极。形成半绝缘膜以覆盖半导体区域的一部分的表面，该部分位于第一和第二电极之间，并且当在第一和第二电极之间施加反向偏压时耗尽层延伸。

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