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91. 发明申请

US20120198138A1 Managing Memory Systems Containing Components with Asymmetric Characteristics 有权
标题翻译：管理包含不对称特性组件的内存系统
公开(公告)号：US20120198138A1
公开(公告)日：2012-08-02
申请号：US13441663
申请日：2012-04-06
申请人： Kenneth A. Okin , Vijay Karamcheti
发明人： Kenneth A. Okin , Vijay Karamcheti
IPC分类号： G06F12/00
CPC分类号： G06F12/02 , G06F11/1658 , G06F11/20 , G06F12/0246 , G06F12/06 , G06F12/08 , G06F12/10 , G06F2212/1032 , G06F2212/205 , G06F2212/7201 , G06F2212/7202 , G11C16/3418 , G11C16/3427
摘要： A memory controller (MC) is associated with a remapping table to enable access to content in a memory system that includes asymmetric memory. The MC receives a request for a memory read or an Input/Output (I/O) write from a central processing unit (CPU) for a physical address specified by the system's memory management unit (MMU). The CPU uses the MMU to manage memory operations for the CPU, by translating the virtual addresses associated with CPU instructions into physical addresses representing system memory or I/O locations. The MC for asymmetric memories is configured to process the MMU-specified physical addresses as an additional type of virtual addresses, creating a layer of abstraction between the physical address specified by the MMU and the physical memory address with which that address is associated by the MC. The MC shields the CPU from the computational complexities required to implement a memory system with asymmetric components.
摘要翻译：存储器控制器（MC）与重映射表相关联，以使得能够访问包括非对称存储器的存储器系统中的内容。 MC从系统的存储器管理单元（MMU）指定的物理地址从中央处理单元（CPU）接收对存储器读取或输入/输出（I / O）写入的请求。通过将与CPU指令关联的虚拟地址转换为表示系统内存或I / O位置的物理地址，CPU使用MMU来管理CPU的存储器操作。用于非对称存储器的MC被配置为处理MMU指定的物理地址作为附加类型的虚拟地址，在MMU指定的物理地址与该地址由MC关联的物理存储器地址之间创建一个抽象层。 MC屏蔽CPU免受实现具有不对称组件的存储系统所需的计算复杂性。

92. 发明授权

US08176233B1 Using non-volatile memory resources to enable a virtual buffer pool for a database application 有权
标题翻译：使用非易失性内存资源为数据库应用程序启用虚拟缓冲池
公开(公告)号：US08176233B1
公开(公告)日：2012-05-08
申请号：US12505386
申请日：2009-07-17
申请人： Vijay Karamcheti
发明人： Vijay Karamcheti
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/06 , G06F12/109 , G06F17/30519 , G06F2212/205 , G06F2212/7201 , G11C16/102
摘要： A buffer pool for a database application is maintained in a volatile main memory component. A control portion that corresponds to a block of application data residing on a non-volatile, asymmetric memory component and that includes a reference to a location of the block of application data on the non-volatile, asymmetric memory component is added to the buffer pool maintained in the volatile main memory component. The control portion from the buffer pool maintained in the volatile main memory component that corresponds to the block of application data is accessed and the location of the block of application data on the non-volatile, asymmetric memory component is identified. Based on identifying the location of the block of application data on the non-volatile, asymmetric memory component, the database application is enabled to access the block of application data directly from the non-volatile, asymmetric memory component.
摘要翻译：用于数据库应用程序的缓冲池被保存在易失性主存储器组件中。对应于驻留在非易失性非对称存储器组件上并且包括对非易失性非对称存储器组件上的应用数据块的位置的引用的应用数据块的控制部分被添加到缓冲池维持在易失性主存储器组件中。访问保存在与应用数据块对应的易失性主存储器组件中的缓冲池的控制部分，并且识别非易失性非对称存储器组件上的应用数据块的位置。基于识别非易失性非对称存储器组件上的应用数据块的位置，数据库应用程序能够直接从非易失性非对称存储器组件访问应用数据块。

93. 发明授权

US09727452B2 Distributing metadata across multiple different disruption regions within an asymmetric memory system 有权
公开(公告)号：US09727452B2
公开(公告)日：2017-08-08
申请号：US12335499
申请日：2008-12-15
申请人： Vijay Karamcheti , Ashish Singhai
发明人： Vijay Karamcheti , Ashish Singhai
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/1032 , G06F2212/7207 , G06F2212/7208
摘要： Metadata that corresponds to application data is distributed across different disruption regions of an asymmetric memory component such that metadata is written in the same disruption region as the application data to which it corresponds. A first block of application data is written to a first disruption region and a second block of application data is written to a second disruption region. A first block of metadata corresponding to the first block of application data and a second block of metadata corresponding to the second block of application data both are generated. The first block of metadata is written to the first disruption region and the second block of metadata is written to the second disruption region such that the first and second blocks of metadata are written to the same disruption regions as the blocks of application data to which they correspond.

94. 发明授权

US08639863B1 Memory apparatus for replaceable non-volatile memory 有权
标题翻译：可更换非易失性存储器的存储器
公开(公告)号：US08639863B1
公开(公告)日：2014-01-28
申请号：US13163561
申请日：2011-06-17
申请人： Ruban Kanapathippillai , Ashwin Narasimha , Kenneth A. Okin , Vijay Karamcheti
发明人： Ruban Kanapathippillai , Ashwin Narasimha , Kenneth A. Okin , Vijay Karamcheti
IPC分类号： G06F13/12
CPC分类号： G06F13/1684 , Y02D10/14
摘要： In one embodiment of the invention, a replaceable memory apparatus is disclosed. The replaceable memory apparatus includes a first rectangular multilayer printed circuit board having a first side and a second side opposite the first side; a first male pluggable electrical connector mounted to the first side near a first edge; a first female pluggable electrical connector mounted to the second side; and first non-volatile memory mounted to the first side and the second side. The first female pluggable electrical connector is coupled to the first male pluggable electrical connector to feed through first signals. The first non-volatile memory is coupled to the first female pluggable electrical connector and the first male pluggable electrical connector to receive the first signals.
摘要翻译：在本发明的一个实施例中，公开了一种可替换的存储装置。可替换存储装置包括：第一矩形多层印刷电路板，具有第一侧和与第一侧相对的第二侧; 在第一边缘附近安装到第一侧的第一可插拔电连接器; 安装在第二侧的第一可插拔电插头; 以及安装到第一侧和第二侧的第一非易失性存储器。第一可插拔电连接器可耦合到第一可插拔电连接器以馈送第一信号。第一非易失性存储器耦合到第一可插拔电连接器和第一可插拔电连接器以接收第一信号。

95. 发明授权

US08225006B1 Methods for data redundancy across three or more storage devices 有权
标题翻译：三个或更多存储设备的数据冗余方法
公开(公告)号：US08225006B1
公开(公告)日：2012-07-17
申请号：US13163273
申请日：2011-06-17
申请人： Vijay Karamcheti
发明人： Vijay Karamcheti
IPC分类号： G06F3/00
CPC分类号： G06F11/20 , G06F11/108
摘要： In one embodiment of the invention, a method for data redundancy across three or more storage devices is disclosed. The method includes storing a collection of data chunks as a plurality of N-1 data stripes across N storage devices where N is three or more, wherein each data chunk of up to N data chunks forming a data stripe is stored in a different storage device; storing a parity stripe across the N storage devices including N-1 data parity chunks and one meta data parity chunk; wherein each Kth storage device of N-1 storage devices stores a Kth data parity chunk of the N-1 data parity chunks computed as parity of up to N data chunks forming the Kth data stripe; and wherein an Nth storage device of the N storage devices stores the meta parity chunk computed as parity of the N-1 data parity chunks stored in the respective N-1 storage devices.
摘要翻译：在本发明的一个实施例中，公开了一种用于三个或更多个存储设备上的数据冗余的方法。该方法包括在N个三个以上的N个存储装置中存储多个数据块的集合作为多个N-1个数据条，其中，形成数据条带的多达N个数据块的每个数据块被存储在不同的存储装置 ; 在包括N-1个数据奇偶校验块和一个元数据奇偶校验块的N个存储设备中存储奇偶校验条带; 其中N-1个存储装置的每个第K个存储装置存储被计算为最多N个形成第K个数据条带的数据块的奇偶校验的N-1个数据奇偶校验块的第K个数据奇偶校验块; 并且其中，所述N个存储装置的第N个存储装置存储被计算为存储在各个N-1个存储装置中的N-1个数据奇偶校验块的奇偶校验的元奇偶校验块。

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