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91. 发明授权

US06940093B2 Special contact points for accessing internal circuitry of an integrated circuit 失效
标题翻译：用于访问集成电路内部电路的特殊接点
公开(公告)号：US06940093B2
公开(公告)日：2005-09-06
申请号：US09753309
申请日：2000-12-29
申请人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
发明人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
IPC分类号： G01R1/073 , H01L23/50 , H01L23/58 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： G01R1/07307 , G01R31/2884 , G01R31/31723 , H01L22/32 , H01L23/50 , H01L23/60 , H01L2224/0401 , H01L2224/05554 , H01L2224/16 , H01L2924/00013 , H01L2924/01079 , H01L2924/10253 , H01L2224/29099 , H01L2924/00
摘要： One embodiment of the present invention concerns an integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads. The special contact points may also be used to externally program internal circuits (e.g., nonvolatile circuits) at the die or package level. The special contact points may also be used to select redundant circuits for faulty circuits.
摘要翻译：本发明的一个实施例涉及包括接合焊盘和特殊接触焊盘或点的集成电路。接合焊盘用于将集成电路作为整体与外部电路接口，并且将被连接到封装或电路板。接合焊盘以预定的对准方式设置在管芯上，例如外围，栅格或中心对准。特殊接触焊盘用于向内部电路提供外部测试模式和/或外部监测测试内部电路的结果。特别的接触垫可以有利地以高度的位置自由度位于集成电路上。对于一个实施例，特殊接触焊盘可以在与焊盘不同于对准的位置处设置在管芯上。特殊的接触焊盘可以小于接合焊盘，以便不会由于特殊的接触垫而增加管芯的尺寸。特殊接触点也可以用于在芯片或封装级别外部编程内部电路（例如非易失性电路）。特殊接触点也可用于选择故障电路的冗余电路。

92. 发明授权

US06597187B2 Special contact points for accessing internal circuitry of an integrated circuit 失效
标题翻译：用于访问集成电路内部电路的特殊接点
公开(公告)号：US06597187B2
公开(公告)日：2003-07-22
申请号：US09752902
申请日：2000-12-29
申请人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
发明人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
IPC分类号： G01R3102
CPC分类号： G01R1/07307 , G01R31/2884 , G01R31/31723 , H01L22/32 , H01L23/50 , H01L23/60 , H01L2224/0401 , H01L2224/05554 , H01L2224/16 , H01L2924/00013 , H01L2924/01079 , H01L2924/10253 , H01L2224/29099 , H01L2924/00
摘要： An integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads. The special contact points may also be used to externally program internal circuits (e.g., nonvolatile circuits) at the die or package level. The special contact points may also be used to select redundant circuits for faulty circuits.
摘要翻译：一种集成电路，包括接合焊盘和特殊接触焊盘或点。接合焊盘用于将集成电路作为整体与外部电路接口，并且将被连接到封装或电路板。接合焊盘以预定的对准方式设置在管芯上，例如外围，栅格或中心对准。特殊接触焊盘用于向内部电路提供外部测试模式和/或外部监测测试内部电路的结果。特别的接触垫可以有利地以高度的位置自由度位于集成电路上。对于一个实施例，特殊接触焊盘可以在与焊盘不同于对准的位置处设置在管芯上。特殊的接触焊盘可以小于接合焊盘，以便不会由于特殊的接触垫而增加管芯的尺寸。特殊接触点也可以用于在芯片或封装级别外部编程内部电路（例如非易失性电路）。特殊接触点也可用于选择故障电路的冗余电路。

93. 发明授权

US06429029B1 Concurrent design and subsequent partitioning of product and test die 失效
标题翻译：产品和测试模具的并行设计和后续划分
公开(公告)号：US06429029B1
公开(公告)日：2002-08-06
申请号：US09224166
申请日：1998-12-31
申请人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
发明人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
IPC分类号： H01L2166
CPC分类号： G01R31/2884 , G01R31/2886 , H01L23/49811 , H01L24/06 , H01L24/13 , H01L2224/0401 , H01L2224/04042 , H01L2224/05554 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06136 , H01L2224/13 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H05K3/20 , H05K3/3421 , H01L2924/00014 , H01L2924/00
摘要： One embodiment of the present invention concerns a design methodology for generating a test die for a product die including the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product and test die may then be fabricated on separate semiconductor wafers. By partitioning the product circuitry and test circuitry into separate die, embedded test circuitry can be either eliminated or minimized on the product die. This will tend to decrease the size of the product die and decrease the cost of manufacturing the product die while maintaining a high degree of test coverage of the product circuits within the product die.
摘要翻译：本发明的一个实施例涉及用于产生用于产品模具的测试模具的设计方法，包括在统一设计中同时设计测试电路和产品电路的步骤。测试电路可以设计成为相应的产品电路提供高度的故障覆盖，通常不考虑测试电路所需的硅面积的量。然后，设计方法将统一设计分为测试模具和产品模具。测试芯片包括测试电路，产品芯片包括产品电路。然后可以在单独的半导体晶片上制造产品和测试裸片。通过将产品电路和测试电路划分为单独的管芯，可以在产品管芯上消除或最小化嵌入式测试电路。这将倾向于减小产品模具的尺寸并降低制造产品模具的成本，同时保持产品模具内的产品电路的高度测试覆盖。

94. 发明授权

US07675311B2 Wireless test system 有权
标题翻译：无线测试系统
公开(公告)号：US07675311B2
公开(公告)日：2010-03-09
申请号：US11749004
申请日：2007-05-15
申请人： Igor Y. Khandros , Benjamin N. Eldridge , Charles A. Miller , A. Nicholas Sporck
发明人： Igor Y. Khandros , Benjamin N. Eldridge , Charles A. Miller , A. Nicholas Sporck
IPC分类号： G01R31/26
CPC分类号： G01R31/3025 , G01R31/31907 , G01R31/31908
摘要： One or more testers wirelessly communicate with one or more test stations. The wireless communication may include transmission of test commands and/or test vectors to a test station, resulting in testing of one or more electronic devices at the test station. The wireless communication may also include transmission of test results to a tester. Messages may also be wirelessly exchanged.
摘要翻译：一个或多个测试人员与一个或多个测试台无线通信。无线通信可以包括将测试命令和/或测试向量发送到测试站，导致测试台上的一个或多个电子设备的测试。无线通信还可以包括将测试结果传输给测试者。消息也可以被无线地交换。

95. 发明授权

US07534654B2 Socket for making with electronic component, particularly semiconductor device with spring packaging, for fixturing, testing, burning-in or operating such a component 失效
标题翻译：用于制造电子元件的插座，特别是具有弹簧封装的半导体器件，用于固定，测试，燃烧或操作这样的部件
公开(公告)号：US07534654B2
公开(公告)日：2009-05-19
申请号：US11733562
申请日：2007-04-10
申请人： David V. Pedersen , Benjamin N. Eldridge , Igor Y. Khandros
发明人： David V. Pedersen , Benjamin N. Eldridge , Igor Y. Khandros
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L25/16 , B23K1/0016 , B23K20/004 , B23K2101/40 , C25D5/08 , C25D5/22 , C25D21/02 , G01R1/0408 , G01R1/0433 , G01R1/06711 , G01R1/07342 , G01R1/07378 , G01R31/01 , G01R31/2863 , G01R31/2886 , G01R31/2889 , H01L21/4853 , H01L21/4889 , H01L21/563 , H01L22/20 , H01L23/04 , H01L23/13 , H01L23/32 , H01L23/49811 , H01L23/5385 , H01L24/06 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/45 , H01L24/49 , H01L24/72 , H01L24/81 , H01L25/0652 , H01L2223/54473 , H01L2224/0401 , H01L2224/04042 , H01L2224/05553 , H01L2224/05599 , H01L2224/06136 , H01L2224/1134 , H01L2224/13099 , H01L2224/16145 , H01L2224/45144 , H01L2224/49109 , H01L2224/73203 , H01L2224/81136 , H01L2224/81801 , H01L2224/85201 , H01L2224/85399 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06572 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01028 , H01L2924/01033 , H01L2924/01051 , H01L2924/01061 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/12044 , H01L2924/14 , H01L2924/1433 , H01L2924/1532 , H01L2924/15787 , H01L2924/16152 , H01L2924/19043 , H05K1/141 , H05K3/20 , H05K3/325 , H05K3/326 , H05K3/3421 , H05K3/368 , H05K3/4015 , H05K2201/09472 , H05K2201/1031 , H05K2201/10318 , H05K2201/10757 , H05K2201/10878 , H05K2201/10909 , H05K2201/10946 , Y02P70/611 , H01L2924/00 , H01L2224/48
摘要： Products and assemblies are provided for socketably receiving elongate interconnection elements, such as spring contact elements, extending from electronic components, such as semiconductor devices. Socket substrates are provided with capture pads for receiving ends of elongate interconnection elements extending from electronic components. Various capture pad configurations are disclosed. Connections to external devices are provided via conductive traces adjacent the surface of the socket substrate. The socket substrate may be supported by a support substrate. In a particularly preferred embodiment the capture pads are formed directly on a primary substrate such as a printed circuit board.
摘要翻译：提供产品和组件用于可插拔地接收从电子部件（例如半导体器件）延伸的细长互连元件，例如弹簧接触元件。插座基板设置有用于接收从电子部件延伸的细长互连元件的端部的捕获垫。公开了各种捕获垫结构。通过邻近插座基板表面的导电迹线提供与外部设备的连接。插座基板可以由支撑基板支撑。在特别优选的实施例中，捕获垫直接形成在诸如印刷电路板的主要基底上。

96. 发明授权

US06621260B2 Special contact points for accessing internal circuitry of an integrated circuit 失效
公开(公告)号：US06621260B2
公开(公告)日：2003-09-16
申请号：US09752795
申请日：2000-12-29
申请人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
发明人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
IPC分类号： G01R3128
CPC分类号： G01R1/07307 , G01R31/2884 , G01R31/31723 , H01L22/32 , H01L23/50 , H01L23/60 , H01L2224/0401 , H01L2224/05554 , H01L2224/16 , H01L2924/00013 , H01L2924/01079 , H01L2924/10253 , H01L2224/29099 , H01L2924/00
摘要： One embodiment of the present invention concerns an integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads. The special contact points may also be used to externally program internal circuits (e.g., nonvolatile circuits) at the die or package level. The special contact points may also be used to select redundant circuits for faulty circuits.

97. 发明授权

US07920989B2 Remote test facility with wireless interface to local test facilities 有权
标题翻译：具有与本地测试设施无线接口的远程测试设备
公开(公告)号：US07920989B2
公开(公告)日：2011-04-05
申请号：US12611525
申请日：2009-11-03
申请人： Igor Y. Khandros , Benjamin N. Eldridge
发明人： Igor Y. Khandros , Benjamin N. Eldridge
IPC分类号： G01R31/00 , G06F19/00
CPC分类号： G01R31/2884 , G01R31/3025 , G01R31/31907
摘要： A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices were designed or a manufacturing facility where the electronic devices where manufactured. The central test facility may accept requests for test resources from any of a number of local test facilities, schedule test times corresponding to each test request, and at a scheduled test time, wirelessly transmits test data to a corresponding local test facility.
摘要翻译：中央测试设备将无线测试数据传输到本地测试设备，该测试设备使用测试数据测试电子设备。本地测试设备将由电子设备生成的无线响应数据发送回中央测试设备，分析响应数据以确定哪些电子设备通过测试。中央测试设备可以向其他实体提供测试结果，例如设计电子设备的设计设施或其中制造的电子设备的制造设施。中央测试设备可以接受来自任何本地测试设施的测试资源的请求，对应于每个测试请求的调度测试时间，并且在预定的测试时间，将测试数据无线地传输到相应的本地测试设施。

98. 发明授权

US07613591B2 Remote test facility with wireless interface to local facilities 失效
标题翻译：具有无线接口的远程测试设备到当地设施
公开(公告)号：US07613591B2
公开(公告)日：2009-11-03
申请号：US11835151
申请日：2007-08-07
申请人： Igor Y. Khandros , Benjamin N. Eldridge
发明人： Igor Y. Khandros , Benjamin N. Eldridge
IPC分类号： G01R31/00 , G06F19/00
CPC分类号： G01R31/2884 , G01R31/3025 , G01R31/31907
摘要： A central test facility transmits wirelessly test data to a local test facility, which tests electronic devices using the test data. The local test facility transmits wirelessly response data generated by the electronic devices back to the central test facility, which analyzes the response data to determine which electronic devices passed the testing. The central test facility may provide the results of the testing to other entities, such as a design facility where the electronic devices were designed or a manufacturing facility where the electronic devices where manufactured. The central test facility may accept requests for test resources from any of a number of local test facilities, schedule test times corresponding to each test request, and at a scheduled test time, wirelessly transmits test data to a corresponding local test facility.
摘要翻译：中央测试设备将无线测试数据传输到本地测试设备，该测试设备使用测试数据测试电子设备。本地测试设备将由电子设备生成的无线响应数据发送回中央测试设备，分析响应数据以确定哪些电子设备通过测试。中央测试设备可以向其他实体提供测试结果，例如设计电子设备的设计设施或其中制造的电子设备的制造设施。中央测试设备可以接受来自任何本地测试设施的测试资源的请求，对应于每个测试请求的调度测试时间，并且在预定的测试时间，将测试数据无线地传输到相应的本地测试设施。

99. 发明授权

US07557596B2 Test assembly including a test die for testing a semiconductor product die 失效
标题翻译：测试组件，包括用于测试半导体产品模具的测试模具
公开(公告)号：US07557596B2
公开(公告)日：2009-07-07
申请号：US11000586
申请日：2004-11-30
申请人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
发明人： Benjamin N. Eldridge , Igor Y. Khandros , David V. Pedersen , Ralph G. Whitten
IPC分类号： G01R31/02
CPC分类号： G01R1/07307 , G01R1/07342 , G01R1/07371 , G01R31/2884 , G01R31/2886 , H01L22/32 , H01L22/34 , H01L23/49811 , H01L24/05 , H01L2224/0401 , H01L2224/05553 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/06136 , H01L2224/13 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01076 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/19041 , H01L2924/19043 , H05K3/20 , H05K3/3421 , H01L2924/00014 , H01L2924/00
摘要： One embodiment of the present invention concerns a test assembly for testing product circuitry of a product die. In one embodiment, the test assembly includes at test die and an interconnection substrate for electrically coupling the test die to a host controller that communicates with the test die. The test die may be designed according to a design methodology that includes the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product and test die may then be fabricated on separate semiconductor wafers. By partitioning the product circuitry and test circuitry into separate die, embedded test circuitry can be either eliminated or minimized on the product die. This will tend to decrease the size of the product die and decrease the cost of manufacturing the product die while maintaining a high degree of test coverage of the product circuits within the product die. The test die can be used to test multiple product die on one or more wafers.
摘要翻译：本发明的一个实施例涉及一种用于测试产品模具的产品电路的测试组件。在一个实施例中，测试组件包括在测试模具和用于将测试模具电耦合到与测试模具通信的主机控制器的互连衬底。测试模具可以根据设计方法设计，包括在统一设计中同时设计测试电路和产品电路的步骤。测试电路可以设计成为相应的产品电路提供高度的故障覆盖，通常不考虑测试电路所需的硅面积的量。然后，设计方法将统一设计分为测试模具和产品模具。测试芯片包括测试电路，产品芯片包括产品电路。然后可以在单独的半导体晶片上制造产品和测试裸片。通过将产品电路和测试电路划分为单独的管芯，可以在产品管芯上消除或最小化嵌入式测试电路。这将倾向于减小产品模具的尺寸并降低制造产品模具的成本，同时保持产品模具内的产品电路的高度测试覆盖。测试模具可用于在一个或多个晶片上测试多个产品模具。

100. 发明申请

US20080088030A1 ATTACHING AND INTERCONNECTING DIES TO A SUBSTRATE 审中-公开
标题翻译：连接和互连到基板上
公开(公告)号：US20080088030A1
公开(公告)日：2008-04-17
申请号：US11863443
申请日：2007-09-28
申请人： Benjamin N. Eldridge , Igor Y. Khandros , Charles A. Miller
发明人： Benjamin N. Eldridge , Igor Y. Khandros , Charles A. Miller
IPC分类号： H01L23/48 , H01L21/66
CPC分类号： H01L23/3121 , H01L22/10 , H01L23/13 , H01L23/5383 , H01L23/5386 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/0652 , H01L2224/04042 , H01L2224/05554 , H01L2224/05556 , H01L2224/05599 , H01L2224/06136 , H01L2224/48091 , H01L2224/4824 , H01L2224/48464 , H01L2224/4911 , H01L2224/49112 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01057 , H01L2924/01074 , H01L2924/01082 , H01L2924/19041 , H01L2924/19043 , H01L2924/19107 , H01L2924/3011 , H01L2224/45099 , H01L2924/00
摘要： An electronics module can include a wiring substrate with openings. The wiring substrate can have traces, and semiconductor dies can be attached by a first relatively weak adhesive to the wiring substrate. Electrical connections through the openings can electrically connect the traces and the terminals. Another adhesive can more strongly adhere the dies to the wiring substrate. The electronics module can be made by a process that includes attaching the semiconductor dies to the wiring substrate with a relatively weak adhesion, electrically connecting through the openings the traces and the terminals, and more securely attaching selected ones of the dies to the wiring substrate.
摘要翻译：电子模块可以包括具有开口的布线基板。布线基板可以具有迹线，并且半导体管芯可以通过第一相对较弱的粘合剂附着到布线基板。通过开口的电气连接可以电连接走线和端子。另一种粘合剂可以更牢固地将模具附着到布线基板上。电子模块可以通过包括以相对较弱的粘附力将半导体管芯附着到布线基板上的方法制成，通过开口将迹线和端子电连接，并且将选定的管芯精确地连接到布线基板。

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