专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明授权

US09405550B2 Methods for the transmission of accelerator commands and corresponding command structure to remote hardware accelerator engines over an interconnect link 有权
标题翻译：通过互连链路将加速器命令和相应的命令结构传输到远程硬件加速器引擎的方法
公开(公告)号：US09405550B2
公开(公告)日：2016-08-02
申请号：US13077804
申请日：2011-03-31
申请人： Giora Biran , Ilya Granovsky
发明人： Giora Biran , Ilya Granovsky
IPC分类号： G06F9/30 , G06F13/38 , G06F15/167 , G06F9/38 , G06F9/54
CPC分类号： G06F9/3877 , G06F9/547 , G06F13/38 , G06F13/4022 , G06F13/4282 , G06F15/167 , G06F2213/0026
摘要： An apparatus and method of submitting hardware accelerator engine commands over an interconnect link such as a PCI Express (PCIe) link. In one embodiment, the mechanism is implemented inside a PCIe Host Bridge which is integrated into a host IC or chipset. The mechanism provides an interface compatible with other integrated accelerators thereby eliminating the overhead of maintaining different programming models for local and remote accelerators. Co-processor requests issued by threads requesting a service (client threads) targeting a remote accelerator are queued and sent to a PCIe adapter and remote accelerator engine over a PCIe link. The remote accelerator engine performs the requested processing task, delivers results back to host memory and the PCIe Host Bridge performs a co-processor request completion sequence (status update, write to flag, interrupt) included in the co-processor command.
摘要翻译：通过诸如PCI Express（PCIe）链路的互连链路提交硬件加速器引擎命令的装置和方法。在一个实施例中，该机制在集成到主机IC或芯片组中的PCIe主机桥内部实现。该机制提供了与其他集成加速器兼容的接口，从而消除了为本地和远程加速器维护不同编程模型的开销。请求针对远程加速器的服务（客户端线程）的线程发出的协处理器请求排队，并通过PCIe链路发送到PCIe适配器和远程加速器引擎。远程加速器引擎执行所请求的处理任务，将结果传回主机存储器，并且PCIe主机桥执行协处理器命令中包含的协处理器请求完成序列（状态更新，写入标志，中断）。

92. 发明授权

US08610604B2 Compression algorithm incorporating a feedback loop for dynamic selection of a predefined Huffman dictionary 失效
标题翻译：包含用于动态选择预定霍夫曼字典的反馈回路的压缩算法
公开(公告)号：US08610604B2
公开(公告)日：2013-12-17
申请号：US13304326
申请日：2011-11-24
申请人： Lior Glass , Giora Biran , Amit Golander
发明人： Lior Glass , Giora Biran , Amit Golander
IPC分类号： H03M7/30 , H03M7/40
CPC分类号： H03M7/40 , H03M7/3086 , H03M7/6076
摘要： A system and method of selecting a predefined Huffman dictionary from a bank of dictionaries. The dictionary selection mechanism of the present invention effectively breaks the built-in tradeoff between compression ratio and compression rate for both hardware and software compression implementations. A mechanism is provided for automatically creating a predefined Huffman dictionary for a set of input files. The dictionary selection mechanism achieves high compression rate and ratio leveraging predefined Huffman dictionaries and provides a mechanism for dynamically speculating which predefined dictionary to select per input data block, thereby achieving close to a dynamic Huffman ratio at a static Huffman rate. In addition, a feedback loop is used to monitor the ongoing performance of the preset currently selected for use by the hardware accelerator. If the current preset is not optimal it is replaced with an optimal preset.
摘要翻译：从一组字典中选择一个预定义霍夫曼字典的系统和方法。本发明的字典选择机制有效地破坏了硬件和软件压缩实现之间的压缩比和压缩率之间的内在折中。提供了一种用于自动为一组输入文件创建预定义霍夫曼字典的机制。词典选择机制通过利用预定义的霍夫曼词典实现了高压缩率和比例，并且提供了一种动态地推测每个输入数据块选择哪个预定义词典的机制，从而以静态霍夫曼速率实现接近于动态赫夫曼比。另外，反馈回路用于监视当前选择供硬件加速器使用的预设的持续性能。如果当前的预设值不是最佳的，则用最优的预设置换。

93. 发明授权

US08495334B2 Address translation for use in a pattern matching accelerator 失效
标题翻译：地址转换用于模式匹配加速器
公开(公告)号：US08495334B2
公开(公告)日：2013-07-23
申请号：US13021756
申请日：2011-02-06
申请人： Giora Biran , Christoph Hagleitner , Timothy Hume Heil , Jan Van Lunteren
发明人： Giora Biran , Christoph Hagleitner , Timothy Hume Heil , Jan Van Lunteren
IPC分类号： G06F12/10
CPC分类号： G06F17/30985 , G06F12/10
摘要： A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using regular expressions that are compiled into a data structure comprised of rules subsequently processed by the PMA. The patterns to be searched in the input stream are defined by the user as a set of regular expressions. The patterns to be searched are grouped in pattern context sets. The sets of regular expressions which define the pattern context sets are compiled to generate a rules structure used by the PMA hardware. The rules are compiled before search run time and stored in main memory, in rule cache memory within the PMA or a combination thereof. For each input character, the PMA executes the search and returns the search results.
摘要翻译：模式匹配加速器（PMA），用于帮助软件线程查找匹配给定模式的输入数据流中字符串的存在和位置。使用正则表达式定义模式，该正则表达式被编译成由PMA随后处理的规则组成的数据结构。在输入流中要搜索的模式由用户定义为一组正则表达式。要搜索的模式分组在模式上下文集中。编译定义模式上下文集的正则表达式集合，以生成PMA硬件使用的规则结构。该规则在搜索运行时间之前被编译并存储在主存储器中，在PMA内的规则高速缓冲存储器中或其组合中。对于每个输入字符，PMA执行搜索并返回搜索结果。

94. 发明申请

US20120284446A1 ACCELERATOR ENGINE EMULATION OVER AN INTERCONNECT LINK 有权
标题翻译：加速器引擎仿真通过互连链路
公开(公告)号：US20120284446A1
公开(公告)日：2012-11-08
申请号：US13101215
申请日：2011-05-05
申请人： Giora Biran , Ilya Granovsky
发明人： Giora Biran , Ilya Granovsky
IPC分类号： G06F13/36
CPC分类号： G06F13/36 , G06F13/4022
摘要： An apparatus and method of emulating a hardware accelerator engine over an interconnect link such as PCI Express (PCIe) link. In one embodiment, the accelerator emulation mechanism is implemented inside a PCIe Host Bridge which is integrated into a host IC or chipset. The accelerator emulation mechanism provides an interface compatible with other integrated accelerators thereby eliminating the overhead of maintaining different programming models for local and remote accelerators. Co-processor requests issued by threads requesting a service (client threads) targeting remote accelerator are queued and sent to a PCIe adapter and remote accelerator engine over a PCIe link. The remote accelerator engine performs the requested processing task, delivers results back to host memory and the PCIe Host Bridge performs co-processor request completion sequence (status update, write to flag, interrupt) include in the co-processor command.
摘要翻译：在诸如PCI Express（PCIe）链路的互连链路上仿真硬件加速器引擎的装置和方法。在一个实施例中，加速器仿真机制在集成到主机IC或芯片组中的PCIe主机桥内部实现。加速器仿真机制提供了与其他集成加速器兼容的接口，从而消除了为本地和远程加速器维护不同编程模型的开销。请求针对远程加速器的服务（客户端线程）的线程发出的协处理器请求排队，并通过PCIe链路发送到PCIe适配器和远程加速器引擎。远程加速器引擎执行所请求的处理任务，将结果传回主机存储器，并且PCIe主机桥执行协处理器请求完成序列（状态更新，写入标志，中断）包括在协处理器命令中。

95. 发明授权

US08244911B2 Method and apparatus for concurrent and stateful decompression of multiple compressed data streams 失效
标题翻译：用于多个压缩数据流的并发和状态解压缩的方法和装置
公开(公告)号：US08244911B2
公开(公告)日：2012-08-14
申请号：US12177440
申请日：2008-07-22
申请人： Brian Mitchell Bass , Giora Biran , Hubertus Franke , Hao Yu
发明人： Brian Mitchell Bass , Giora Biran , Hubertus Franke , Hao Yu
IPC分类号： G06F15/16 , H04J3/18
CPC分类号： H04L69/04 , G06F2221/2105 , H04L63/0227
摘要： A method for decompressing multiple data streams includes receiving a packet of data of a compressed data stream, directing the received packet to a selected one of a plurality of decompression functional units within a hardware-based decompression accelerator unit, obtaining decompression state information pertaining to the compressed data stream, and decompressing the received packet using the obtained decompression state information.
摘要翻译：用于解压缩多个数据流的方法包括：接收压缩数据流的数据分组，将接收的分组引导到基于硬件的解压缩加速器单元内的多个解压缩功能单元中的选定的一个，获得与压缩数据流，并使用获得的解压缩状态信息对接收的分组进行解压缩。

96. 发明申请

US20120204000A1 ADDRESS TRANSLATION FOR USE IN A PATTERN MATCHING ACCELERATOR 失效
标题翻译：用于模式匹配加速器的地址翻译
公开(公告)号：US20120204000A1
公开(公告)日：2012-08-09
申请号：US13021756
申请日：2011-02-06
申请人： Giora Biran , Christoph Hagleitner , Timothy Hume Heil , Jan Van Lunteren
发明人： Giora Biran , Christoph Hagleitner , Timothy Hume Heil , Jan Van Lunteren
IPC分类号： G06F12/10
CPC分类号： G06F17/30985 , G06F12/10
摘要： A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using regular expressions that are compiled into a data structure comprised of rules subsequently processed by the PMA. The patterns to be searched in the input stream are defined by the user as a set of regular expressions. The patterns to be searched are grouped in pattern context sets. The sets of regular expressions which define the pattern context sets are compiled to generate a rules structure used by the PMA hardware. The rules are compiled before search run time and stored in main memory, in rule cache memory within the PMA or a combination thereof. For each input character, the PMA executes the search and returns the search results.
摘要翻译：模式匹配加速器（PMA），用于帮助软件线程查找匹配给定模式的输入数据流中字符串的存在和位置。使用正则表达式定义模式，该正则表达式被编译成由PMA随后处理的规则组成的数据结构。在输入流中要搜索的模式由用户定义为一组正则表达式。要搜索的模式分组在模式上下文集中。编译定义模式上下文集的正则表达式集合，以生成PMA硬件使用的规则结构。该规则在搜索运行时间之前被编译并存储在主存储器中，在PMA内的规则高速缓冲存储器中或其组合中。对于每个输入字符，PMA执行搜索并返回搜索结果。

97. 发明申请

US20120203761A1 PATTERN MATCHING ACCELERATOR 失效
标题翻译：图案匹配加速器
公开(公告)号：US20120203761A1
公开(公告)日：2012-08-09
申请号：US13022850
申请日：2011-02-08
申请人： Giora Biran , Christoph Hagleitner , Timothy H. Heil , Russell D. Hoover , Jan Van Lunteren
发明人： Giora Biran , Christoph Hagleitner , Timothy H. Heil , Russell D. Hoover , Jan Van Lunteren
IPC分类号： G06F17/30
CPC分类号： G06F17/30985 , G06K9/00986
摘要： A pattern matching accelerator (PMA) for assisting software threads to find the presence and location of strings in an input data stream that match a given pattern. The patterns are defined using regular expressions that are compiled into a data structure comprised of rules subsequently processed by the PMA. The patterns to be searched in the input stream are defined by the user as a set of regular expressions. The patterns to be searched are grouped in pattern context sets. The sets of regular expressions which define the pattern context sets are compiled to generate a rules structure used by the PMA hardware. The rules are compiled before search run time and stored in main memory, in rule cache memory within the PMA or a combination thereof. For each input character, the PMA executes the search and returns the search results.
摘要翻译：模式匹配加速器（PMA），用于帮助软件线程查找匹配给定模式的输入数据流中字符串的存在和位置。使用正则表达式定义模式，该正则表达式被编译成由PMA随后处理的规则组成的数据结构。在输入流中要搜索的模式由用户定义为一组正则表达式。要搜索的模式分组在模式上下文集中。编译定义模式上下文集的正则表达式集合，以生成PMA硬件使用的规则结构。该规则在搜索运行时间之前被编译并存储在主存储器中，在PMA内的规则高速缓冲存储器中或其组合中。对于每个输入字符，PMA执行搜索并返回搜索结果。

98. 发明授权

US08028105B2 System and method for virtual adapter resource allocation matrix that defines the amount of resources of a physical I/O adapter 失效
标题翻译：用于定义物理I / O适配器的资源量的虚拟适配器资源分配矩阵的系统和方法
公开(公告)号：US08028105B2
公开(公告)日：2011-09-27
申请号：US12122507
申请日：2008-05-16
申请人： Richard Louis Arndt , Giora Biran , Harvey Gene Kiel , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
发明人： Richard Louis Arndt , Giora Biran , Harvey Gene Kiel , Vadim Makhervaks , Renato John Recio , Leah Shalev , Jaya Srikrishnan
IPC分类号： G06F13/38 , G06F13/28 , G06F3/00
CPC分类号： G06F9/5077 , G06F9/5011
摘要： A method, computer program product, and distributed data processing system that enables host software or firmware to allocate virtual resources to one or more system images from a single physical I/O adapter, such as a PCI, PCI-X, or PCI-E adapter, is provided. Adapter resource groups are assigned to respective system images. An adapter resource group is exclusively available to the system image to which the adapter resource group assignment was made. Assignment of adapter resource groups may be made per a relative resource assignment or an absolute resource assignment. In another embodiment, adapter resource groups are assigned to system images on a first come, first served basis.
摘要翻译：一种方法，计算机程序产品和分布式数据处理系统，其使得主机软件或固件能够将虚拟资源分配给来自单个物理I / O适配器（例如PCI，PCI-X或PCI-E）的一个或多个系统图像适配器。适配器资源组分配给相应的系统映像。适配器资源组对适配器资源组分配进行了分配的系统映像是唯一可用的。适配器资源组的分配可以根据相对资源分配或绝对资源分配进行。在另一个实施例中，适配器资源组以先到先得的原则被分配给系统图像。

99. 发明授权

US08006169B2 Data transfer error checking 失效
标题翻译：数据传输错误检查
公开(公告)号：US08006169B2
公开(公告)日：2011-08-23
申请号：US11843938
申请日：2007-08-23
申请人： Giora Biran , Zorik Machulsky , Vadim Makhervaks
发明人： Giora Biran , Zorik Machulsky , Vadim Makhervaks
IPC分类号： H03M13/00
CPC分类号： H03M13/00
摘要： An RNIC implementation that performs direct data placement to memory where all segments of a particular connection are aligned, or moves data through reassembly buffers where all segments of a particular connection are non-aligned. The type of connection that cuts-through without accessing the reassembly buffers is referred to as a “Fast” connection because it is highly likely to be aligned, while the other type is referred to as a “Slow” connection. When a consumer establishes a connection, it specifies a connection type. The connection type can change from Fast to Slow and back. The invention reduces memory bandwidth, latency, error recovery using TCP retransmit and provides for a “graceful recovery” from an empty receive queue. The implementation also may conduct CRC validation for a majority of inbound DDP segments in the Fast connection before sending a TCP acknowledgement (Ack) confirming segment reception.
摘要翻译：执行直接数据放置到特定连接的所有段对齐的存储器的RNIC实现，或者通过重组缓冲区移动数据，其中特定连接的所有段都不对齐。在不访问重组缓冲区的情况下，直接连接的类型被称为“快速”连接，因为它很可能被对齐，而另一种类型被称为“慢速”连接。当消费者建立连接时，它指定一个连接类型。连接类型可以从快速变慢到慢。本发明减少了内存带宽，延迟，使用TCP重传的错误恢复，并提供了从空接收队列的“优雅恢复”。在确认段接收之前，实现还可以在Fast连接中的大部分入站DDP段进行CRC校验。

100. 发明授权

US07924848B2 Receive flow in a network acceleration architecture 失效
标题翻译：在网络加速架构中接收流量
公开(公告)号：US07924848B2
公开(公告)日：2011-04-12
申请号：US11132101
申请日：2005-05-18
申请人： Giora Biran , Zorik Machulsky , Vadim Makhervaks , Renato John Recio , Julian Satran , Leah Shalev , Ilan Shimony
发明人： Giora Biran , Zorik Machulsky , Vadim Makhervaks , Renato John Recio , Julian Satran , Leah Shalev , Ilan Shimony
IPC分类号： H04L12/28 , G06F15/16 , G06F15/167
CPC分类号： H04L69/16 , H04L69/12 , H04L69/161
摘要： A method for receiving data in a network acceleration architecture for use with TCP (transport control protocol), iSCSI (Internet Small Computer System Interface) and RDMA (Remote Direct Memory Access) over TCP, including providing a hardware acceleration engine, called a streamer, adapted for communication with and processing data from a consumer application in a system that supports TCP, iSCSI and RDMA over TCP, providing a software protocol processor adapted for carrying out TCP implementation, the software control processor being called a TCE (TCP Control Engine), wherein the streamer and the TCE are adapted to operate asynchronously and independently of one another, and receiving an inbound TCP segment with the streamer.
摘要翻译：一种用于在TCP（传输控制协议），iSCSI（因特网小型计算机系统接口）和RDMA（远程直接存储器访问）TCP上使用的网络加速架构中接收数据的方法，包括提供称为流传输器的硬件加速引擎，适用于与支持TCP，iSCSI和RDMA over TCP的系统中的消费者应用程序进行通信和处理数据，提供适于执行TCP实现的软件协议处理器，称为TCE（TCP控制引擎）的软件控制处理器，其中所述流送器和所述TCE适于彼此异步地且独立地操作，并且与所述流送器接收入站TCP段。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式