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91. 发明申请

US20100072042A1 MEMORY ELEMENTS AND CROSS POINT SWITCHES AND ARRAYS OF SAME USING NONVOLATILE NANOTUBE BLOCKS 有权
标题翻译：存储元件和交叉点开关及其使用非挥发性纳米管块的阵列
公开(公告)号：US20100072042A1
公开(公告)日：2010-03-25
申请号：US12511779
申请日：2009-07-29
申请人： Claude L. Bertin , X. M. H. Huang , Thomas Rueckes , Ramesh Sivarajan
发明人： Claude L. Bertin , X. M. H. Huang , Thomas Rueckes , Ramesh Sivarajan
IPC分类号： H01H59/00 , H01H36/00
CPC分类号： G11C5/063 , B82Y10/00 , G11C13/0002 , G11C13/0021 , G11C13/025 , G11C17/16 , G11C17/165 , G11C2213/19 , G11C2213/77 , G11C2213/79 , H01L27/10 , H01L27/105 , H01L27/1052 , H01L27/112 , H01L29/0665 , H01L29/0669 , H01L29/0673 , H01L51/0048 , H01L51/0591 , Y10S977/943
摘要： Under one aspect, a covered nanotube switch includes: (a) a nanotube element including an unaligned plurality of nanotubes, the nanotube element having a top surface, a bottom surface, and side surfaces; (b) first and second terminals in contact with the nanotube element, wherein the first terminal is disposed on and substantially covers the entire top surface of the nanotube element, and wherein the second terminal contacts at least a portion of the bottom surface of the nanotube element; and (c) control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube element can switch between a plurality of electronic states in response to a corresponding plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube element provides an electrical pathway of different resistance between the first and second terminals.
摘要翻译：在一个方面，覆盖的纳米管开关包括：（a）包括不对齐的多个纳米管的纳米管元件，所述纳米管元件具有顶表面，底表面和侧表面; （b）与纳米管元件接触的第一和第二端子，其中第一端子设置在并基本上覆盖纳米管元件的整个顶表面，并且其中第二端子接触纳米管的底表面的至少一部分元件; 和（c）能够向第一和第二端子施加电刺激的控制电路。纳米管元件可以响应于由控制电路施加到第一和第二端子的对应的多个电刺激而在多个电子状态之间切换。对于每个不同的电子状态，纳米管元件提供在第一和第二端子之间具有不同电阻的电路径。

92. 发明授权

US07598544B2 Hybrid carbon nanotude FET(CNFET)-FET static RAM (SRAM) and method of making same 有权
标题翻译：混合碳[纳米管]纳米管FET（CNFET）-FET静态RAM（SRAM）及其制造方法
公开(公告)号：US07598544B2
公开(公告)日：2009-10-06
申请号：US11332080
申请日：2006-01-13
申请人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Frank Guo
发明人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Frank Guo
IPC分类号： H01L27/11 , H01L21/8244
CPC分类号： G11C13/0033 , B82Y10/00 , G11C11/412 , G11C13/025 , G11C2213/17 , H01L27/0688 , H01L27/11 , H01L27/1104 , H01L27/1108 , H01L27/283 , H01L51/0048 , H01L51/0516 , H01L51/0545 , Y10S257/903 , Y10S977/762 , Y10S977/938
摘要： Hybrid carbon nanotube FET (CNFET), static ram (SRAM) and method of making same. A static ram memory cell has two cross-coupled semiconductor-type field effect transistors (FETs) and two nanotube FETs (NTFETs), each having a channel region made of at least one semiconductive nanotube, a first NTFET connected to the drain or source of the first semiconductor-type FET and the second NTFET connected to the drain or source of the second semiconductor-type FET.
摘要翻译：混合碳纳米管FET（CNFET），静态RAM（SRAM）及其制造方法。静态柱式存储单元具有两个交叉耦合半导体型场效应晶体管（FET）和两个纳米管FET（NTFET），每个具有由至少一个半导体纳米管制成的沟道区域，第一NTFET连接到漏极或源极连接到第二半导体型FET的漏极或源极的第一半导体型FET和第二NTFET。

93. 发明授权

US07598127B2 Nanotube fuse structure 有权
标题翻译：纳米管保险丝结构
公开(公告)号：US07598127B2
公开(公告)日：2009-10-06
申请号：US11284503
申请日：2005-11-22
申请人： Bruce J. Whitefield , Derryl D. J. Allman , Thomas Rueckes , Claude L. Bertin
发明人： Bruce J. Whitefield , Derryl D. J. Allman , Thomas Rueckes , Claude L. Bertin
IPC分类号： H01L21/86
CPC分类号： H01L23/5258 , H01L23/5256 , H01L2924/0002 , Y10S977/742 , H01L2924/00
摘要： A method of forming a carbon nanotube fuse by depositing a carbon nanotube layer, then depositing a cap layer directly over the carbon nanotube layer. The cap layer is formed of a material that has an insufficient amount of oxygen to significantly oxidize the carbon nanotube layer under operating conditions, and is otherwise sufficiently robust to protect the carbon nanotube layer from oxygen and plasmas. A photoresist layer is formed over the cap layer, and the photoresist layer is patterned to define a desired size of fuse. Both the cap layer and the carbon nanotube layer are completely etched, without removing the photoresist layer, to define the fuse having two ends in the carbon nanotube layer. Just the cap layer is etched, without removing the photoresist layer, so as to reduce the cap layer by a desired amount at the edges of the cap layer under the photoresist layer, without damaging the carbon nanotube layer. The photoresist layer is removed, and electrically conductive contacts are formed on each of the two ends of the fuse.
摘要翻译：通过沉积碳纳米管层形成碳纳米管熔丝，然后在碳纳米管层上直接沉积覆盖层的方法。盖层由具有不足量的氧的材料形成，以在操作条件下显着地氧化碳纳米管层，否则足够坚固以保护碳纳米管层免受氧气和等离子体的影响。在盖层上形成光致抗蚀剂层，并且将光致抗蚀剂层图案化以限定所需尺寸的熔丝。完全蚀刻盖层和碳纳米管层，而不去除光致抗蚀剂层，以限定在碳纳米管层中具有两端的熔丝。只是盖层被蚀刻，而不去除光致抗蚀剂层，以便在光致抗蚀剂层下的盖层的边缘处将盖层减少所需量，而不损害碳纳米管层。去除光致抗蚀剂层，并且在熔丝的两端的每一端上形成导电触点。

94. 发明授权

US08580586B2 Memory arrays using nanotube articles with reprogrammable resistance 有权
公开(公告)号：US08580586B2
公开(公告)日：2013-11-12
申请号：US12354102
申请日：2009-01-15
申请人： Claude L. Bertin , Frank Guo , Thomas Rueckes , Steven L. Konsek , Mitchell Meinhold , Max Strasburg , Ramesh Sivarajan , X. M. Henry Huang
发明人： Claude L. Bertin , Frank Guo , Thomas Rueckes , Steven L. Konsek , Mitchell Meinhold , Max Strasburg , Ramesh Sivarajan , X. M. Henry Huang
IPC分类号： H01L21/00
CPC分类号： G11C13/025 , B82Y10/00 , G11C13/0002 , G11C2213/16 , G11C2213/19 , G11C2213/35 , G11C2213/79
摘要： A memory array includes a plurality of memory cells, each of which receives a bit line, a first word line, and a second word line. Each memory cell includes a cell selection circuit, which allows the memory cell to be selected. Each memory cell also includes a two-terminal switching device, which includes first and second conductive terminals in electrical communication with a nanotube article. The memory array also includes a memory operation circuit, which is operably coupled to the bit line, the first word line, and the second word line of each cell. The circuit can select the cell by activating an appropriate line, and can apply appropriate electrical stimuli to an appropriate line to reprogrammably change the relative resistance of the nanotube article between the first and second terminals. The relative resistance corresponds to an informational state of the memory cell.

95. 发明授权

US08362525B2 Field effect device having a channel of nanofabric and methods of making same 有权
标题翻译：具有纳米通道的场效应器件及其制造方法
公开(公告)号：US08362525B2
公开(公告)日：2013-01-29
申请号：US11332529
申请日：2006-01-13
申请人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Frank Guo
发明人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Frank Guo
IPC分类号： H01L21/335 , H01L21/336 , H01L29/76
CPC分类号： B82Y10/00 , H01L21/823807 , H01L51/0048 , H01L51/0052 , H01L51/0508 , H01L51/0541
摘要： Field effect devices having channels of nanofabric and methods of making same. A nanotube field effect transistor is made to have a substrate, and a drain region and a source region in spaced relation relative to each other. A channel region is formed from a fabric of nanotubes, in which the nanotubes of the channel region are substantially all of the same semiconducting type of nanotubes. At least one gate is formed in proximity to the channel region so that the gate may be used to modulate the conductivity of the channel region so that a conductive path may be formed between the drain and source region. Forming a channel region includes forming a fabric of nanotubes in which the fabric has both semiconducting and metallic nanotubes and the fabric is processed to remove substantially all of the metallic nanotubes.
摘要翻译：具有纳米级通道的场效应器件及其制造方法。使纳米管场效应晶体管具有衬底，以及相对于彼此间隔开的漏极区域和源极区域。通道区域由纳米管的织物形成，其中沟道区的纳米管基本上都是相同的半导体类型的纳米管。在通道区域附近形成至少一个栅极，使得栅极可用于调制沟道区域的导电性，使得可以在漏极和源极区域之间形成导电路径。形成通道区域包括形成纳米管织物，其中织物具有半导体和金属纳米管，并且织物被处理以去除基本上所有的金属纳米管。

96. 发明授权

US08319205B2 Nonvolatile nanotube programmable logic devices and a nonvolatile nanotube field programmable gate array using same 有权
公开(公告)号：US08319205B2
公开(公告)日：2012-11-27
申请号：US12536815
申请日：2009-08-06
申请人： Claude L. Bertin , Thomas Rueckes , H. M. Manning
发明人： Claude L. Bertin , Thomas Rueckes , H. M. Manning
IPC分类号： H01L29/66
CPC分类号： G11C13/0069 , B82Y10/00 , G11C13/0004 , G11C13/0007 , G11C13/004 , G11C13/0061 , G11C13/025 , G11C23/00 , G11C29/02 , G11C29/021 , G11C29/023 , G11C29/028 , G11C2013/0042 , G11C2013/0054 , G11C2213/35 , G11C2213/82 , H03K19/17728 , H03K19/17736 , H03K19/1776 , H03K19/1778 , H03K19/17796 , Y10S977/94
摘要： Field programmable device (FPD) chips with large logic capacity and field programmability that are in-circuit programmable are described. FPDs use small versatile nonvolatile nanotube switches that enable efficient architectures for dense low power and high performance chip implementations and are compatible with low cost CMOS technologies and simple to integrate.

97. 发明授权

US08217490B2 Nonvolatile nanotube diodes and nonvolatile nanotube blocks and systems using same and methods of making same 有权
标题翻译：非挥发性纳米管二极管和非易失性纳米管块及使用其的系统及其制造方法
公开(公告)号：US08217490B2
公开(公告)日：2012-07-10
申请号：US11835856
申请日：2007-08-08
申请人： Claude L. Bertin , Thomas Rueckes , X. M. Henry Huang , Ramesh Sivarajan , Eliodor G. Ghenciu , Steven L. Konsek , Mitchell Meinhold , Jonathan W. Ward , Darren K. Brock
发明人： Claude L. Bertin , Thomas Rueckes , X. M. Henry Huang , Ramesh Sivarajan , Eliodor G. Ghenciu , Steven L. Konsek , Mitchell Meinhold , Jonathan W. Ward , Darren K. Brock
IPC分类号： G11C11/56 , G11C5/00 , H01L29/00
CPC分类号： H01L27/1021 , B82Y10/00 , G11C13/025 , G11C2213/19 , G11C2213/71 , G11C2213/72 , H01L21/8221 , H01L27/0688 , H01L27/1203 , Y10S977/943
摘要： Under one aspect, a non-volatile nanotube switch includes a first terminal; a nanotube block including a multilayer nanotube fabric, at least a portion of which is positioned over and in contact with at least a portion of the first terminal; a second terminal, at least a portion of which is positioned over and in contact with at least a portion of the nanotube block, wherein the nanotube block is constructed and arranged to prevent direct physical and electrical contact between the first and second terminals; and control circuitry capable of applying electrical stimulus to the first and second terminals. The nanotube block can switch between a plurality of electronic states in response to a plurality of electrical stimuli applied by the control circuitry to the first and second terminals. For each different electronic state, the nanotube block provides an electrical pathway of different resistance between the first and second terminals.
摘要翻译：在一个方面，非挥发性纳米管开关包括第一端子; 纳米管块，其包括多层纳米管织物，其至少一部分位于所述第一端子的至少一部分上方并与其接触; 第二端子，其至少一部分定位在所述纳米管块的至少一部分上方并与所述纳米管块的至少一部分接触，其中所述纳米管块被构造和布置成防止所述第一和第二端子之间的直接物理和电接触; 以及能够向第一和第二终端施加电刺激的控制电路。响应于由控制电路施加到第一和第二端子的多个电刺激，纳米管块可以在多个电子状态之间切换。对于每个不同的电子状态，纳米管块提供在第一和第二端子之间具有不同电阻的电路径。

98. 发明授权

US07986546B2 Non-volatile shadow latch using a nanotube switch 有权
标题翻译：使用纳米管开关的非易失性阴影锁存器
公开(公告)号：US07986546B2
公开(公告)日：2011-07-26
申请号：US12165007
申请日：2008-06-30
申请人： Claude L. Bertin , Frank Guo , Thomas Rueckes , Steven L. Konsek , Mitchell Meinhold , Max Strasburg , Ramesh Sivarajan , X. M. Henry Huang
发明人： Claude L. Bertin , Frank Guo , Thomas Rueckes , Steven L. Konsek , Mitchell Meinhold , Max Strasburg , Ramesh Sivarajan , X. M. Henry Huang
IPC分类号： G11C11/00
CPC分类号： G11C13/025 , B82Y10/00 , G11C13/0002 , G11C14/0054 , G11C2213/19 , G11C2213/35 , Y10S977/943
摘要： A non-volatile memory cell includes a volatile storage device that stores a corresponding logic state in response to electrical stimulus; and a shadow memory device coupled to the volatile storage device. The shadow memory device receives and stores the corresponding logic state in response to electrical stimulus. The shadow memory device includes a non-volatile nanotube switch that stores the corresponding state of the shadow device.
摘要翻译：非易失性存储单元包括：易失性存储装置，其响应于电刺激而存储对应的逻辑状态; 以及耦合到所述易失性存储装置的影子存储装置。影子存储装置响应于电刺激而接收和存储对应的逻辑状态。影子存储装置包括存储影子装置的相应状态的非易失性纳米管开关。

99. 发明申请

US20110156009A1 COMPACT ELECTRICAL SWITCHING DEVICES WITH NANOTUBE ELEMENTS, AND METHODS OF MAKING SAME 有权
标题翻译：具有纳米元件的紧凑型电气开关装置及其制造方法
公开(公告)号：US20110156009A1
公开(公告)日：2011-06-30
申请号：US12651288
申请日：2009-12-31
申请人： H. Montgomery Manning , Thomas Rueckes , Claude L. Bertin
发明人： H. Montgomery Manning , Thomas Rueckes , Claude L. Bertin
IPC分类号： H01L51/10 , H01L51/40
CPC分类号： B82Y10/00 , G11C13/025 , H01L27/24 , H01L29/0665 , H01L29/43 , H01L51/0048 , Y10S977/742 , Y10S977/936
摘要： An electrical device includes a substrate; first and second active areas; first and second word lines disposed in a first plane; first and second bit lines in a second plane and in electrical communication with first and second active areas; and a reference line disposed in a third plane. A nanotube element disposed in a fourth plane is in electrical communication with first and second active areas and the reference line via electrical connections at a first surface of the nanotube element. The nanotube element includes first and second regions having resistance states that are independently adjustable in response to electrical stimuli, wherein the first and second regions nonvolatilely retain the resistance states. Arrays of such electrical devices can be formed as nonvolatile memory devices. Methods for fabricating such devices are also disclosed.
摘要翻译：电气装置包括基板; 第一和第二活跃区域; 布置在第一平面中的第一和第二字线; 第一和第二位线在第二平面中并且与第一和第二有效区域电连通; 以及设置在第三平面中的参考线。设置在第四平面中的纳米管元件通过在纳米管元件的第一表面处的电连接与第一和第二有源区域和参考线路电连通。纳米管元件包括具有响应于电刺激可独立调节的电阻状态的第一和第二区域，其中第一和第二区域非常地保持电阻状态。这种电气装置的阵列可以形成为非易失性存储装置。还公开了制造这种装置的方法。

100. 发明授权

US07948054B2 Two-terminal nanotube devices and systems and methods of making same 有权
标题翻译：两端纳米管装置及其制造方法
公开(公告)号：US07948054B2
公开(公告)日：2011-05-24
申请号：US12861046
申请日：2010-08-23
申请人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Max Strasburg , Frank Guo , X. M. Henry Huang , Ramesh Sivarajan
发明人： Claude L. Bertin , Mitchell Meinhold , Steven L. Konsek , Thomas Rueckes , Max Strasburg , Frank Guo , X. M. Henry Huang , Ramesh Sivarajan
IPC分类号： G11C11/56 , G11C5/00 , H01L29/00
CPC分类号： H01L27/112 , B82Y10/00 , G11C13/0002 , G11C13/025 , G11C17/16 , G11C17/165 , G11C2213/19 , G11C2213/77 , G11C2213/79 , H01L27/1052 , Y10S977/943
摘要： A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device.
摘要翻译：二端存储器件包括第一和第二导电端子和纳米管制品。该制品具有至少一个纳米管，并且与第一和第二端子中的每一个的至少一部分重叠。该装置还包括与第一和第二端子中的至少一个电连通的刺激电路。电路能够将第一和第二电刺激施加到第一和第二端子中的至少一个，以在相对较高电阻和相对较低电阻之间改变第一和第二端子之间的器件的相对电阻。第一和第二端子之间的相对高的电阻对应于器件的第一状态，并且第一和第二端子之间的相对较低的电阻对应于器件的第二状态。

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