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    • 91. 发明授权
    • Multi-band broadband planar antennas
    • 多频宽带平面天线
    • US06917339B2
    • 2005-07-12
    • US10671848
    • 2003-09-25
    • RongLin LiEmmanouil M. TentzerisJoy Laskar
    • RongLin LiEmmanouil M. TentzerisJoy Laskar
    • H01Q1/24H01Q5/00H01Q5/371H01Q5/378H01Q7/00H01Q9/30H01Q9/42H01Q11/12H01Q21/30
    • H01Q9/30H01Q5/371H01Q5/378H01Q9/42H01Q21/30
    • Antennas of broadband and multi-band operation are presented. A broadband planar antenna includes two inverted-L antennas (ILAs) facing each other across a gap. One of the ILAs is input fed, and the other is electromagnetically coupled. The positioning of the gap affects the bandwidth. A dual-band planar antenna includes two ILAs facing each other across a gap with one of the ILAs being input fed, and the other being coupled. This dual-band planar antenna also includes a monopole antenna disposed between the two ILAs. A triple-band planar antenna includes two ILAs facing each other across a gap with one of the ILAs being input fed and the other IPA being coupled. This triple-band antenna also includes a monopole antenna disposed between the two ILAs, and a conductor extending horizontally from the monopole antenna towards, but not reaching the coupled ILA. Another dual-band antenna includes an inner cut loop antenna encompassed by an outer cut loop antenna. Each of the cut loop antennas includes two ILAs with one of the ILAs being input fed and the other being coupled.
    • 介绍了宽带和多频段操作的天线。 宽带平面天线包括跨越间隙彼此面对的两个倒L型天线(ILA)。 其中一个ILA被输入馈电,另一个是电磁耦合的。 间隙的定位会影响带宽。 双频平面天线包括跨越间隙的两个ILA,其中一个ILA被输入馈送,另一个被耦合。 该双频平面天线还包括设置在两个ILA之间的单极天线。 一个三频带平面天线包括两个ILAs在间隙上相互面对,其中一个ILA被输入馈送,而另一个IPA被耦合。 该三频带天线还包括设置在两个ILA之间的单极天线,以及从单极天线向水平延伸但未到达耦合的ILA的导体。 另一个双频带天线包括由外切环形天线包围的内切环天线。 每个切割环形天线包括两个ILA,其中一个ILA被输入馈送,另一个耦合。
    • 95. 发明授权
    • Linearization systems and methods for variable attenuators
    • 可变衰减器的线性化系统和方法
    • US08179205B2
    • 2012-05-15
    • US12784723
    • 2010-05-21
    • Yanyu HuangWangmyong WooChang-Ho LeeJoy Laskar
    • Yanyu HuangWangmyong WooChang-Ho LeeJoy Laskar
    • H01P1/22
    • H01P1/22H03G1/007H03H11/245
    • Systems and methods for provided for linearization systems and methods for variable attenuators. The variable attenuators can include series transistors along a main signal path from the input to output, as well as shunt transistors. A bootstrapping body bias circuit can be used with one or of the series transistors to allow the body of a connected transistor to swing responsive to a received RF input signal. As the RF signal increases and affects the gate-to-source voltage difference of a transistor, a bootstrapping body bias circuit can adaptively adjust the threshold voltage of the connected transistor and compensate the channel resistance variation resulting from gate-to-source voltage swing. The bootstrapping body bias circuit can be implemented using passive elements, active elements, or a combination thereof.
    • 为可变衰减器的线性化系统和方法提供的系统和方法。 可变衰减器可以包括沿着从输入到输出的主信号路径的串联晶体管,以及分流晶体管。 自举体偏置电路可以与一个或串联晶体管一起使用,以允许连接的晶体管的主体响应于接收到的RF输入信号而摆动。 随着RF信号增加并影响晶体管的栅极 - 源极电压差,自举体偏置电路可以自适应地调节连接的晶体管的阈值电压,并补偿由栅极至源极电压摆幅引起的沟道电阻变化。 自举体偏置电路可以使用无源元件,有源元件或其组合来实现。
    • 96. 发明授权
    • Systems and methods for self-mixing adaptive bias circuit for power amplifier
    • 用于功率放大器的自混合自适应偏置电路的系统和方法
    • US08106712B2
    • 2012-01-31
    • US12623136
    • 2009-11-20
    • Dong Ho LeeKyu Hwan AnChang-Ho LeeJoy Laskar
    • Dong Ho LeeKyu Hwan AnChang-Ho LeeJoy Laskar
    • H03F3/04
    • H03F1/3205H03F1/0261H03F1/223H03F3/45475H03F2200/18
    • Systems and methods for providing a self-mixing adaptive bias circuit that may include a mixer, low-pass filter or a phase shifter, and a bias feeding block. The self-mixing adaptive bias circuit may generate an adaptive bias signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit increases the bias voltage or bias current such that the amplifier will save current consumption at low power operation levels and obtain better linearity at high power operation levels compared to conventional biasing techniques. Moreover, the adaptive bias output signal can be used to cancel the third-order intermodulation terms (IM3) to further enhance the linearity as a secondary effect.
    • 用于提供可以包括混频器,低通滤波器或移相器的自混合自适应偏置电路的系统和方法以及偏置馈电块。 自混合自适应偏置电路可以根据输入信号功率电平产生自适应偏置信号。 随着输入功率电平上升,自适应偏置电路增加了偏置电压或偏置电流,使得放大器可以在低功率运行电平下节省电流消耗,并且与常规偏置技术相比,在高功率运行电平下获得更好的线性度。 此外,自适应偏置输出信号可以用于消除三阶互调项(IM3),以进一步增强作为次级效应的线性。
    • 97. 发明申请
    • LINEARIZATION SYSTEMS AND METHODS FOR VARIABLE ATTENUATORS
    • 线性化系统和变量衰减器的方法
    • US20110285481A1
    • 2011-11-24
    • US12784723
    • 2010-05-21
    • Yanyu HuangWangmyong WooChang-Ho LeeJoy Laskar
    • Yanyu HuangWangmyong WooChang-Ho LeeJoy Laskar
    • H01P1/22
    • H01P1/22H03G1/007H03H11/245
    • Systems and methods for provided for linearization systems and methods for variable attenuators. The variable attenuators can include series transistors along a main signal path from the input to output, as well as shunt transistors. A bootstrapping body bias circuit can be used with one or of the series transistors to allow the body of a connected transistor to swing responsive to a received RF input signal. As the RF signal increases and affects the gate-to-source voltage difference of a transistor, a bootstrapping body bias circuit can adaptively adjust the threshold voltage of the connected transistor and compensate the channel resistance variation resulting from gate-to-source voltage swing. The bootstrapping body bias circuit can be implemented using passive elements, active elements, or a combination thereof.
    • 为可变衰减器的线性化系统和方法提供的系统和方法。 可变衰减器可以包括沿着从输入到输出的主信号路径的串联晶体管,以及分流晶体管。 自举体偏置电路可以与一个或串联晶体管一起使用,以允许连接的晶体管的主体响应于接收到的RF输入信号而摆动。 随着RF信号增加并影响晶体管的栅极 - 源极电压差,自举体偏置电路可以自适应地调节连接的晶体管的阈值电压,并补偿由栅极至源极电压摆幅引起的沟道电阻变化。 自举体偏置电路可以使用无源元件,有源元件或其组合来实现。
    • 98. 发明授权
    • Integrated power amplifiers for use in wireless communication devices
    • 用于无线通信设备的集成功率放大器
    • US07961048B2
    • 2011-06-14
    • US12623164
    • 2009-11-20
    • Michael Alan OakleyDong Ho LeeKyu Hwan AnChang-Ho LeeJoy Laskar
    • Michael Alan OakleyDong Ho LeeKyu Hwan AnChang-Ho LeeJoy Laskar
    • H03F3/68
    • H03F3/45188H03F1/0288H03F3/211H03F3/604
    • An integrated power amplifier can include a carrier amplifier, where the carrier amplifier is connected to a first quarter wave transformer at the input of the carrier amplifier. In addition, the power amplifier can further include at least one peaking amplifier connected in parallel with the carrier amplifier; a first differential combining structure, where the first combining structure includes a first plurality of quarter wave transformers that are configured to combine respective first differential outputs of the carrier amplifier in phase to generate a first single-ended output signal, and a second differential combining structure, where the second combining structures includes a second plurality of quarter wave transformers that are configured to combine respective second differential outputs of the at least one peaking amplifier in phase to generate a second single-ended output signal, where the first single-ended output signal and the second single-ended output signal are combinable in-phase to provide an overall output.
    • 集成功率放大器可以包括载波放大器,其中载波放大器在载波放大器的输入处连接到第一四分之一波长的变压器。 此外,功率放大器还可以包括与载波放大器并联连接的至少一个峰值放大器; 第一差分组合结构,其中所述第一组合结构包括第一多个四分之一波长变换器,其被配置为相位地组合所述载波放大器的相应的第一差分输出以产生第一单端输出信号,以及第二差分组合结构 ,其中所述第二组合结构包括第二多个四分之一波长变换器,其被配置为组合所述至少一个峰值放大器的相应的第二差分输出以产生第二单端输出信号,其中所述第一单端输出信号 并且第二单端输出信号可同步地组合以提供总体输出。
    • 99. 发明授权
    • Feedback biasing for cascode amplifiers
    • 共源共栅放大器的反馈偏置
    • US07944311B1
    • 2011-05-17
    • US12641052
    • 2009-12-17
    • Hamhee JeonChang-Ho LeeJoy Laskar
    • Hamhee JeonChang-Ho LeeJoy Laskar
    • H03F3/04
    • H03F3/245H03F1/223H03F1/56H03F3/193H03F2200/222H03F2200/318H03F2200/387H03F2200/411H03F2200/451
    • A system for a power transmitter may be provided. The system may include a first amplifier stage having at least a first transistor and a second transistor that are connected in a first cascode configuration; a second amplifier stage having at least a third transistor and a fourth transistor that are connected in a second cascode configuration, where the first transistor receives a system input of the power transmitter, where the second transistor is connected to the third transistor, and where the fourth transistor provides a system output of the power transmitter; and a feedback network that connects a first gate or base of the fourth transistor with a second gate or base of the second transistor.
    • 可以提供用于功率发射器的系统。 该系统可以包括具有以第一共源共栅配置连接的至少第一晶体管和第二晶体管的第一放大器级; 具有至少第三晶体管和第四晶体管的第二放大器级,所述第三晶体管和第四晶体管以第二共源共栅配置连接,其中所述第一晶体管接收所述功率发射器的系统输入,其中所述第二晶体管连接到所述第三晶体管, 第四晶体管提供功率发射器的系统输出; 以及将第四晶体管的第一栅极或基极与第二晶体管的第二栅极或基极连接的反馈网络。