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    • 91. 发明授权
    • C-BiCMOS semiconductor device
    • C-BiCMOS半导体器件
    • US5319234A
    • 1994-06-07
    • US916666
    • 1992-07-22
    • Kimiharu UgaHiroki HondaMasahiro IshidaYoshiyuki Ishigaki
    • Kimiharu UgaHiroki HondaMasahiro IshidaYoshiyuki Ishigaki
    • H01L21/8249H01L27/06H01L27/02
    • H01L27/0623
    • There is disclosed a C-BiCMOS semiconductor device in which a base electrode (300) of an NPN bipolar transistor and a drain electrode (360) of a PMOS transistor are formed of the same polycrystalline semiconductor, in which a base electrode (310) of a PNP bipolar transistor and a drain electrode (350) of an NMOS transistor are formed of the same polycrystalline semiconductor, and in which a source electrode (530) of the PMOS transistor and a source electrode (520) of the NMOS transistor are formed of aluminium wiring. The C-BiCMOS semiconductor device achieves preferable electric conductivity in the source electrodes, size reduction in the drain electrodes, and simplified process steps in the formation of the base electrodes of the bipolar transistors, so that the size of the devices is reduced in simple process steps without deterioration of the electric conductivity.
    • 公开了一种C-BiCMOS半导体器件,其中NPN双极晶体管的基极(300)和PMOS晶体管的漏电极(360)由相同的多晶半导体形成,其中基极(310)为 NMOS晶体管的PNP双极晶体管和漏电极(350)由相同的多晶半导体形成,其中PMOS晶体管的源电极(530)和NMOS晶体管的源电极(520)由 铝接线。 C-BiCMOS半导体器件在源电极中实现优选的导电性,漏电极的尺寸减小,以及双极晶体管的基极形成中的简化工艺步骤,从而在简单的工艺中减小器件的尺寸 步骤不劣化导电性。