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91. 发明授权

US07816712B2 Thin film transistor array and method of manufacturing the same 有权
标题翻译：薄膜晶体管阵列及其制造方法
公开(公告)号：US07816712B2
公开(公告)日：2010-10-19
申请号：US11986330
申请日：2007-11-20
申请人： Jong-Hyun Choung , Hong-Sick Park , Joo-Ae Youn , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Byeong-Jin Lee
发明人： Jong-Hyun Choung , Hong-Sick Park , Joo-Ae Youn , Sun-Young Hong , Bong-Kyun Kim , Won-Suk Shin , Byeong-Jin Lee
IPC分类号： H01L31/113
CPC分类号： H01L27/124 , H01L27/1214 , H01L27/1255 , H01L27/1288 , H01L29/4908
摘要： A thin film transistor array and method of manufacturing the same include a pixel electrode formed of a transparent conductive layer on a substrate, a gate line formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate electrode connected to the gate line and formed of the transparent conductive layer and an opaque conductive layer on the substrate, a gate insulating layer which covers the gate line and the gate electrode, a semiconductor layer formed on the gate insulating layer to overlap the gate electrode, a data line which intersects the gate line, a source electrode connected to the data line to overlap a part of the semiconductor layer, and a drain electrode connected to the pixel electrode to overlap a part of the semiconductor layer.
摘要翻译：薄膜晶体管阵列及其制造方法包括由基板上的透明导电层形成的像素电极，由透明导电层形成的栅极线和基板上的不透明导电层，连接到栅极的栅电极并且在基板上形成透明导电层和不透明导电层，覆盖栅极线和栅极的栅极绝缘层，形成在栅极绝缘层上以与栅电极重叠的半导体层，数据线，与栅极线相交，连接到数据线的源电极与半导体层的一部分重叠，以及连接到像素电极以与半导体层的一部分重叠的漏电极。

92. 发明申请

US20100155730A1 THIN FILM TRANSISTOR DISPLAY PANEL AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：薄膜晶体管显示面板及其制造方法
公开(公告)号：US20100155730A1
公开(公告)日：2010-06-24
申请号：US12481158
申请日：2009-06-09
申请人： Sun-Young HONG , Young-Joo CHOI , Nam-Seok SUH , Hong-Sick PARK , Jong-Hyun CHOUNG , Bong-Kyun KIM , Byeong-Jin LEE
发明人： Sun-Young HONG , Young-Joo CHOI , Nam-Seok SUH , Hong-Sick PARK , Jong-Hyun CHOUNG , Bong-Kyun KIM , Byeong-Jin LEE
IPC分类号： H01L33/00 , H01L21/336 , H01L29/786
CPC分类号： H01L27/1288 , H01L27/1214 , H01L27/1225 , H01L27/1255
摘要： In the manufacturing process of the thin film transistor array panel according to an exemplary embodiment of the present invention using three masks, the metal oxide semiconductor or the transparent conductive oxide is used, thereby executing an efficient lift-off process.
摘要翻译：在根据使用三个掩模的本发明的示例性实施例的薄膜晶体管阵列面板的制造过程中，使用金属氧化物半导体或透明导电氧化物，从而执行有效的剥离处理。

93. 发明申请

US20100149476A1 DISPLAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：显示基板及其制造方法
公开(公告)号：US20100149476A1
公开(公告)日：2010-06-17
申请号：US12534300
申请日：2009-08-03
申请人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
发明人： Do-Hyun KIM , Jong-Hyun CHOUNG , Young-Joo CHOI , Hong-Sick PARK , Tae-Hyung IHN , Dong-Hoon LEE , Pil-Sang YUN , Je-Hyeong PARK , Chang-Oh JEONG , Je-Hun LEE , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Nam-Seok SUH
IPC分类号： G02F1/1333 , B05D5/12 , B44C1/22
CPC分类号： G02F1/136286 , G02F2001/133302 , G02F2001/136295
摘要： A display substrate includes; a base substrate, a deformation preventing layer disposed on a lower surface of the base substrate, wherein the deformation preventing layer applies a force to the base substrate to prevent the base substrate from bending, a gate line disposed on an upper surface of the base substrate, a data line disposed on the base substrate, and a pixel electrode disposed on the base substrate.
摘要翻译：显示基板包括：基底基板，设置在基底基板的下表面的变形防止层，其中变形防止层向基底基板施加力以防止基底基板弯曲，设置在基底基板的上表面上的栅极线设置在基底基板上的数据线，以及配置在基底基板上的像素电极。

94. 发明申请

US20100099595A1 MANUFACTURING AND CLEANSING OF THIN FILM TRANSISTOR PANELS 有权
标题翻译：薄膜晶体管面板的制造和清洁
公开(公告)号：US20100099595A1
公开(公告)日：2010-04-22
申请号：US12645471
申请日：2009-12-22
申请人： Hong-Sick Park
发明人： Hong-Sick Park
IPC分类号： C11D7/32
CPC分类号： C11D11/0047 , C11D7/263 , C11D7/3281
摘要： A manufacturing a thin film transistor array panel includes depositing a first thin film including aluminum on a substrate, patterning the first thin film by photolithography and etching, cleansing the substrate including the first thin film, and depositing a second thin film on the cleansed substrate. The cleansing is performed using a cleansing material including ultrapure water, cyclic amine, pyrogallol, benzotrizole, and methyl glycol. The cleansing material includes ultrapure water at about 85 wt % to about 99 wt %, cyclic amine at about 0.01 wt % to about 1.0 wt %, pyrogallol at about 0.01 wt % to 1.0 wt %, benzotrizole at about 0.01 wt % to 1.0 wt %, and methyl glycol at about 0.01 wt % to 1.0 wt %.
摘要翻译：制造薄膜晶体管阵列面板包括在基板上沉积包括铝的第一薄膜，通过光刻和蚀刻对第一薄膜进行图案化，清洗包括第一薄膜的基板，以及在清洁的基板上沉积第二薄膜。使用包括超纯水，环胺，连苯三酚，苯并三唑和甲基二醇的清洁材料进行清洁。清洁材料包括约85重量％至约99重量％的超纯水，约0.01重量％至约1.0重量％的环胺，约0.01重量％至1.0重量％的连苯三酚，约0.01重量％至1.0重量％的苯并三唑％和约0.01重量％至1.0重量％的甲基二醇。

95. 发明申请

US20090170037A1 COMPOSITION FOR REMOVING PHOTORESIST AND METHOD OF MANUFACTURING AN ARRAY SUBSTRATE USING THE SAME 有权
标题翻译：用于去除光电元件的组合物和使用其制造阵列基板的方法
公开(公告)号：US20090170037A1
公开(公告)日：2009-07-02
申请号：US12323649
申请日：2008-11-26
申请人： Jong-Hyun CHOUNG , Hong-Sick Park , Sun-Young Hong , Bong-Kyun Kim , Byeoung-Jin Lee , Byung-Uk Kim , Jong-Hyun Jeong , Suk-Il Yoon , Sung-Gun Shin , Soon-Beom Huh , Se-Hwan Jung , Doo-Young Jang
发明人： Jong-Hyun CHOUNG , Hong-Sick Park , Sun-Young Hong , Bong-Kyun Kim , Byeoung-Jin Lee , Byung-Uk Kim , Jong-Hyun Jeong , Suk-Il Yoon , Sung-Gun Shin , Soon-Beom Huh , Se-Hwan Jung , Doo-Young Jang
IPC分类号： G03F7/20 , G03F7/42
CPC分类号： G03F7/425
摘要： A composition for removing a photoresist includes a) an amine compound having a cyclic amine and/or a diamine, b) a glycol ether compound, c) a corrosion inhibitor and d) a polar solvent. The composition further includes a stripping promoter. Further disclosed is a method of manufacturing an array substrate using the composition for removing a photoresist.
摘要翻译：用于除去光致抗蚀剂的组合物包括a）具有环胺和/或二胺的胺化合物，b）二醇醚化合物，c）缓蚀剂和d）极性溶剂。组合物还包括剥离促进剂。进一步公开了使用除去光致抗蚀剂的组合物制造阵列基板的方法。

96. 发明申请

US20090121228A1 ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：阵列基板及其制造方法
公开(公告)号：US20090121228A1
公开(公告)日：2009-05-14
申请号：US12269748
申请日：2008-11-12
申请人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
发明人： Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Yopung-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136295 , H01L27/1218 , H01L27/124 , H01L27/1288
摘要： A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
摘要翻译：栅极线包括形成在基底基板上的第一籽晶层和形成在第一籽晶层上的第一金属层。在基底基板上形成第一绝缘层。在基底基板上形成第二绝缘层。这里，在与栅极线交叉的方向上通过第二绝缘层形成线沟槽。数据线包括形成在线沟槽下方的第二晶种层和形成在线沟槽中的第二金属层。像素电极形成在基底基板的像素区域中。因此，使用绝缘层形成预定深度的沟槽，并且通过电镀方法形成金属层，从而可以形成具有足够厚度的金属线。

97. 发明授权

US07462895B2 Signal line for display device and thin film transistor array panel including the signal line 有权
标题翻译：信号线用于显示器件和薄膜晶体管阵列面板，包括信号线
公开(公告)号：US07462895B2
公开(公告)日：2008-12-09
申请号：US11296603
申请日：2005-12-06
申请人： Hong-Sick Park , Shi-Yul Kim
发明人： Hong-Sick Park , Shi-Yul Kim
IPC分类号： H01L29/10
CPC分类号： H01L29/4908 , H01L27/12 , H01L27/124 , H01L29/458
摘要： A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.
摘要翻译：提出了具有低电阻率的信号线的薄膜晶体管（TFT）阵列面板。 TFT阵列面板包括绝缘基板，形成在绝缘基板上的栅极线，形成在栅极线上的栅极绝缘层，漏极电极和形成在栅极绝缘层上的源电极的数据线，具有间隙的源电极和连接到漏电极的像素电极。在一个实施例中，栅极线，数据线和漏电极中的至少一个包括由含Mo导体制成的第一导电层，由含Cu导体制成的第二导电层和第三导电层由含MoN的导体制成。

98. 发明申请

US20080224092A1 Etchant for metal 审中-公开
标题翻译：金属蚀刻剂
公开(公告)号：US20080224092A1
公开(公告)日：2008-09-18
申请号：US12075966
申请日：2008-03-14
申请人： Jong-Hyun CHOUNG , Hong-Sick PARK , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Ji-Sun LEE , Ki-Beom LEE , Sam-Young CHO , Byung-Soo KU , Hyun-Cheol SHIN , Kwi-Hong PARK , Won-Guk SEO
发明人： Jong-Hyun CHOUNG , Hong-Sick PARK , Sun-Young HONG , Bong-Kyun KIM , Byeong-Jin LEE , Ji-Sun LEE , Ki-Beom LEE , Sam-Young CHO , Byung-Soo KU , Hyun-Cheol SHIN , Kwi-Hong PARK , Won-Guk SEO
IPC分类号： C09K13/08 , C09K13/00
CPC分类号： C23F1/14 , H01L21/32134
摘要： An etchant for a metal is described. In one example, the etchant includes ammonium persulfate ((NH4)2S2O8), an azole compound and water. The etchant does not include hydrogen peroxide. Thus, the etchant may etch a metal layer including copper so that an etched copper layer has a tapered profile. Furthermore, the etchant may have a high stability to maintain etching ability for a longer time. Thus, manufacturing margins may be improved so that manufacturing costs may be reduced.
摘要翻译：描述了金属的蚀刻剂。在一个实例中，蚀刻剂包括过硫酸铵（（NH 3）2 S 2 O 2 O 8），唑化合物和水。蚀刻剂不包括过氧化氢。因此，蚀刻剂可以蚀刻包括铜的金属层，使得蚀刻的铜层具有锥形轮廓。此外，蚀刻剂可能具有高的稳定性，以保持较长时间的蚀刻能力。因此，可以提高制造裕度，从而可以降低制造成本。

99. 发明申请

US20080203390A1 METHOD FOR MANUFACTURING A SIGNAL LINE, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE THIN FILM TRANSISTOR PANEL 有权
标题翻译：用于制造信号线，薄膜晶体管板的方法和制造薄膜晶体管板的方法
公开(公告)号：US20080203390A1
公开(公告)日：2008-08-28
申请号：US11932233
申请日：2007-10-31
申请人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
发明人： Do-Hyun Kim , Won-Suk Shin , Chang-Oh Jeong , Hong-Sick Park , Eun-Guk Lee , Je-Hun Lee
IPC分类号： H01L29/49 , H01L21/44 , H01L21/84
CPC分类号： H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/458
摘要： A method for manufacturing a thin film transistor array panel includes forming a gate line on a substrate; sequentially forming a gate insulating layer, a silicon layer, and a conductor layer including a lower layer and an upper layer on the gate line, forming a photoresist film, on the conductor layer, patterning the photoresist film to form a photoresist pattern including a first portion and a second portion having a greater thickness than the first portion, etching the upper layer and the lower layer by using the photoresist pattern as art etch mask, etching the silicon layer by using the photoresist pattern as an etch mask to form a semiconductor, removing the second portion of the photoresist pattern by using an etch back process, selectively wet-etching the upper layer of the conductor layer by using the photoresist pattern as an etch mask, dry-etching the lower layer of the conductor layer by using the photoresist pattern as an etch mask to form a data line and a drain electrode including remaining upper and lower layers, and forming a pixel electrode connected to the drain electrode.
摘要翻译：一种制造薄膜晶体管阵列面板的方法，包括在基板上形成栅极线; 在栅极线上顺序地形成栅极绝缘层，硅层和包括下层和上层的导体层，在导体层上形成光致抗蚀剂膜，图案化光致抗蚀剂膜以形成包括第一部分和第二部分具有比第一部分更大的厚度，通过使用光致抗蚀剂图案作为蚀刻掩模蚀刻上层和下层，通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻硅层以形成半导体，通过使用回蚀工艺去除光致抗蚀剂图案的第二部分，通过使用光致抗蚀剂图案作为蚀刻掩模来选择性地湿法蚀刻导体层的上层，通过使用光致抗蚀剂干蚀刻导体层的下层图案作为蚀刻掩模以形成包括剩余的上层和下层的数据线和漏极，并且形成连接到漏电极的像素电极。

100. 发明申请

US20080092925A1 REMOVING PHOTORESIST FROM SUBSTRATES BY MEANS OF TREATMENT LIQUID, AND PROCESSING TREATEMENT LIQUID WITH OZONE 审中-公开
标题翻译：通过处理液从基材中除去光电子体，并用OZONE处理液体
公开(公告)号：US20080092925A1
公开(公告)日：2008-04-24
申请号：US11874013
申请日：2007-10-17
申请人： Sun-young Hong , Hong-sick Park , Jong-hyun Choung , Bong-kyun Kim , Won-suk Shin , Byeong-jin Lee , Tai-bin Im
发明人： Sun-young Hong , Hong-sick Park , Jong-hyun Choung , Bong-kyun Kim , Won-suk Shin , Byeong-jin Lee , Tai-bin Im
IPC分类号： B08B5/04
CPC分类号： H01L21/6708 , G03F7/423
摘要： A substrate is inclined when treatment liquid is ejected onto the substrate to remove photoresist from the substrate. Uniform processing of the substrate with the treatment liquid and collection of the treatment liquid are thus facilitated. Collected treatment liquid is treated with ozone and then reused.
摘要翻译：当将处理液喷射到基板上以从基板去除光致抗蚀剂时，基板倾斜。因此，利用处理液对基板进行均匀加工，并且处理液的收集便于此。收集的处理液用臭氧处理，然后再使用。

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