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91. 发明申请

US20110176369A1 ERASE VERIFICATION METHOD OF FLASH MEMORY APPARATUS 有权
标题翻译：闪存存储器的擦除验证方法
公开(公告)号：US20110176369A1
公开(公告)日：2011-07-21
申请号：US12689235
申请日：2010-01-19
申请人： Chung-Zen Chen
发明人： Chung-Zen Chen
IPC分类号： G11C16/06 , G11C16/16
CPC分类号： G11C16/344 , G11C16/3445
摘要： A suitable erase verification (ERSV) method of a flash memory apparatus is provided, which is different from the conventional ERSV method. That is, by managing the ERSV operation on the flash memory after at least once of erase operation, a flash memory controller in the flash memory apparatus selectively assigns at least one of de-selected sectors instead of all of the de-selected sectors to perform the ERSV. Therefore, by managing the ERSV operation on the flash memory, the time for the ERSV operation thereon is reduced.
摘要翻译：提供了一种与传统的ERSV方法不同的闪速存储装置的适当擦除验证（ERSV）方法。也就是说，通过在至少一次擦除操作之后在闪速存储器上管理ERSV操作，快闪存储器装置中的闪速存储器控制器选择性地分配去选择的扇区中的至少一个而不是所有去选择的扇区来执行 ERSV。因此，通过管理闪速存储器上的ERSV操作，减少了对其进行ERSV操作的时间。

92. 发明申请

US20110175684A1 TEMPERATURE-COMPENSATED RING OSCILLATOR 有权
标题翻译：温度补偿环振荡器
公开(公告)号：US20110175684A1
公开(公告)日：2011-07-21
申请号：US12689233
申请日：2010-01-19
申请人： Yi-Heng Liu
发明人： Yi-Heng Liu
IPC分类号： H03B5/04
CPC分类号： H03K3/0315 , H03K3/011 , H03K2005/00039 , H03K2005/00045 , H03K2005/00143 , H03K2005/00195
摘要： A temperature-compensated ring oscillator includes a control signal generator and a voltage controlled oscillator. The control signal generator is configured to generate at least one control signal, and includes at least one first resistor and second resistor. A first temperature coefficient of the first resistor is negative, and a second temperature coefficient of the second resistor is positive. The voltage controlled oscillator receives the control signal, outputs an oscillation signal, and has (2k+1) cascaded inverter units, where k≦1. Each of the inverter units includes a first transistor, a second transistor and an inverter. The first transistor has a drain coupled to a first supply voltage and a gate to receive the control signal. The second transistor has a source to receive a second supply voltage and a gate to receive the control signal. The inverter is coupled between the first and the second transistors.
摘要翻译：温度补偿环形振荡器包括控制信号发生器和压控振荡器。控制信号发生器被配置为产生至少一个控制信号，并且包括至少一个第一电阻器和第二电阻器。第一电阻器的第一温度系数为负，第二电阻器的第二温度系数为正。压控振荡器接收控制信号，输出振荡信号，并具有（2k + 1）级联逆变器单元，其中k＆nlE; 1。每个逆变器单元包括第一晶体管，第二晶体管和反相器。第一晶体管具有耦合到第一电源电压的漏极和用于接收控制信号的栅极。第二晶体管具有用于接收第二电源电压的源极和用于接收控制信号的栅极。反相器耦合在第一和第二晶体管之间。

93. 发明授权

US07847617B2 Charge pump and method for operating the same 有权
标题翻译：电荷泵及其操作方法
公开(公告)号：US07847617B2
公开(公告)日：2010-12-07
申请号：US11954124
申请日：2007-12-11
申请人： Chung Zen Chen
发明人： Chung Zen Chen
IPC分类号： G05F1/10
CPC分类号： G11C5/145
摘要： A charge pump comprises a ring oscillator and a pumping circuit. The ring oscillator provides a plurality of oscillating clocks. The pumping circuit includes a plurality of pumping blocks coupled to each other for outputting a boosted voltage, and each pumping block is connected to a corresponding oscillating clock.
摘要翻译：电荷泵包括环形振荡器和泵浦电路。环形振荡器提供多个振荡时钟。泵浦电路包括彼此耦合以输出升压电压的多个泵送块，并且每个泵送块连接到相应的振荡时钟。

94. 发明授权

US07746721B2 Word line driver circuit 有权
标题翻译：字线驱动电路
公开(公告)号：US07746721B2
公开(公告)日：2010-06-29
申请号：US12177885
申请日：2008-07-23
申请人： Jen-Chin Chan
发明人： Jen-Chin Chan
IPC分类号： G11C8/00
CPC分类号： G11C8/08 , G11C8/10 , G11C8/14
摘要： A sector of a word line driver circuit is provided, comprising a local reset signal generator module and m word line clusters. The m word line clusters are coupled to the local reset signal generator module. The local reset signal generator module is used to generate j reset signals. The x-th reset signal is determined according to an x-th pre-decoding signal, a bank selectable signal and a sector selectable signal, wherein j is a nature number, and x is an integer from 1 to j. Each of the m word line clusters comprises j row drivers. The x-th row driver of the y-th word line cluster determines a [x+j*(y−1)]-th word line signal according to the x-th reset signal, the x-th pre-decoding signal, the sector selectable signal, and a y-th cluster select signal, wherein m is a nature number, and y is an integer from 1 to m.
摘要翻译：提供了一种字线驱动电路的扇区，包括本地复位信号发生器模块和m个字线簇。 m个字线簇耦合到本地复位信号发生器模块。本地复位信号发生器模块用于产生j个复位信号。根据第X预解码信号，存储体可选择信号和扇区可选择信号确定第x个复位信号，其中j是自然数，x是从1到j的整数。每个m个字线簇包括j个行驱动器。第y个字线簇的第x行驱动器根据第x个复位信号，第x个预解码信号确定一个[x + j *（y-1）]个字线信号，扇区可选择信号和第y个群集选择信号，其中m是自然数，y是1至m的整数。

95. 发明授权

US07547941B2 NAND non-volatile two-bit memory and fabrication method 有权
标题翻译： NAND非易失性二位存储器和制造方法
公开(公告)号：US07547941B2
公开(公告)日：2009-06-16
申请号：US11417602
申请日：2006-05-04
申请人： Chung-Zen Chen
发明人： Chung-Zen Chen
IPC分类号： H01L29/778 , H01L29/76
CPC分类号： H01L29/7923 , G11C16/0475 , G11C16/0483 , H01L27/11568
摘要： A NAND non-volatile two-bit memory cell comprises a cell stack and two select stacks disposed on an active area of a substrate. Each select stack is respectively disposed on a side of the cell stack with a sidewall between the cell stack and a respective select stack. The cell stack has four components: a first dielectric layer disposed over the substrate; a charge accumulation layer capable of holding charge in a portion thereof to store information and disposed over the first dielectric layer; a second dielectric layer disposed over the charge accumulation layer; and a control gate disposed over the second dielectric layer. The select stack has two components: a third dielectric layer disposed over the substrate and a select gate, capable of inverting an underneath channel region to function as a source or a drain of the memory cell, disposed over the third dielectric layer.
摘要翻译： NAND非易失性2位存储单元包括设置在衬底的有源区上的单元堆叠和两个选择堆叠。每个选择堆叠分别设置在单元堆叠的一侧，其中单元堆叠和相应选择堆栈之间具有侧壁。电池堆具有四个组分：设置在衬底上的第一介电层; 能够在其一部分中保持电荷以存储信息并设置在所述第一电介质层上的电荷累积层; 设置在所述电荷累积层上的第二电介质层; 以及设置在所述第二电介质层上的控制栅极。选择堆叠具有两个部件：布置在衬底上的第三介电层和选择栅极，其能够反转设置在第三介电层上的用作存储器单元的源极或漏极的沟道区下面。

96. 发明申请

US20090146702A1 CHARGE PUMP AND METHOD FOR OPERATING THE SAME 有权
标题翻译：充电泵及其操作方法
公开(公告)号：US20090146702A1
公开(公告)日：2009-06-11
申请号：US11954124
申请日：2007-12-11
申请人： Chung Zen Chen
发明人： Chung Zen Chen
IPC分类号： H03L7/06
CPC分类号： G11C5/145
摘要： A charge pump comprises a ring oscillator and a pumping circuit. The ring oscillator provides a plurality of oscillating clocks. The pumping circuit includes a plurality of pumping blocks coupled to each other for outputting a boosted voltage, and each pumping block is connected to a corresponding oscillating clock.
摘要翻译：电荷泵包括环形振荡器和泵浦电路。环形振荡器提供多个振荡时钟。泵浦电路包括彼此耦合以输出升压电压的多个泵送块，并且每个泵送块连接到相应的振荡时钟。

97. 发明授权

US07518424B2 Slew rate controlled output circuit 有权
标题翻译：压摆率控制输出电路
公开(公告)号：US07518424B2
公开(公告)日：2009-04-14
申请号：US10983917
申请日：2004-11-08
申请人： Chun-Yuan Yeh
发明人： Chun-Yuan Yeh
IPC分类号： H03K5/12
CPC分类号： H03K5/12 , H03K19/01721
摘要： An output circuit comprises an input node, an output node, a first output transistor, a second output transistor, a first slew rate control circuit, and a second slew rate control circuit. The first output transistor and the second output transistor are coupled in series. The first slew rate control circuit is coupled between the first output transistor and a first power supply terminal. The second slew rate control circuit is coupled between the second output transistor and a second power supply terminal. The input node is coupled to gates of the first output transistor and the second output transistor. The output node is coupled to a common node of the first output transistor and the second output transistor.
摘要翻译：输出电路包括输入节点，输出节点，第一输出晶体管，第二输出晶体管，第一压摆率控制电路和第二压摆率控制电路。第一输出晶体管和第二输出晶体管串联耦合。第一转换速率控制电路耦合在第一输出晶体管和第一电源端子之间。第二转换速率控制电路耦合在第二输出晶体管和第二电源端子之间。输入节点耦合到第一输出晶体管和第二输出晶体管的栅极。输出节点耦合到第一输出晶体管和第二输出晶体管的公共节点。

98. 发明授权

US07443231B2 Low power reference voltage circuit 有权
标题翻译：低功率参考电压电路
公开(公告)号：US07443231B2
公开(公告)日：2008-10-28
申请号：US11463420
申请日：2006-08-09
申请人： Chien-Yi Chang
发明人： Chien-Yi Chang
IPC分类号： G05F1/10
CPC分类号： G05F3/16 , G05F3/30
摘要： A circuit for providing a reference voltage includes a bandgap reference circuit, the bandgap reference circuit providing a first reference voltage and a data storage. The data storage stores a digital value corresponding to the first reference voltage. A digital to analog converter is coupled to the data storage for providing a second reference voltage corresponding to the digital value. The circuit also includes an output switch circuit responsive to at least one control signal, the output switch circuit providing either the first reference voltage or the second reference voltage to an output node responsive to the control signal.
摘要翻译：用于提供参考电压的电路包括带隙参考电路，带隙参考电路提供第一参考电压和数据存储。数据存储器存储对应于第一参考电压的数字值。数模转换器耦合到数据存储器，用于提供对应于数字值的第二参考电压。电路还包括响应于至少一个控制信号的输出开关电路，输出开关电路响应于控制信号向输出节点提供第一参考电压或第二参考电压。

99. 发明授权

US07432758B2 Voltage regulator for semiconductor memory 有权
标题翻译：用于半导体存储器的稳压器
公开(公告)号：US07432758B2
公开(公告)日：2008-10-07
申请号：US11557503
申请日：2006-11-08
申请人： Min-Chung Chou , Tse-Hua Yao
发明人： Min-Chung Chou , Tse-Hua Yao
IPC分类号： G05F3/02
CPC分类号： G05F1/56
摘要： A voltage regulator as a stable power supply to internal circuits in a semiconductor memory device is provided. This regulator includes a comparing unit, a first driver transistor, a feedback unit, an auxiliary control unit, a first switch, a second switch, and a second driver transistor. The comparing unit compares a reference voltage with a feedback signal to control the first driver transistor and maintain the internal power supply at a stable level. The second driver transistor, controlled by the first and second switches responsive to a trigger signal corresponding abrupt current consumptions and the auxiliary control unit responsive to the comparing result, supplies sufficient and appropriate current to the internal circuits and prevents the internal power supply from excessive overshoot and drop-out.
摘要翻译：提供了一种稳压器作为半导体存储器件内部电路的稳定电源。该调节器包括比较单元，第一驱动晶体管，反馈单元，辅助控制单元，第一开关，第二开关和第二驱动晶体管。比较单元将参考电压与反馈信号进行比较，以控制第一驱动晶体管并将内部电源维持在稳定的水平。响应于对应于突发电流消耗的触发信号由控制的第一和第二开关的第二驱动晶体管和响应于比较结果的辅助控制单元向内部电路提供足够和适当的电流并防止内部电源过度过冲和辍学。

100. 发明申请

US20080122415A1 VOLTAGE REGULATOR FOR SEMICONDUCTOR MEMORY 有权
标题翻译：用于半导体存储器的电压调节器
公开(公告)号：US20080122415A1
公开(公告)日：2008-05-29
申请号：US11557503
申请日：2006-11-08
申请人： Min-Chung Chou , Tse-Hua Yao
发明人： Min-Chung Chou , Tse-Hua Yao
IPC分类号： G05F1/44 , G05F1/02
CPC分类号： G05F1/56
摘要： A voltage regulator as a stable power supply to internal circuits in a semiconductor memory device is provided. This regulator includes a comparing unit, a first driver transistor, a feedback unit, an auxiliary control unit, a first switch, a second switch, and a second driver transistor. The comparing unit compares a reference voltage with a feedback signal to control the first driver transistor and maintain the internal power supply at a stable level. The second driver transistor, controlled by the first and second switches responsive to a trigger signal corresponding abrupt current consumptions and the auxiliary control unit responsive to the comparing result, supplies sufficient and appropriate current to the internal circuits and prevents the internal power supply from excessive overshoot and drop-out.
摘要翻译：提供了一种稳压器作为半导体存储器件内部电路的稳定电源。该调节器包括比较单元，第一驱动晶体管，反馈单元，辅助控制单元，第一开关，第二开关和第二驱动晶体管。比较单元将参考电压与反馈信号进行比较，以控制第一驱动晶体管并将内部电源维持在稳定的水平。响应于对应于突发电流消耗的触发信号由控制的第一和第二开关的第二驱动晶体管和响应于比较结果的辅助控制单元向内部电路提供足够和适当的电流并防止内部电源过度过冲和辍学。

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