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    • 1. 发明授权
    • Voltage/current control apparatus and method
    • 电压/电流控制装置及方法
    • US08729881B2
    • 2014-05-20
    • US13109922
    • 2011-05-17
    • Yu Cheng Chang
    • Yu Cheng Chang
    • H02M3/156
    • H02M3/1588H02M2001/0009H02M2001/0025Y02B70/1466
    • A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.
    • 公开了电压/电流控制装置和方法。 该装置包括具有源极,栅极和漏极的低侧场效应晶体管(FET),具有源极,栅极和漏极的高侧场效应晶体管(FET),栅极驱动器集成电路(IC ),采样保持电路和比较器,被配置为当第一和第二输入信号的和等于第三和第四输入信号的和时在输出端产生触发信号,其中触发信号被配置为 通过使高侧FET的栅极“开”并且低边FET的栅极“关闭”来触发新周期的开始。
    • 3. 发明申请
    • VOLTAGE/CURRENT CONTROL APPARATUS AND METHOD
    • 电压/电流控制装置及方法
    • US20090273328A1
    • 2009-11-05
    • US12468770
    • 2009-05-19
    • Yu Cheng Chang
    • Yu Cheng Chang
    • G05F1/10
    • H02M3/1588H02M3/157Y02B70/1466
    • A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.
    • 公开了电压/电流控制装置和方法。 该装置包括具有源极,栅极和漏极的低侧场效应晶体管(FET),具有源极,栅极和漏极的高侧场效应晶体管(FET),栅极驱动器集成电路(IC ),采样保持电路和比较器,被配置为当第一和第二输入信号的和等于第三和第四输入信号的和时在输出端产生触发信号,其中触发信号被配置为 通过使高侧FET的栅极“开”并且低边FET的栅极“关闭”来触发新周期的开始。
    • 5. 发明申请
    • VOLTAGE/CURRENT CONTROL APPARATUS AND METHOD
    • 电压/电流控制装置及方法
    • US20120293144A1
    • 2012-11-22
    • US13109922
    • 2011-05-17
    • Yu Cheng Chang
    • Yu Cheng Chang
    • G05F1/10
    • H02M3/1588H02M2001/0009H02M2001/0025Y02B70/1466
    • A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.
    • 公开了电压/电流控制装置和方法。 该装置包括具有源极,栅极和漏极的低侧场效应晶体管(FET),具有源极,栅极和漏极的高侧场效应晶体管(FET),栅极驱动器集成电路(IC ),采样保持电路和比较器,被配置为当第一和第二输入信号的和等于第三和第四输入信号的和时在输出端产生触发信号,其中触发信号被配置为 通过转动高侧FET的栅极导通并关闭低边FET的栅极来触发新周期的开始。
    • 6. 发明授权
    • Voltage/current control apparatus and method
    • 电压/电流控制装置及方法
    • US07977930B2
    • 2011-07-12
    • US12468770
    • 2009-05-19
    • Yu Cheng Chang
    • Yu Cheng Chang
    • G05F1/575G05F1/618
    • H02M3/1588H02M3/157Y02B70/1466
    • A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.
    • 公开了电压/电流控制装置和方法。 该装置包括具有源极,栅极和漏极的低侧场效应晶体管(FET),具有源极,栅极和漏极的高侧场效应晶体管(FET),栅极驱动器集成电路(IC ),采样保持电路和比较器,被配置为当第一和第二输入信号的和等于第三和第四输入信号的和时在输出端产生触发信号,其中触发信号被配置为 通过使高侧FET的栅极“开”并且低边FET的栅极“关闭”来触发新周期的开始。
    • 9. 发明授权
    • One-time programmable (OTP) memory cell
    • 一次性可编程(OTP)存储单元
    • US07805687B2
    • 2010-09-28
    • US11541369
    • 2006-09-30
    • YongZhong HuYu Cheng ChangSung-Shan Tai
    • YongZhong HuYu Cheng ChangSung-Shan Tai
    • G06F17/50
    • G11C17/16G11C17/18H01L27/112H01L27/11206
    • A method of performing a programming, testing and trimming operation is disclosed in this invention. The method includes a step of applying a programming circuit for programming an OTP memory for probing and sensing one of three different states of the OTP memory for carrying out a trimming operation using one of the three states of the OTP memory whereby a higher utilization of OTP memory cells is achieved. Selecting and programming two conductive circuits of the OTP into two different operational characteristics thus enables the storing and sensing one of the three different states of the OTP memory. These two conductive circuits may include two different transistors for programming into a linear resistor and a nonlinear resistor with different current conducting characteristics. The programming processes include application of a high voltage and different programming currents thus generating different operational characteristics of these two transistors.
    • 在本发明中公开了执行编程,测试和修整操作的方法。 该方法包括应用用于对OTP存储器进行编程的编程电路的步骤,用于探测和感测OTP存储器的三种不同状态之一,以使用OTP存储器的三种状态之一进行修整操作,由此OTP的较高利用率 实现了存储单元。 将OTP的两个导电电路选择和编程成两个不同的操作特性,因此能够存储和感测OTP存储器的三种不同状态之一。 这两个导电电路可以包括用于编程成线性电阻器的两个不同晶体管和具有不同电流传导特性的非线性电阻器。 编程过程包括应用高电压和不同的编程电流,从而产生这两个晶体管的不同操作特性。
    • 10. 发明授权
    • Voltage/current control apparatus and method
    • 电压/电流控制装置及方法
    • US07557554B2
    • 2009-07-07
    • US11861154
    • 2007-09-25
    • Yu Cheng Chang
    • Yu Cheng Chang
    • G05F1/575G05F1/618
    • H02M3/1588H02M3/157Y02B70/1466
    • A voltage/current control apparatus and method are disclosed. The apparatus includes a low-side field effect transistor (FET) having a source, a gate and a drain, a high-side field effect transistor (FET) having a source, a gate and a drain, a gate driver integrated circuit (IC), a sample and hold circuit, and a comparator configured to produce a trigger signal at the output when a sum of the first and second input signals is equal to a sum of the third and fourth input signals, wherein the trigger signal is configured to trigger a beginning of a new cycle by turning the gate of the high-side FET “on” and the gate of the low-side FET “off”.
    • 公开了电压/电流控制装置和方法。 该装置包括具有源极,栅极和漏极的低侧场效应晶体管(FET),具有源极,栅极和漏极的高侧场效应晶体管(FET),栅极驱动器集成电路(IC ),采样保持电路和比较器,被配置为当第一和第二输入信号的和等于第三和第四输入信号的和时在输出端产生触发信号,其中触发信号被配置为 通过使高侧FET的栅极“开”并且低边FET的栅极“关闭”来触发新周期的开始。