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1. 发明申请

US20070010092A1 METHOD FOR ELIMINATING BRIDGING DEFECT IN VIA FIRST DUAL DAMASCENE PROCESS 有权
标题翻译：通过第一个双重DAMASCENE过程消除桥梁缺陷的方法
公开(公告)号：US20070010092A1
公开(公告)日：2007-01-11
申请号：US11160688
申请日：2005-07-06
申请人： Wen-Zhan Zhou , Hong Ma , Kuang-Yeh Chang
发明人： Wen-Zhan Zhou , Hong Ma , Kuang-Yeh Chang
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/31144 , H01L21/76816
摘要： A via-first dual damascene process is disclosed. When forming trench lines directly above two small pitched, dense via openings having diameter that is substantially equal to the line width of the trench lines, the trench photoresist is biased on the via openings to partially mask the sidewalls of the two dense via openings. By doing this, via-to-via bridging defects can be avoided.
摘要翻译：公开了一种通孔第一双镶嵌工艺。当直接在直径大约等于沟槽线的线宽度的两个小直径的密集通孔开口形成沟槽线时，沟槽光致抗蚀剂被偏置在通孔开口上以部分地掩蔽两个致密通孔的侧壁。通过这样做，可以避免通孔到通孔桥接缺陷。

2. 发明授权

US07238619B2 Method for eliminating bridging defect in via first dual damascene process 有权
标题翻译：通过第一次双镶嵌工艺消除桥接缺陷的方法
公开(公告)号：US07238619B2
公开(公告)日：2007-07-03
申请号：US11160688
申请日：2005-07-06
申请人： Wen-Zhan Zhou , Hong Ma , Kuang-Yeh Chang
发明人： Wen-Zhan Zhou , Hong Ma , Kuang-Yeh Chang
IPC分类号： H01L21/311
CPC分类号： H01L21/76808 , H01L21/31144 , H01L21/76816
摘要： A via-first dual damascene process is disclosed. When forming trench lines directly above two small pitched, dense via openings having diameter that is substantially equal to the line width of the trench lines, the trench photoresist is biased on the via openings to partially mask the sidewalls of the two dense via openings. By doing this, via-to-via bridging defects can be avoided.
摘要翻译：公开了一种通孔第一双镶嵌工艺。当直接在直径大约等于沟槽线的线宽度的两个小直径的密集通孔开口形成沟槽线时，沟槽光致抗蚀剂被偏置在通孔开口上以部分地掩蔽两个致密通孔的侧壁。通过这样做，可以避免通孔到通孔桥接缺陷。

3. 发明授权

US07838415B2 Method of fabricating dual damascene structure 有权
标题翻译：双镶嵌结构的制作方法
公开(公告)号：US07838415B2
公开(公告)日：2010-11-23
申请号：US11623570
申请日：2007-01-16
申请人： Kuang-Yeh Chang , Hong Ma
发明人： Kuang-Yeh Chang , Hong Ma
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/31144
摘要： A method of fabricating a dual damascene structure is described. A dielectric layer and a metal hard mask layer are sequentially formed on a substrate having thereon a conductive layer and a liner layer. The metal hard mask layer and the dielectric layer are patterned to form a via hole exposing a portion of the liner layer. A gap-filling layer is filled in the via hole, having a height of ¼ to ½ of the depth of the via hole. A trench is formed in the metal hard mask layer and the dielectric layer. The gap-filling layer is removed to expose the portion of the liner layer, which is then removed. A metal layer is formed filling in the via hole and the trench, and then the metal hard mask layer is removed.
摘要翻译：描述了制造双镶嵌结构的方法。介电层和金属硬掩模层依次形成在其上具有导电层和衬垫层的基板上。将金属硬掩模层和电介质层图案化以形成露出衬垫层的一部分的通孔。通孔中填充间隙填充层，其高度为通孔深度的1/4至1/2。在金属硬掩模层和电介质层中形成沟槽。去除间隙填充层以露出衬里层的部分，然后将其移除。形成填充在通孔和沟槽中的金属层，然后去除金属硬掩模层。

4. 发明授权

US08034712B2 Method of fabricating dual damascene structure 有权
标题翻译：双镶嵌结构的制作方法
公开(公告)号：US08034712B2
公开(公告)日：2011-10-11
申请号：US12897073
申请日：2010-10-04
申请人： Kuang-Yeh Chang , Hong Ma
发明人： Kuang-Yeh Chang , Hong Ma
IPC分类号： H01L21/4763
CPC分类号： H01L21/76808 , H01L21/31144
摘要： A method of fabricating a dual damascene structure is described. A dielectric layer and a metal hard mask layer are sequentially formed on a substrate having thereon a conductive layer and a liner layer. The metal hard mask layer and the dielectric layer are patterned to form a via hole exposing a portion of the liner layer. A gap-filling layer is filled in the via hole, having a height of ¼ to ½ of the depth of the via hole. A trench is formed in the metal hard mask layer and the dielectric layer. The gap-filling layer is removed to expose the portion of the liner layer, which is then removed. A metal layer is formed filling in the via hole and the trench, and then the metal hard mask layer is removed.
摘要翻译：描述了制造双镶嵌结构的方法。介电层和金属硬掩模层依次形成在其上具有导电层和衬垫层的基板上。将金属硬掩模层和电介质层图案化以形成露出衬垫层的一部分的通孔。通孔中填充间隙填充层，其高度为通孔深度的1/4至1/2。在金属硬掩模层和电介质层中形成沟槽。去除间隙填充层以露出衬里层的部分，然后将其移除。形成填充在通孔和沟槽中的金属层，然后去除金属硬掩模层。

5. 发明授权

US08546644B2 Recombinant gene which enhances the ability of fish to tolerate low dissolved oxygen stress and the use thereof 失效
标题翻译：提高鱼容忍低溶解氧应激能力的重组基因及其应用
公开(公告)号：US08546644B2
公开(公告)日：2013-10-01
申请号：US12879931
申请日：2010-09-10
申请人： Wei Hu , Zuoyan Zhu , Hong Ma , Bo Guan , Yuanlei Hu , Zhongping Lin
发明人： Wei Hu , Zuoyan Zhu , Hong Ma , Bo Guan , Yuanlei Hu , Zhongping Lin
IPC分类号： A01K67/027 , C12N15/85 , C12N15/873 , C12N15/90
CPC分类号： C12N15/8509 , A01K2227/40 , A01K2267/02 , C07K14/805 , C12N2830/85
摘要： The invention discloses a recombinant gene which enhances the ability of fish to tolerate low dissolved oxygen (DO) stress and the use thereof. Carp β-actin gene promoter is used as a promoter and Vitreoscilla hemoglobin gene is used as a target gene, so as to construct the recombinant Vitreoscilla hemoglobin gene driven by carp β-actin promoter. The modeling organism zebrafish is used as the research object, and the recombinant gene is microinjected into zygotes of zebrafish. After PCR screening and 156 h low DO stress test, transgenic fish are obtained with a survival rate of 92%, which is significantly different from the survival rate of 65% of the control fish group. The vhb transgenic zebrafish obtain hypoxia tolerance. When the recombinant gene is applied to the economically farmed species, i.e., blunt snout bream (Megalobrama amblycephala) and common carp (Cyprinus carpio L.), it enhances their hypoxia tolerance as well. Such genetically improved breeding technique may be widely used for breeding new excellent farmed species with the hypoxia tolerance.
摘要翻译：本发明公开了一种提高鱼耐受低溶解氧（DO）应力的能力及其用途的重组基因。将鲤鱼β-肌动蛋白基因启动子用作启动子，并使用透明颤菌血红蛋白基因作为靶基因，构建由鲤鱼β-肌动蛋白启动子驱动的重组透明颤菌血红蛋白基因。将造型生物斑马鱼作为研究对象，将重组基因显微注射到斑马鱼的合子中。 PCR筛选和156小时DO胁迫试验后，获得转基因鱼的成活率为92％，与对照鱼组65％的存活率显着不同。 vhb转基因斑马鱼获得缺氧耐受。当将重组基因应用于经济养殖的物种，即钝鼻鲷（Megalobrama amblycephala）和鲤鱼（Cyprinus carpio L.）时，也增强了它们的缺氧耐受性。这种遗传改良育种技术可广泛用于育种具有缺氧耐受性的新优良种植品种。

6. 发明申请

US20090314743A1 METHOD OF ETCHING A DIELECTRIC LAYER 审中-公开
标题翻译：蚀刻电介质层的方法
公开(公告)号：US20090314743A1
公开(公告)日：2009-12-24
申请号：US12142799
申请日：2008-06-20
申请人： Hong Ma
发明人： Hong Ma
IPC分类号： C23F1/02
CPC分类号： H01L21/31144 , H01L21/31116 , H01L21/32136 , H01L21/76802 , H01L21/7681 , H01L21/76813
摘要： A method of etching a dielectric layer includes providing a substrate, which includes a dielectric layer and a metal layer, performing a first etching process on the metal layer, and performing a second etching process on the dielectric layer to form a opening in the dielectric layer. The first etching process and the second etching process are in-situ carried out in the same reaction chamber without a vent. Since the first and second etching processes are not performed in different reaction chambers respectively, the cycle time can therefore be improved in the present invention. Because the first and second etching processes are performed without a vent, the substrate is protected from the pollution existing in surrounding.
摘要翻译：蚀刻电介质层的方法包括提供包括电介质层和金属层的衬底，对金属层进行第一蚀刻工艺，并在电介质层上进行第二蚀刻工艺以在电介质层中形成开口。第一蚀刻工艺和第二蚀刻工艺在没有通气孔的情况下在相同的反应室中原位进行。由于第一和第二蚀刻工艺不是在不同的反应室中进行，所以在本发明中可以改善循环时间。由于第一和第二蚀刻工艺在没有通风口的情况下进行，所以基板被保护免受周围存在的污染。

7. 发明授权

US07622395B2 Two-step method for etching a fuse window on a semiconductor substrate 有权
标题翻译：用于蚀刻半导体衬底上的熔丝窗的两步法
公开(公告)号：US07622395B2
公开(公告)日：2009-11-24
申请号：US11616300
申请日：2006-12-27
申请人： Shi-Jie Bai , Hong Ma
发明人： Shi-Jie Bai , Hong Ma
IPC分类号： H01L21/302
CPC分类号： H01L22/12 , H01L2924/0002 , H01L2924/00
摘要： A two-step method for etching a fuse window on a semiconductor substrate is provided. A semiconductor substrate having thereon a fuse interconnect-wire is formed in a dielectric film stack. The dielectric film stack includes a target dielectric layer overlying said fuse interconnect-wire, an intermediate dielectric layer and a passivation layer. A photoresist layer is formed on the passivation layer with an opening that defines said fuse window. A first dry etching process is performed to non-selectively etch the passivation layer and the intermediate dielectric layer through the opening thereby exposing the target dielectric layer. The thickness of the target dielectric layer after the first dry etching process is then measured. An APC-controlled second dry etching process is performed to etch a portion of the exposed target dielectric layer, thereby reliably forming the fuse window.
摘要翻译：提供了用于蚀刻半导体衬底上的熔丝窗的两步法。具有熔丝互连线的半导体衬底形成在电介质膜叠层中。电介质膜堆叠包括覆盖所述熔丝互连线的目标介电层，中间介电层和钝化层。在钝化层上形成具有限定所述熔丝窗的开口的光致抗蚀剂层。执行第一干蚀刻工艺以通过开口非选择性地蚀刻钝化层和中间介电层，从而暴露目标介电层。然后测量第一干蚀刻工艺之后的目标介电层的厚度。执行APC控制的第二干蚀刻工艺以蚀刻暴露的目标介电层的一部分，从而可靠地形成熔丝窗。

8. 发明授权

US07220578B2 Single LTR lentivirus vector 失效
标题翻译：单LTR慢病毒载体
公开(公告)号：US07220578B2
公开(公告)日：2007-05-22
申请号：US10721563
申请日：2003-11-25
申请人： Tal Kafri , Hong Ma
发明人： Tal Kafri , Hong Ma
IPC分类号： C12N15/00 , C12N15/48 , C12N15/867 , C12N15/64 , C07H21/04
CPC分类号： C12N15/86 , C12N2740/16043 , C12Q1/702 , C12Q1/703
摘要： The present invention provides an isolated nucleic acid comprising a single retroviral LTR, a polypurine tract, a packaging signal, a primer binding site and a rev responsive element. Further provided is an isolated nucleic acid comprising a heterologous nucleotide sequence, a single retroviral long terminal repeat (LTR), a packaging signal, a rev responsive element, a polypurine tract, a eukaryotic promoter, a primer binding site, a bacterial origin of replication and a bacterial selection marker. In addition, the present invention provides an isolated nucleic acid comprising a 5′ retroviral LTR and a 3′ retroviral LTR, a heterologous nucleotide sequence, a packaging signal, a rev responsive element, a polypurine tract, a eukaryotic promoter, a primer binding site, a bacterial origin of replication and a bacterial selection marker cassette, wherein the bacterial origin of replication and bacterial selection marker are located between the two LTRs.
摘要翻译：本发明提供了一种分离的核酸，其包含单个逆转录病毒LTR，多巴胺，包装信号，引物结合位点和转录响应元件。还提供了分离的核酸，其包含异源核苷酸序列，单个逆转录病毒长末端重复（LTR），包装信号，转录响应元件，多巴胺，真核启动子，引物结合位点，细菌复制起点和细菌选择标记。此外，本发明提供了分离的核酸，其包含5'逆转录病毒LTR和3'逆转录病毒LTR，异源核苷酸序列，包装信号，转录响应元件，多巴胺，真核启动子，引物结合位点，细菌复制起点和细菌选择标记盒，其中细菌复制起点和细菌选择标记位于两个LTR之间。

9. 发明授权

US07142940B2 Method of processing semiconductor wafer 有权
标题翻译：半导体晶片的处理方法
公开(公告)号：US07142940B2
公开(公告)日：2006-11-28
申请号：US11079995
申请日：2005-03-14
申请人： Hong Ma , Meisheng Zhou
发明人： Hong Ma , Meisheng Zhou
IPC分类号： G06F19/00
CPC分类号： H01L22/20
摘要： A method of processing a semiconductor wafer is provided. The semiconductor wafer is processed with a first process. After collecting the measured data that reflects the deviation of each part within the semiconductor wafer, the semiconductor wafer is processed with a second process according to the measured data to compensate the deviation from the first process and to correct any deviation in the semiconductor wafer.
摘要翻译：提供了一种处理半导体晶片的方法。用第一工艺处理半导体晶片。在收集反映半导体晶片中的每个部分的偏差的测量数据之后，根据测量数据用第二工艺处理半导体晶片，以补偿与第一工艺的偏差并校正半导体晶片中的任何偏差。

10. 发明申请

US20050023507A1 Nonlinear optical compounds and methods for their preparation 失效
标题翻译：非线性光学化合物及其制备方法
公开(公告)号：US20050023507A1
公开(公告)日：2005-02-03
申请号：US10934964
申请日：2004-09-03
申请人： Kwan-Yue Jen , Hong Ma , Sen Liu , Larry Dalton
发明人： Kwan-Yue Jen , Hong Ma , Sen Liu , Larry Dalton
IPC分类号： A61K31/505 , C07D307/02 , C07D307/64 , C07D307/68 , C07D333/02 , C07D333/32 , C07D333/38 , C07D405/04 , C07D409/00 , C07D409/06 , G02B5/02 , G02F1/361 , G03B11/00
CPC分类号： C07D333/38 , C07D307/64 , C07D307/68 , C07D405/04 , C07D409/06 , G02F1/3611 , G02F1/3612 , G02F1/3613 , G02F1/3614
摘要： Nonlinear optically active compounds, methods for making nonlinear optically active compounds, compounds useful for making nonlinear optically active compounds, methods for making compounds useful for making nonlinear optically active compounds, macrostructures that include nonlinear optically active components, and devices including the nonlinear optically active compounds and the macrostructures.
摘要翻译：非线性光学活性化合物，制备非线性光学活性化合物的方法，用于制备非线性光学活性化合物的化合物，用于制备用于制备非线性光学活性化合物的化合物的方法，包括非线性光学活性组分的宏观结构以及包含非线性光学活性化合物的装置和宏观结构。

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