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    • 1. 发明授权
    • Semiconductor device including dummy upper electrode
    • 半导体器件包括虚拟上电极
    • US06611015B2
    • 2003-08-26
    • US09956001
    • 2001-09-20
    • Tohru OzakiIwao KunishimaToyota MorimotoHiroyuki Kanaya
    • Tohru OzakiIwao KunishimaToyota MorimotoHiroyuki Kanaya
    • H01L27108
    • H01L27/11502H01L27/11507
    • A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.
    • 一种半导体存储器件,包括具有形成在半导体衬底上的多个存储晶体管的存储单元块。 存储晶体管包括第一和第二杂质扩散区域以及在它们之间形成的栅极。 多个存储单元也包括在存储单元块中,并且具有连接到第一杂质扩散区的下电极,形成在下电极上的铁电膜和形成在铁电体膜上的第一上电极并连接到第二杂质扩散区 地区。 还包括形成在半导体衬底上并连接到存储单元块的一端的块选择晶体管。 第二上电极也形成为与块选择晶体管相邻并且与存储单元的第一上电极断开连接。
    • 2. 发明授权
    • Semiconductor memory device and method of fabricating the same
    • 半导体存储器件及其制造方法
    • US07022531B2
    • 2006-04-04
    • US10618616
    • 2003-07-15
    • Tohru OzakiIwao KunishimaToyota MorimotoHiroyuki Kanaya
    • Tohru OzakiIwao KunishimaToyota MorimotoHiroyuki Kanaya
    • H01L21/00
    • H01L27/11502H01L27/11507
    • A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.
    • 一种半导体存储器件,包括具有形成在半导体衬底上的多个存储晶体管的存储单元块。 存储晶体管包括第一和第二杂质扩散区域以及在它们之间形成的栅极。 多个存储单元也包括在存储单元块中,并且具有连接到第一杂质扩散区的下电极,形成在下电极上的铁电膜和形成在铁电体膜上的第一上电极并连接到第二杂质扩散区 地区。 还包括形成在半导体衬底上并连接到存储单元块的一端的块选择晶体管。 第二上电极也形成为与块选择晶体管相邻并且与存储单元的第一上电极断开连接。
    • 3. 发明申请
    • Semiconductor memory device and method of fabricating the same
    • 半导体存储器件及其制造方法
    • US20050176199A1
    • 2005-08-11
    • US10618616
    • 2003-07-15
    • Tohru OzakiIwao KunishimaToyota MorimotoHiroyuki Kanaya
    • Tohru OzakiIwao KunishimaToyota MorimotoHiroyuki Kanaya
    • H01L27/105H01L21/8246H01L27/115H01L21/336
    • H01L27/11502H01L27/11507
    • A semiconductor memory device including a memory cell block having a plurality of memory transistors formed on a semiconductor substrate. The memory transistors include first and second impurity-diffused regions and a gate formed therebetween. A plurality of memory cells are also included in the memory cell block and have lower electrodes connected to the first impurity-diffused regions, ferroelectric films formed on the lower electrodes and first upper electrodes formed on the ferroelectric films and connected to the second impurity-diffused regions. Further included are block selecting transistors formed on the semiconductor substrate and being connected to one end of the memory cell block. Second upper electrodes are also formed adjoined to the block selecting transistors and being disconnected from the first upper electrode of the memory cells.
    • 一种半导体存储器件,包括具有形成在半导体衬底上的多个存储晶体管的存储单元块。 存储晶体管包括第一和第二杂质扩散区域以及在它们之间形成的栅极。 多个存储单元也包括在存储单元块中,并且具有连接到第一杂质扩散区的下电极,形成在下电极上的铁电膜和形成在铁电体膜上的第一上电极并连接到第二杂质扩散区 地区。 还包括形成在半导体衬底上并连接到存储单元块的一端的块选择晶体管。 第二上电极也形成为与块选择晶体管相邻并且与存储单元的第一上电极断开连接。