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1. 发明申请

US20120064230A1 METHOD FOR FORMING CONDUCTIVE VIA IN A SUBSTRATE 审中-公开
标题翻译：通过基板形成导电的方法
公开(公告)号：US20120064230A1
公开(公告)日：2012-03-15
申请号：US12880168
申请日：2010-09-13
申请人： Shih-Long Wei , Sheng-Li Hsiao , Chien-Hung Ho , Hsiao-Chun Liu
发明人： Shih-Long Wei , Sheng-Li Hsiao , Chien-Hung Ho , Hsiao-Chun Liu
IPC分类号： B05D5/12 , C25D5/02
CPC分类号： H05K3/4061 , C25D5/022 , H05K2201/0347 , H05K2203/0191
摘要： The steps of the present invention are as follows: (a) a detachable film is formed on both sides of a substrate, respectively; (b) a number of vias running through both sides of the detachable films are formed in the substrate; (c) the vias are filled with a conductive paste; (d) the detachable films are peeled off; (e) a metallic conductive layer is deposited on both sides of the substrate, respectively; (f) a specific mold pattern is formed on the metallic conductive layers, respectively, by a photolithographic process; (g) a metallic circuit layout layer is formed on the patterns, respectively, by an electrochemical process; and (h) the mold patterns and the metallic conductive layers are removed. As such, the substrate is not contaminated by the conductive paste. Further, by using deposition, metallic conductive layers are directly adhered to the substrate and, by using photolithography, layouts with small linewidth could be formed.
摘要翻译：本发明的步骤如下：（a）分别在基板的两侧形成可拆卸的膜; （b）在所述基板上形成贯穿所述可拆卸膜的两侧的多个通孔; （c）通孔用导电膏填充; （d）剥离可剥离膜; （e）金属导电层分别沉积在基板的两侧上; （f）分别通过光刻工艺在金属导电层上形成特定的模具图案; （g）通过电化学过程分别在图案上形成金属电路布局层; 和（h）去除模具图案和金属导电层。因此，基板不被导电浆料污染。此外，通过使用沉积，金属导电层直接粘附到基板，并且通过使用光刻，可以形成具有小线宽的布局。

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