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    • 8. 发明授权
    • Method and apparatus for controlling phase delay offset point of modulator
    • 用于控制调制器相位延迟偏移点的方法和装置
    • US08983305B2
    • 2015-03-17
    • US13637181
    • 2010-08-17
    • Hong YiJianhong Chen
    • Hong YiJianhong Chen
    • H04B10/04H04B10/12H04L27/20H04L27/00
    • H04L27/2071H04B10/5053H04B10/5057H04B10/5561H04L2027/0018H04L2027/0051
    • The present invention provides a method and an apparatus for controlling a phase delay offset point of a modulator. The method comprises: acquiring backlight detection current signals output from a modulator in different working states, and determining harmonic amplitude values of the backlight detection current signals corresponding to the different working states; determining a detection value of a phase delay offset point corresponding to the modulator according to the determined harmonic amplitude values; comparing the detection value with a set target value of the phase delay offset point, and controlling a position of the phase delay offset point corresponding to the modulator according to the comparison result. The accuracy of controlling the position of the phase delay offset point of the modulator and the performance of the Differential Quadrature Phase Shift Keying (DQPSK) modulation system are improved through the technical solution.
    • 本发明提供一种用于控制调制器的相位延迟偏移点的方法和装置。 该方法包括:获取在不同工作状态下从调制器输出的背光检测电流信号,以及确定对应于不同工作状态的背光检测电流信号的谐波幅度值; 根据确定的谐波振幅值确定与调制器相对应的相位延迟偏移点的检测值; 将检测值与相位延迟偏移点的设定目标值进行比较,并根据比较结果控制与调制器对应的相位延迟偏移点的位置。 通过技术方案,改进了调制器相位延迟偏移点位置的精度和差分正交相移键控(DQPSK)调制系统的性能。
    • 9. 发明申请
    • METHOD AND APPARATUS FOR CONTROLLING BIAS POINT OF DIFFERENTIAL QUADRATURE PHASE SHIFT KEYING DEMODULATOR
    • 控制差分平移相位移相关调制解调器的方法和装置
    • US20130044366A1
    • 2013-02-21
    • US13634469
    • 2010-08-20
    • Jianhua ChenHong Yi
    • Jianhua ChenHong Yi
    • G02F2/00
    • H04B10/69H04B10/50575H04B10/50577H04B10/677
    • Method and apparatus for controlling bias point of DQPSK demodulator are disclosed. The method comprises: step 1: respectively applying first and second bias voltages to I-path and Q-path, and applying identical pilot voltage signals to I-path and Q-path (S202); step 2:executing filtering processing on I-path and Q-path differential current signals collected by balance receiver and determining θIand θQ (S204); step 3: performing feedback control to first and second bias voltages respectively according to θI and θQ so that θI and θQ respectively reaches expected bias point values of I-path and Q-path (S206); executing step 2 and 3 cyclically at preset regular intervals (S208), so that θI and θQ remains consistently the expected bias point values of I-path and Q-path. The solution enables bias point of DQPSK demodulator to be locked at any expected bias point value, facilitates realization of digitization, and is not easily influenced.
    • 公开了用于控制DQPSK解调器偏置点的方法和装置。 该方法包括:步骤1:分别对I路径和Q路径施加第一和第二偏置电压,并向I路径和Q路径施加相同的导频电压信号(S202); 步骤2:对平衡接收机收集的I路径和Q路径差分电流信号执行滤波处理和确定; Iand&thetas; Q(S204); 步骤3:分别根据I和I等级Q对第一和第二偏置电压进行反馈控制,使得I和I等于Q分别达到I路径和Q路径的预期偏置点值(S206); 以预定的时间间隔循环执行步骤2和3(S208),使得I和& t; Q保持一致地是I-path和Q-path的预期偏置点值。 该解决方案使DQPSK解调器的偏置点能够被锁定在任何预期的偏置点值,便于数字化的实现,并且不容易受到影响。