专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07920408B2 Resistance change nonvolatile memory device 有权
标题翻译：电阻变化非易失性存储器件
公开(公告)号：US07920408B2
公开(公告)日：2011-04-05
申请号：US12513914
申请日：2008-06-20
申请人： Ryotaro Azuma , Kazuhiko Shimakawa , Satoru Fujii , Yoshihiko Kanzawa
发明人： Ryotaro Azuma , Kazuhiko Shimakawa , Satoru Fujii , Yoshihiko Kanzawa
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0007 , G11C13/0023 , G11C13/0026 , G11C13/0069 , G11C13/0097 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/71 , G11C2213/72 , G11C2213/74 , G11C2213/77 , H01L27/101 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146
摘要： Memory cells (MC) are formed at intersections of bit lines (BL) extending in the X direction and word lines (WL) extending in the Y direction. A plurality of basic array planes sharing the word lines (WL), each formed for a group of bit lines (BL) aligned in the Z direction, are arranged side by side in the Y direction. In each basic array plane, bit lines in even layers and bit lines in odd layers are individually connected in common. Each of selection switch elements (101 to 104) controls switching of electrical connection/non-connection between the common-connected even layer bit line and a global bit line (GBL), and each of selection switch elements (111 to 114) control switching of connection/non-connection between the common-connected odd layer bit line and the global bit line (GBL).
摘要翻译：存储单元（MC）形成在沿X方向延伸的位线（BL）和在Y方向上延伸的字线（WL）的交点处。在Y方向并排配置有分别形成为在Z方向排列的一组位线（BL）的字线（WL）的多个基本阵列平面。在每个基本阵列平面中，偶数层中的位线和奇数层中的位线共同单独连接。每个选择开关元件（101至104）控制共用连接偶数层位线与全局位线（GBL）之间的电连接/非连接的切换，并且每个选择开关元件（111至114）控制切换共同连接的奇数位位线和全局位线（GBL）之间的连接/非连接。

2. 发明申请

US20110122680A1 VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE 有权
标题翻译：可变电阻非易失性存储器件
公开(公告)号：US20110122680A1
公开(公告)日：2011-05-26
申请号：US13054312
申请日：2010-04-14
申请人： Yuuichirou Ikeda , Kazuhiko Shimakawa , Yoshihiko Kanzawa , Shunsaku Muraoka , Ryotaro Azuma
发明人： Yuuichirou Ikeda , Kazuhiko Shimakawa , Yoshihiko Kanzawa , Shunsaku Muraoka , Ryotaro Azuma
IPC分类号： G11C11/21
CPC分类号： G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/12 , G11C2213/15 , G11C2213/34 , G11C2213/72 , H01L27/24
摘要： A nonvolatile resistance variable memory device (100) includes memory cells (M11, M12, . . . ) in each of which a variable resistance element (R11, R12, . . . ) including a variable resistance layer placed between and in contact with a first electrode and a second electrode, and a current steering element (D11, D12, . . . ) including a current steering layer placed between and in contact with a third electrode and a fourth electrode, are connected in series, and the device is driven by a first LR drive circuit (105a1) via a current limit circuit (105b) to decrease resistance of the variable resistance element while the device is driven by a second HR drive circuit (105a2) to increase resistance of the variable resistance element, thus using the current limit circuit (105b) to make a current for decreasing resistance of the variable resistance element lower than a current for increasing resistance of the variable resistance element.
摘要翻译：一种非易失性电阻可变存储器件（100）包括存储单元（M11，M12 ...），每个存储单元包括可变电阻元件（R11，R12 ...），该可变电阻元件（R11，R12 ...）第一电极和第二电极，以及包括放置在第三电极和第四电极之间并与第三电极和第四电极接触的电流导向层的电流导向元件（D11，D12 ...）串联连接，并且驱动该装置通过第一LR驱动电路（105a1）经由限流电路（105b），以在器件被第二HR驱动电路（105a2）驱动时降低可变电阻元件的电阻，以增加可变电阻元件的电阻，从而使用电流限制电路（105b），用于使可变电阻元件的电阻降低的电流低于用于增加可变电阻元件的电阻的电流。

3. 发明授权

US08441837B2 Variable resistance nonvolatile memory device 有权
标题翻译：可变电阻非易失性存储器件
公开(公告)号：US08441837B2
公开(公告)日：2013-05-14
申请号：US13054312
申请日：2010-04-14
申请人： Yuuichirou Ikeda , Kazuhiko Shimakawa , Yoshihiko Kanzawa , Shunsaku Muraoka , Ryotaro Azuma
发明人： Yuuichirou Ikeda , Kazuhiko Shimakawa , Yoshihiko Kanzawa , Shunsaku Muraoka , Ryotaro Azuma
IPC分类号： G11C11/00
CPC分类号： G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/12 , G11C2213/15 , G11C2213/34 , G11C2213/72 , H01L27/24
摘要： A nonvolatile resistance variable memory device (100) includes memory cells (M11, M12, . . . ) in each of which a variable resistance element (R11, R12, . . . ) including a variable resistance layer placed between and in contact with a first electrode and a second electrode, and a current steering element (D11, D12, . . . ) including a current steering layer placed between and in contact with a third electrode and a fourth electrode, are connected in series, and the device is driven by a first LR drive circuit (105a1) via a current limit circuit (105b) to decrease resistance of the variable resistance element while the device is driven by a second HR drive circuit (105a2) to increase resistance of the variable resistance element, thus using the current limit circuit (105b) to make a current for decreasing resistance of the variable resistance element lower than a current for increasing resistance of the variable resistance element.
摘要翻译：一种非易失性电阻可变存储器件（100）包括存储单元（M11，M12 ...），每个存储单元包括可变电阻元件（R11，R12 ...），该可变电阻元件（R11，R12 ...）第一电极和第二电极，以及包括放置在第三电极和第四电极之间并与第三电极和第四电极接触的电流导向层的电流导向元件（D11，D12 ...）串联连接，并且驱动该装置通过第一LR驱动电路（105a1）经由限流电路（105b），以在器件被第二HR驱动电路（105a2）驱动时降低可变电阻元件的电阻，以增加可变电阻元件的电阻，从而使用电流限制电路（105b），用于使可变电阻元件的电阻降低的电流低于用于增加可变电阻元件的电阻的电流。

4. 发明申请

US20110294259A1 NONVOLATILE MEMORY ELEMENT, MANUFACTURING METHOD THEREOF, AND NONVOLATILE SEMICONDUCTOR APPARATUS USING THE NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储元件，其制造方法和使用非易失性存储元件的非易失性半导体器件
公开(公告)号：US20110294259A1
公开(公告)日：2011-12-01
申请号：US13205408
申请日：2011-08-08
申请人： Yoshihiko KANZAWA , Koji Katayama , Satoru Fujii , Shunsaku Muraoka , Koichi Osano , Satoru Mitani , Ryoko Miyanaga , Takeshi Takagi , Kazuhiko Shimakawa
发明人： Yoshihiko KANZAWA , Koji Katayama , Satoru Fujii , Shunsaku Muraoka , Koichi Osano , Satoru Mitani , Ryoko Miyanaga , Takeshi Takagi , Kazuhiko Shimakawa
IPC分类号： H01L21/36
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/32 , G11C2213/71 , G11C2213/72 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675 , Y10S438/90
摘要： A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0
摘要翻译：非易失性存储元件包括设置在第一电极层（103）和第二电极层（107）之间的第一电极层（103），第二电极（107）和电阻变化层（106），电阻电阻变化层的值根据施加在电极（103），（107）之间的具有不同极性的电信号而可逆地变化，其中电阻变化层（106）具有第一区域，该第一区域包括第一氧缺陷型氧化钽，由TaOx（0

5. 发明申请

US20100148143A1 NONVOLATILE MEMORY ELEMENT, MANUFACTURING METHOD THEREOF, AND NONVOLATILE SEMICONDUCTOR APPARATUS USING NONVOLATILE MEMORY ELEMENT 有权
标题翻译：非易失性存储元件，其制造方法和非易失性存储器元件的非线性半导体器件
公开(公告)号：US20100148143A1
公开(公告)日：2010-06-17
申请号：US12600793
申请日：2008-05-16
申请人： Satoru Fujii , Yoshihiko Kanzawa , Takeshi Takagi , Kazuhiko Shimakawa
发明人： Satoru Fujii , Yoshihiko Kanzawa , Takeshi Takagi , Kazuhiko Shimakawa
IPC分类号： H01L45/00 , H01L21/16
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2418 , H01L27/2436 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/145 , H01L45/1625
摘要： A nonvolatile semiconductor apparatus of the present invention comprises (103), a second electrode (105), and a resistance variable layer (104) disposed between the first electrode (103) and the second electrode (105), a resistance value of the resistance variable layer being switchable reversibly in response to an electric signal applied between the electrodes (103), (105), wherein the resistance variable layer (104) comprises an oxide containing tantalum and nitrogen.
摘要翻译：本发明的非易失性半导体装置包括：（103），设置在第一电极（103）和第二电极（105）之间的第二电极（105）和电阻变化层（104），电阻值可变层可响应施加在电极（103），（105）之间的电信号而可逆地切换，其中电阻变化层（104）包括含有钽和氮的氧化物。

6. 发明授权

US08022502B2 Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor apparatus using the nonvolatile memory element 有权
标题翻译：非易失性存储元件及其制造方法以及使用非易失性存储元件的非易失性半导体装置
公开(公告)号：US08022502B2
公开(公告)日：2011-09-20
申请号：US12307211
申请日：2008-03-26
申请人： Yoshihiko Kanzawa , Koji Katayama , Satoru Fujii , Shunsaku Muraoka , Koichi Osano , Satoru Mitani , Ryoko Miyanaga , Takeshi Takagi , Kazuhiko Shimakawa
发明人： Yoshihiko Kanzawa , Koji Katayama , Satoru Fujii , Shunsaku Muraoka , Koichi Osano , Satoru Mitani , Ryoko Miyanaga , Takeshi Takagi , Kazuhiko Shimakawa
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/32 , G11C2213/71 , G11C2213/72 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675 , Y10S438/90
摘要： A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0
摘要翻译：非易失性存储元件包括设置在第一电极层（103）和第二电极层（107）之间的第一电极层（103），第二电极（107）和电阻变化层（106），电阻电阻变化层的值根据施加在电极（103），（107）之间的具有不同极性的电信号而可逆地变化，其中电阻变化层（106）具有第一区域，该第一区域包括第一氧缺陷型氧化钽，由TaOx（0

7. 发明授权

US08154909B2 Resistance variable memory apparatus 有权
标题翻译：电阻变量存储装置
公开(公告)号：US08154909B2
公开(公告)日：2012-04-10
申请号：US13165551
申请日：2011-06-21
申请人： Ryotaro Azuma , Kazuhiko Shimakawa , Satoru Fujii
发明人： Ryotaro Azuma , Kazuhiko Shimakawa , Satoru Fujii
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/004 , G11C13/0069 , G11C2013/009 , G11C2213/76 , H01L27/101 , H01L27/1021 , H01L27/2409 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A resistance variable memory apparatus (100) of the present invention includes a current suppressing element (116) which is connected in series with each resistance variable layer (114) and whose threshold voltage is VF, and is configured to apply a first voltage V1 to a first wire (WL) associated with a selected nonvolatile memory element, apply a second voltage V2 to a second wire (BL) associated with the selected nonvolatile memory element, apply a third voltage V3 to a first wire (WL) which is not associated with the selected nonvolatile memory element and apply a fourth voltage V4 to a second wire (BL) which is not associated with the selected memory element when writing data or reading data, wherein V2≦V3
摘要翻译：本发明的电阻可变存储装置（100）具有与各个电阻变化层（114）串联连接且阈值电压为VF的电流抑制元件（116），并且将第一电压V1 与所选择的非易失性存储器元件相关联的第一线（WL）将第二电压V2施加到与所选择的非易失性存储器元件相关联的第二线（BL），将第三电压V3施加到不相关联的第一线（WL）使用所选择的非易失性存储元件，并且在写入数据或读取数据时将第四电压V4施加到与选择的存储器元件不相关联的第二电线（BL），其中V2＆nlE; V3

8. 发明授权

US08445319B2 Nonvolatile memory element, manufacturing method thereof, and nonvolatile semiconductor apparatus using the nonvolatile memory element 有权
标题翻译：非易失性存储元件及其制造方法以及使用非易失性存储元件的非易失性半导体装置
公开(公告)号：US08445319B2
公开(公告)日：2013-05-21
申请号：US13205408
申请日：2011-08-08
申请人： Yoshihiko Kanzawa , Koji Katayama , Satoru Fujii , Shunsaku Muraoka , Koichi Osano , Satoru Mitani , Ryoko Miyanaga , Takeshi Takagi , Kazuhiko Shimakawa
发明人： Yoshihiko Kanzawa , Koji Katayama , Satoru Fujii , Shunsaku Muraoka , Koichi Osano , Satoru Mitani , Ryoko Miyanaga , Takeshi Takagi , Kazuhiko Shimakawa
IPC分类号： H01L47/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/004 , G11C13/0069 , G11C2013/0073 , G11C2213/32 , G11C2213/71 , G11C2213/72 , G11C2213/79 , H01L27/2409 , H01L27/2436 , H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675 , Y10S438/90
摘要： A nonvolatile memory element comprises a first electrode layer (103), a second electrode (107), and a resistance variable layer (106) which is disposed between the first electrode layer (103) and the second electrode layer (107), a resistance value of the resistance variable layer varying reversibly according to electric signals having different polarities which are applied between the electrodes (103), (107), wherein the resistance variable layer (106) has a first region comprising a first oxygen-deficient tantalum oxide having a composition represented by TaOx (0
摘要翻译：非易失性存储元件包括设置在第一电极层（103）和第二电极层（107）之间的第一电极层（103），第二电极（107）和电阻变化层（106），电阻电阻变化层的值根据施加在电极（103），（107）之间的具有不同极性的电信号而可逆地变化，其中电阻变化层（106）具有第一区域，该第一区域包括第一氧缺陷型氧化钽，由TaOx（0

9. 发明申请

US20110044088A1 VARIABLE RESISTANCE NONVOLATILE STORAGE DEVICE AND METHOD OF FORMING MEMORY CELL 有权
标题翻译：可变电阻非易失性存储器件及形成存储器单元的方法
公开(公告)号：US20110044088A1
公开(公告)日：2011-02-24
申请号：US12743472
申请日：2009-08-20
申请人： Shunsaku Muraoka , Yoshihiko Kanzawa , Satoru Mitani , Koji Katayama , Kazuhiko Shimakawa , Satoru Fujii , Takeshi Takagi
发明人： Shunsaku Muraoka , Yoshihiko Kanzawa , Satoru Mitani , Koji Katayama , Kazuhiko Shimakawa , Satoru Fujii , Takeshi Takagi
IPC分类号： G11C11/34 , H01L27/105 , H01L21/02
CPC分类号： H01L45/147 , G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate (301), (ii) a variable resistance element (309) having: lower and upper electrodes (309a, 309c); and a variable resistance layer (309b) whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes (309a, 309c), and (iii) a MOS transistor (317) formed on the substrate (301), wherein the variable resistance layer (309b) includes: oxygen-deficient transition metal oxide layers (309b-1, 309b-2) having compositions MOx and MOy (where x
摘要翻译：一种可变电阻非易失性存储装置，包括：（i）半导体衬底（301），（ii）具有下电极和上电极（309a，309c）的可变电阻元件（309）和可变电阻层（309b），其电阻值基于各自具有不同极性的电压信号而被可逆地变化并施加在电极（309a，309c）之间，以及（iii）形成在基板上的MOS晶体管（301），其中所述可变电阻层（309b）包括：具有组成MOx和MOy（其中x

10. 发明授权

US08553444B2 Variable resistance nonvolatile storage device and method of forming memory cell 有权
标题翻译：可变电阻非易失性存储器件和形成存储单元的方法
公开(公告)号：US08553444B2
公开(公告)日：2013-10-08
申请号：US12743472
申请日：2009-08-20
申请人： Shunsaku Muraoka , Yoshihiko Kanzawa , Satoru Mitani , Koji Katayama , Kazuhiko Shimakawa , Satoru Fujii , Takeshi Takagi
发明人： Shunsaku Muraoka , Yoshihiko Kanzawa , Satoru Mitani , Koji Katayama , Kazuhiko Shimakawa , Satoru Fujii , Takeshi Takagi
IPC分类号： G11C11/00
CPC分类号： H01L45/147 , G11C13/0007 , G11C13/0069 , G11C2013/009 , G11C2213/15 , G11C2213/32 , G11C2213/34 , G11C2213/79 , H01L27/2436 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1625 , H01L45/1675
摘要： A variable resistance nonvolatile storage device which includes (i) a semiconductor substrate (301), (ii) a variable resistance element (309) having: lower and upper electrodes (309a, 309c); and a variable resistance layer (309b) whose resistance value reversibly varies based on voltage signals each of which has a different polarity and is applied between the electrodes (309a, 309c), and (iii) a MOS transistor (317) formed on the substrate (301), wherein the variable resistance layer (309b) includes: oxygen-deficient transition metal oxide layers (309b-1, 309b-2) having compositions MOX and MOy (where x
摘要翻译：一种可变电阻非易失性存储装置，包括：（i）半导体衬底（301），（ii）具有下电极和上电极（309a，309c）的可变电阻元件（309）和可变电阻层（309b），其电阻值基于各自具有不同极性的电压信号而被可逆地变化并施加在电极（309a，309c）之间，以及（iii）形成在基板上的MOS晶体管（301），其中所述可变电阻层（309b）包括：具有组成MOX和MOy（其中x

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式