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    • 1. 发明申请
    • Laminated inductor and method of manufacture of same
    • 层压电感器及其制造方法
    • US20090115563A1
    • 2009-05-07
    • US12250926
    • 2008-10-14
    • Masazumi ARATAKunihiko KAWASAKIKunio ODAYohei TADAKIYoshimitsu SATOHHitoshi SASAKI
    • Masazumi ARATAKunihiko KAWASAKIKunio ODAYohei TADAKIYoshimitsu SATOHHitoshi SASAKI
    • H01F5/00
    • H01F17/0013H01F2017/0066Y10T29/4902
    • A laminated inductor, in which there is extremely little tendency for cracking to occur between adjacent conductor patterns in portions of a laminate in the lamination direction even when the conductor pattern thickness is large, as well as a method of manufacturing such a laminated inductor, are provided.A laminated inductor includes: a laminate; a pair of external electrodes arranged on the outer surfaces of the laminate respectively; and a coil, arranged within the laminate and formed by electrically connecting a plurality of strip-like conductor patterns. The conductor patterns have: a pair of broad faces, intersecting the lamination direction and mutually opposing; and peripheral side faces adjacent to the pair of broad faces and extending in the lamination direction. The peripheral side faces are concavo-convex faces, in which concave portions and convex portions are arranged in alternation in the lamination direction. The laminate enters into the concave portions of the peripheral side faces.
    • 层叠电感器,即使在导体图案厚度大的情况下,叠层方向的层叠方向的各部分的相邻的导体图案之间也不会发生很小的倾向,以及制造这样的层叠电感器的方法 提供。 层叠电感器包括:层压体; 一对外部电极分别布置在层压板的外表面上; 以及线圈,其布置在层压体内并且通过电连接多个条状导体图案而形成。 导体图案具有:一对宽面,与层叠方向相交并相互相对; 以及与所述一对宽面相邻并且在层叠方向上延伸的周边侧面。 周边侧面是凹凸面,凹部和凸部在层叠方向上交替排列。 层压体进入周边侧面的凹部。
    • 4. 发明申请
    • TEST APPARATUS, TEST METHOD, ANALYZING APPARATUS AND COMPUTER READABLE MEDIUM
    • 测试仪器,测试方法,分析仪器和计算机可读介质
    • US20090070624A1
    • 2009-03-12
    • US12047329
    • 2008-03-13
    • Kunihiko KAWASAKI
    • Kunihiko KAWASAKI
    • G06F11/20
    • G11C29/56G11C29/56008G11C2029/2602
    • There is provided a test apparatus including a plurality of test signal feeding sections that are provided in a one-to-one correspondence with the plurality of memories under test, where each of the plurality of test signal feeding sections feeds a test signal designed to test a corresponding one of the plurality of memories under test to the corresponding memory under test, a plurality of defect detecting sections that are provided in a one-to-one correspondence with the plurality of memories under test, where each of the plurality of defect detecting sections detects a defect in a corresponding one of the plurality of memories under test, a plurality of first calculating sections that are provided in a one-to-one correspondence with the plurality of memories under test, where each of the plurality of first calculating sections calculates a remedy solution for a corresponding one of the plurality of memories under test and the remedy solution remedies the defect in the corresponding memory under test by replacing a defective storage cell in the corresponding memory under test with a backup cell of the corresponding memory under test, and a second calculating section that takes over, from one or more of the plurality of first calculating sections which have not finished calculating the remedy solutions, the unfinished remedy solution calculations, in response to a start of calculations by the plurality of first calculating sections for remedy solutions for a different group of memories under test, and performs the remedy solution calculations.
    • 提供了一种测试装置,包括多个测试信号馈送部分,所述测试信号馈送部分与被测试的多个存储器一一对应地设置,其中多个测试信号馈送部分中的每一个馈送设计为测试的测试信号 被测试的多个存储器中的对应的一个被测试的对应存储器,多个缺陷检测部分,与被测试的多个存储器一一对应地设置,其中多个缺陷检测 部分检测被测试的多个存储器中的对应的一个中的缺陷,多个第一计算部分,与被测试的多个存储器一一对应地设置,其中多个第一计算部分 为被测试的多个存储器中的对应的一个计算补救解决方案,并且补救措施解决了相应的m中的缺陷 通过用待测对应的存储器的备用单元替换被测试的对应的存储器中的有缺陷的存储单元的第二计算部分,以及从未完成的多个第一计算部分中的一个或多个接管的第二计算部分, 响应于所述多个第一计算部分开始计算用于被测试的不同存储器组的补救方案,并且执行补救方案计算,来计算补救措施解决方案,未完成的补救方案计算。
    • 5. 发明申请
    • TEST APPARATUS
    • 测试仪器
    • US20120249157A1
    • 2012-10-04
    • US13410264
    • 2012-03-01
    • Masaaki KOSUGIKunihiko KAWASAKI
    • Masaaki KOSUGIKunihiko KAWASAKI
    • G01R31/02
    • G11C29/808G11C29/56008
    • Provided is a test apparatus that tests a memory under test including a plurality of repair regions for repairing fails in a memory region, the test apparatus comprising a testing section that sequentially tests each of a plurality of portions of the memory region of the memory under test; a repair solution memory that stores a repair solution indicating which repair region replaces a fail portion of the memory under test; and an updating section that, during testing, in response to a new fail portion being detected by the testing section, updates the repair solution stored in the repair solution memory to be a repair solution that also repairs the newly detected fail portion.
    • 提供了一种测试装置,其对在存储区域中的多个用于修复故障的修复区域进行测试的测试装置进行测试,所述测试装置包括测试部分,其顺序地测试被测存储器的存储区域的多个部分中的每一个 ; 一个维修解决方案存储器,用于存储指示哪个修复区域取代待测存储器的故障部分的修复解决方案; 以及更新部,其在测试期间,响应于由所述测试部分检测到的新的故障部分,将存储在所述修复解决方案存储器中的所述修复解决方案更新为也修复所述新检测到的故障部分的修复解决方案。
    • 6. 发明申请
    • TEST APPARATUS
    • 测试仪器
    • US20110015890A1
    • 2011-01-20
    • US12824108
    • 2010-06-25
    • Hironaga YAMASHITANoriyuki MASUDAKunihiko KAWASAKI
    • Hironaga YAMASHITANoriyuki MASUDAKunihiko KAWASAKI
    • G06F19/00
    • G01R31/31907G11C29/56
    • Provided is a test apparatus that tests a device under test, comprising a test module that transmits and receives signals to and from the device under test; and a test control section that executes a test program for testing the device under test and that instructs the test module to execute a function designated by the test program from among a plurality of functions of the test module. The test module includes a signal input/output section that transmits and receives signals to and from the device under test; and a module control section that executes a function program according to the function designated by the test program and that accesses at least one of a register and a memory in the signal input/output section.
    • 提供了一种测试被测设备的测试设备,包括:测试模块,用于向被测设备发送和接收信号; 以及测试控制部,执行用于测试被测设备的测试程序,并且指示测试模块从测试模块的多个功能中执行由测试程序指定的功能。 测试模块包括信号输入/输出部分,用于向被测设备发送和接收信号; 以及模块控制部分,其根据由测试程序指定的功能执行功能程序,并且访问信号输入/输出部分中的寄存器和存储器中的至少一个。