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1. 发明申请

US20050237437A1 Video signal processing circuit, video display, and display driving device 失效
标题翻译：视频信号处理电路，视频显示和显示驱动装置
公开(公告)号：US20050237437A1
公开(公告)日：2005-10-27
申请号：US11110815
申请日：2005-04-21
申请人： Masami Ebara , Toru Sasaki
发明人： Masami Ebara , Toru Sasaki
IPC分类号： G09G3/20 , H04N3/14
CPC分类号： G09G3/2092 , G09G2310/021 , G09G2340/0414 , G09G2340/0421
摘要： Provided is a video signal processing circuit capable, in a scale conversion, of rendering a circuit scale small and alleviating a deterioration of a vertical resolution. A vertical scaler is provided with a function of increasing the number of scanning lines of an input video signal. An increasing rate thereof is adjacent to 1.0. In a case that the number of unit output lines is M, the number of unit input lines is N, and the increasing rate is α, a condition of 0
摘要翻译：提供了一种视频信号处理电路，其能够在缩放转换中使电路规模小，并且减轻垂直分辨率的劣化。垂直缩放器具有增加输入视频信号的扫描行数的功能。其增加速度与1.0相邻。在单位输出行数为M的情况下，单位输入行数为N，增加率为α，满足0 <α<2的条件。也就是说，alpha与1.0相邻。多个多个时间读出电路通过3时钟向输入视频信号执行读出。此外，多个数量的多个时间读出电路被配置为不选择通过地址超驰读出的视频信号。水平缩放器根据液晶面板的水平点的数量内插水平方向的点数。

2. 发明授权

US07408589B2 Video signal processing circuit, video display, and display driving device 失效
标题翻译：视频信号处理电路，视频显示和显示驱动装置
公开(公告)号：US07408589B2
公开(公告)日：2008-08-05
申请号：US11110815
申请日：2005-04-21
申请人： Masami Ebara , Toru Sasaki
发明人： Masami Ebara , Toru Sasaki
IPC分类号： H04N1/393 , H04N7/01
CPC分类号： G09G3/2092 , G09G2310/021 , G09G2340/0414 , G09G2340/0421
摘要： Provided is a video signal processing circuit capable, in a scale conversion, of rendering a circuit scale small and alleviating a deterioration of a vertical resolution. A vertical scaler is provided with a function of increasing the number of scanning lines of an input video signal. An increasing rate thereof is adjacent to 1.0. In a case that the number of unit output lines is M, the number of unit input lines is N, and the increasing rate is α, a condition of 0
摘要翻译：提供了一种视频信号处理电路，其能够在缩放转换中使电路规模小，并且减轻垂直分辨率的劣化。垂直缩放器具有增加输入视频信号的扫描行数的功能。其增加速度与1.0相邻。在单位输出行数为M的情况下，单位输入行数为N，增加率为α，满足0 <α<2的条件。也就是说，alpha与1.0相邻。多个多个时间读出电路通过3时钟向输入视频信号执行读出。此外，多个数量的多个时间读出电路被配置为不选择通过地址超驰读出的视频信号。水平缩放器根据液晶面板的水平点的数量内插水平方向的点数。

3. 发明申请

US20060001633A1 Display driving device 审中-公开
标题翻译：显示驱动装置
公开(公告)号：US20060001633A1
公开(公告)日：2006-01-05
申请号：US11159407
申请日：2005-06-23
申请人： Masami Ebara , Toru Sasaki
发明人： Masami Ebara , Toru Sasaki
IPC分类号： G09G3/36
CPC分类号： G09G5/005 , G09G5/006 , G09G2340/0421
摘要： A liquid crystal panel receives a Φ2 as an operation clock, and receives a digital video signal (D or E) from a selection circuit. The digital video signal (D or E) is output in a period half a Φ2 period. The operation clock of the panel is the Φ2. Thus, the same dot data (a same-location signal value in the video signal) in the video signal is successively supplied to adjacent two dots aligned horizontally on the liquid crystal panel. At timing of a first field, an input digital video signal (B) is not delayed, and is supplied to the liquid crystal panel 20 as the digital video signal (D). At timing of a second field, the input digital signal B is delayed, and supplied to the liquid crystal panel as a 1-clock-delay video signal (E).
摘要翻译：液晶面板接收作为操作时钟的Phi2，并从选择电路接收数字视频信号（D或E）。数字视频信号（D或E）在Phi2周期的一半周期内输出。面板的操作时钟是Phi 2。因此，视频信号中相同的点数据（视频信号中的相同位置信号值）被连续提供给在液晶面板上水平排列的相邻两个点。在第一场的定时，输入数字视频信号（B）不被延迟，并作为数字视频信号（D）提供给液晶面板20。在第二场的定时，输入数字信号B被延迟，并作为1时钟延迟视频信号（E）提供给液晶面板。

4. 发明申请

US20050243918A1 Encoding circuit 失效
标题翻译：编码电路
公开(公告)号：US20050243918A1
公开(公告)日：2005-11-03
申请号：US11112737
申请日：2005-04-22
申请人： Masami Ebara , Osamu Takae
发明人： Masami Ebara , Osamu Takae
IPC分类号： H04N19/50 , H03M7/30 , H04N7/12 , H04N19/105 , H04N19/136 , H04N19/196 , H04N19/42 , H04N19/423 , H04N19/503 , H04N19/51 , H04N19/60 , H04N19/61 , H04N19/91
CPC分类号： H04N19/137 , H04N19/122 , H04N19/124 , H04N19/176 , H04N19/60
摘要： Blocks in two different frames are subjected to Hadamard transform by first and second Hadamard transform circuits, and a sum component and a difference component are calculated for the components of the two blocks corresponding to each other to perform three-dimensional Hadamard transform, so that detection is made as to whether or not these blocks include a motion. While the sum component and the difference component are encoded for the block determined as including a motion, a motion detection result, rather than the difference component, is encoded for the block determined as including no motion. As a result, a high compression ratio can be achieved in video encoding with a small-scale circuit.
摘要翻译：通过第一和第二Hadamard变换电路对两个不同帧中的块进行Hadamard变换，并且针对彼此对应的两个块的分量计算和分量和差分量，以执行三维Hadamard变换，从而检测这些块是否包括运动。虽然对于被确定为包括运动的块被编码了和分量和差分量，但是对于被确定为不包括运动的块来编码运动检测结果而不是差分分量。结果，在具有小规模电路的视频编码中可以实现高压缩比。

5. 发明授权

US5130858A Apparatus having a field memory for reproducing video signals 失效
标题翻译：具有用于复制视频信号的现场记录的装置
公开(公告)号：US5130858A
公开(公告)日：1992-07-14
申请号：US614572
申请日：1990-11-16
申请人： Masami Ebara , Yasuo Onishi , Yukio Sugimura , Shinya Okuno
发明人： Masami Ebara , Yasuo Onishi , Yukio Sugimura , Shinya Okuno
IPC分类号： H04N9/877
CPC分类号： H04N9/877
摘要： A video signal reproducing apparatus, such as a video disc player, equipped with a field memory for special reproduction such as still-picture reproduction. The video signal writing-reading period for the field memory is set to a value which is the color subcarrier period multiplied by an integer, is also the horizontal synchronizing period multiplied by an integer and is further approximate to one field period to the greatest possible extent, to thereby eliminate the discontinuity of video signals due to the track jumping action of the pickup.

6. 发明授权

US4994900A Television receiver 失效
公开(公告)号：US4994900A
公开(公告)日：1991-02-19
申请号：US431956
申请日：1989-11-06
申请人： Masami Ebara , Hajime Mizugami , Tadashi Amino
发明人： Masami Ebara , Hajime Mizugami , Tadashi Amino
IPC分类号： H04N9/78
CPC分类号： H04N9/78
摘要： In normal reproduction, a switch circuit (11) is set to select an output signal of an A/D converter (1). Consequently, a movement adaptation type YC separating circuit is formed, whereby a luminance signal and a chrominance signal are separated. When a control signal is outputted from a control signal generating circuit (12) in response to an instruction of still picture reproduction, the switch circuit (11) selects an output signal of the last output terminal of delay means formed by line memory (2) or frame memory (3) and inputs the selected signal to the first input terminal of the delay means. As a result, in still picture reproduction, a circulating circuit where the inputted composite video signal circulates in the delay means is formed and a luminance signal and a chrominance signal are separated based on a plurality of composite video signals having different delay times obtained from the circulating circuit. Thus, the delay means provided in the movement adaptation type YC separating circuit is used also for processing of still picture reproduction.

7. 发明授权

US4658293A Scanning conversion method and scan converter unit employing the conversion method 失效
标题翻译：采用转换方法的扫描转换方法和扫描转换器单元
公开(公告)号：US4658293A
公开(公告)日：1987-04-14
申请号：US748646
申请日：1985-06-25
申请人： Takeshi Arai , Masami Ebara , Hiroyuki Ueyama
发明人： Takeshi Arai , Masami Ebara , Hiroyuki Ueyama
IPC分类号： H04N5/44 , H04N7/01
CPC分类号： H04N7/012
摘要： A scanning conversion method prepares, in order to convert 2:1 interlace scanning video signals formed by (2N+1)/2 lines (N: positive integer) into progressive scanning system video signals, a memory (23) having addresses corresponding to N+1 lines. The address of the memory (23) for N+1 lines are circulated thereby to progressively write the interlace scanning video signals in the addresses while reading the signals from the addresses subjected to the writing at a speed twice that in the writing repeatedly twice.
摘要翻译：为了将由（2N + 1）/ 2行（N：正整数）形成的2：1隔行扫描视频信号转换为逐行扫描系统视频信号，扫描转换方法准备具有对应于N的地址的存储器（23） +1行。循环用于N + 1行的存储器（23）的地址，从而逐行写入地址中的逐行扫描视频信号，同时以两倍于写入次数的两倍的速度读取来自写入的地址的信号。

8. 发明授权

US07711046B2 Encoding circuit 失效
标题翻译：编码电路
公开(公告)号：US07711046B2
公开(公告)日：2010-05-04
申请号：US11112737
申请日：2005-04-22
申请人： Masami Ebara , Osamu Takae
发明人： Masami Ebara , Osamu Takae
IPC分类号： H04B1/66 , H04N7/12
CPC分类号： H04N19/137 , H04N19/122 , H04N19/124 , H04N19/176 , H04N19/60
摘要： Blocks in two different frames are subjected to Hadamard transform by first and second Hadamard transform circuits, and a sum component and a difference component are calculated for the components of the two blocks corresponding to each other to perform three-dimensional Hadamard transform, so that detection is made as to whether or not these blocks include a motion. While the sum component and the difference component are encoded for the block determined as including a motion, a motion detection result, rather than the difference component, is encoded for the block determined as including no motion. As a result, a high compression ratio can be achieved in video encoding with a small-scale circuit.
摘要翻译：通过第一和第二Hadamard变换电路对两个不同帧中的块进行Hadamard变换，并且对于彼此对应的两个块的分量计算和分量和差分量，以执行三维Hadamard变换，从而检测这些块是否包括运动。虽然对于被确定为包括运动的块被编码了和分量和差分量，但是对于被确定为不包括运动的块来编码运动检测结果而不是差分分量。结果，在具有小规模电路的视频编码中可以实现高压缩比。

9. 发明授权

US07680344B2 Encoding control circuit and encoding circuit 失效
标题翻译：编码控制电路和编码电路
公开(公告)号：US07680344B2
公开(公告)日：2010-03-16
申请号：US11112712
申请日：2005-04-22
申请人： Masami Ebara , Osamu Takae
发明人： Masami Ebara , Osamu Takae
IPC分类号： G06K9/36
CPC分类号： H04N19/132 , H04N19/152 , H04N19/172 , H04N19/182 , H04N19/59
摘要： It is possible to control the number of generated codes while retraining deterioration of an image quality by an encoding circuit constituted so as to select any of a first image signal not decreasing information quantity and a second image signal decreasing information quantity in accordance with the accumulated value of the number of codes.
摘要翻译：可以通过编码电路重新生成图像质量的劣化来控制生成的代码的数量，以便根据累积值选择不减少信息量的第一图像信号和第二图像信号减少信息量的代码数量。

10. 发明申请

US20050249424A1 Encoding control circuit and encoding circuit 失效
标题翻译：编码控制电路和编码电路
公开(公告)号：US20050249424A1
公开(公告)日：2005-11-10
申请号：US11112712
申请日：2005-04-22
申请人： Masami Ebara , Osamu Takae
发明人： Masami Ebara , Osamu Takae
IPC分类号： H04N19/117 , G06K9/36 , H04N19/146 , H04N19/172 , H04N19/196 , H04N19/60 , H04N19/625 , H04N19/86
CPC分类号： H04N19/132 , H04N19/152 , H04N19/172 , H04N19/182 , H04N19/59
摘要： It is possible to control the number of generated codes while retraining deterioration of an image quality by an encoding circuit constituted so as to select any of a first image signal not decreasing information quantity and a second image signal decreasing information quantity in accordance with the accumulated value of the number of codes.
摘要翻译：可以通过编码电路重新生成图像质量的劣化来控制生成的代码的数量，该编码电路构成为根据累积值选择不减少信息量的第一图像信号和第二图像信号减少信息量的代码数量。

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