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1. 发明申请

US20060246683A1 Integrated equipment set for forming a low K dielectric interconnect on a substrate 审中-公开
标题翻译：用于在基板上形成低K电介质互连的集成设备
公开(公告)号：US20060246683A1
公开(公告)日：2006-11-02
申请号：US11472662
申请日：2006-06-21
申请人： Judon Pan , Michael Armacost , Hoiman Hung , Hongwen Li , Arulkumar Shanmugasundram , Moshe Sarfaty , Dimitris Lymberopoulos , Mehul Naik
发明人： Judon Pan , Michael Armacost , Hoiman Hung , Hongwen Li , Arulkumar Shanmugasundram , Moshe Sarfaty , Dimitris Lymberopoulos , Mehul Naik
IPC分类号： H01L21/76
CPC分类号： H01L21/67161 , H01L21/67167 , H01L21/67173 , H01L21/67184 , H01L21/67219 , H01L21/6723 , H01L21/67276 , H01L22/20
摘要： A method is provided that includes (1) receiving information about a substrate processed within a low K dielectric deposition subsystem from an integrated inspection system of the low K dielectric deposition subsystem; (2) determining an etch process to perform within an etch subsystem based at least in part on the information received from the inspection system of the low K dielectric deposition subsystem; and (3) directing the etch subsystem to etch at least one low K dielectric layer on the substrate based on the etch process. Other methods, systems, apparatus, data structures and computer program products are provided.
摘要翻译：提供一种方法，其包括（1）从低K电介质沉积子系统的综合检查系统接收关于在低K电介质沉积子系统内处理的衬底的信息; （2）至少部分地基于从低K电介质沉积子系统的检查系统接收的信息来确定在蚀刻子系统内执行的蚀刻工艺; 和（3）引导蚀刻子系统基于蚀刻工艺蚀刻衬底上的至少一个低K电介质层。提供其他方法，系统，设备，数据结构和计算机程序产品。

2. 发明授权

US06625513B1 Run-to-run control over semiconductor processing tool based upon mirror image target 有权
标题翻译：基于镜像目标的半导体处理工具的运行控制
公开(公告)号：US06625513B1
公开(公告)日：2003-09-23
申请号：US09639140
申请日：2000-08-15
申请人： Dimitris Lymberopoulos , Terry Reiss , Arulkumar Shanmugasundram
发明人： Dimitris Lymberopoulos , Terry Reiss , Arulkumar Shanmugasundram
IPC分类号： G06F1900
CPC分类号： G05B19/41865 , G05B2219/31432 , G05B2219/31443 , G05B2219/45026 , G05B2219/45232 , Y02P90/20 , Y02P90/26
摘要： Run-to-run variation of a semiconductor fabrication tool is minimized utilizing a mirror image target. A goal represents a process result desired from operation of the tool. The mirror image target is generated by adding the goal to a difference between an output from a previous tool run and the goal. Prediction of tool performance is based upon a data-based modeling engine utilizing a reference library correlating operational parameters with observed process results for prior tool runs. The mirror image target vector is compared to the reference library and serves as a basis for generating the recipe for the subsequent process run. This recipe automatically brings operation of the tool back toward the goal. The method may further include comparison of the suggested recipe with the recipe of the prior run to determine whether run-to-run variation is serious enough to warrant a change in tool conditions, or whether run-to-run variation is so serious as to indicate a major tool problem. Generation of the mirror image target, and utilization of the mirror image target to create a new process recipe, eliminates effort and uncertainty associated with conventional nonsystematic analysis of tool variation, followed by manual intervention by the operator to adjust tool parameters to reduce such variation.
摘要翻译：使用镜像目标来最小化半导体制造工具的运行变化。目标代表了该工具运行所需的过程结果。通过将目标添加到先前工具运行的输出和目标之间的差异来生成镜像目标。工具性能的预测是基于基于数据的建模引擎，利用参考库将操作参数与现有工具运行的观察过程结果相关联。将镜像目标向量与参考库进行比较，并作为生成随后进程运行的配方的基础。该配方自动将工具的操作返回到目标。该方法还可以包括将建议的配方与先前运行的配方进行比较，以确定跑步运行变化是否足够严重以保证工具条件的改变，或运行中的变化是否如此严重表明一个主要的工具问题。镜像目标的生成以及镜像目标的利用以创建新的过程配方，消除了与传统的工具变化的非系统分析相关联的工作量和不确定性，随后由操作员进行人工干预以调整工具参数以减少这种变化。

3. 发明申请

US20070099417A1 Adhesion and minimizing oxidation on electroless CO alloy films for integration with low K inter-metal dielectric and etch stop 审中-公开
标题翻译：粘附和最小化无电解CO合金膜上的氧化，用于与低K金属间电介质和蚀刻停止集成
公开(公告)号：US20070099417A1
公开(公告)日：2007-05-03
申请号：US11329785
申请日：2006-01-10
申请人： Hongbin Fang , Timothy Weidman , Fang Mei , Yaxin Wang , Arulkumar Shanmugasundram , Christopher Bencher , Mehul Naik
发明人： Hongbin Fang , Timothy Weidman , Fang Mei , Yaxin Wang , Arulkumar Shanmugasundram , Christopher Bencher , Mehul Naik
IPC分类号： H01L21/469
CPC分类号： H01L21/76843 , H01L21/76829 , H01L21/76846 , H01L21/76849 , H01L21/76862 , H01L21/76864
摘要： A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on the substrate, reducing oxide formation on the capping layer, and then depositing a dielectric material. A method and apparatus for processing a semiconductor substrate including depositing a capping layer upon a conductive material formed on a substrate, exposing the capping layer to a plasma, heating the substrate to more than about 100° C., and depositing a low dielectric constant material.
摘要翻译：一种用于处理半导体衬底的方法和装置，包括在形成在衬底上的导电材料上沉积覆盖层，减少覆盖层上的氧化物形成，然后沉积电介质材料。一种用于处理半导体衬底的方法和装置，包括在形成在衬底上的导电材料上沉积覆盖层，将覆盖层暴露于等离子体，将衬底加热到大于约100℃，以及沉积低介电常数材料。

4. 发明授权

US08308858B2 Electroless deposition process on a silicon contact 有权
标题翻译：硅触点上的无电沉积工艺
公开(公告)号：US08308858B2
公开(公告)日：2012-11-13
申请号：US12689176
申请日：2010-01-18
申请人： Michael P. Stewart , Timothy W. Weidman , Arulkumar Shanmugasundram , David J. Eaglesham
发明人： Michael P. Stewart , Timothy W. Weidman , Arulkumar Shanmugasundram , David J. Eaglesham
IPC分类号： C23C18/30 , C23C18/36
CPC分类号： C23C18/1893 , B82Y30/00 , C23C18/1651 , C23C18/32 , C23C18/34 , H01L21/02063 , H01L21/28518 , H01L21/288 , H01L21/76802 , H01L21/76814 , H01L21/76843 , H01L21/76847 , H01L21/76855 , H01L21/76856 , H01L21/76867 , H01L21/76874 , H01L21/76879 , H01L21/76889
摘要： Embodiments as described herein provide methods for depositing a material on a substrate during electroless deposition processes, as well as compositions of the electroless deposition solutions. In one embodiment, the substrate contains a contact aperture having an exposed silicon contact surface. In another embodiment, the substrate contains a contact aperture having an exposed silicide contact surface. The apertures are filled with a metal contact material by exposing the substrate to an electroless deposition process. The metal contact material may contain a cobalt material, a nickel material, or alloys thereof. Prior to filling the apertures, the substrate may be exposed to a variety of pretreatment processes, such as preclean processes and activations processes. A preclean process may remove organic residues, native oxides, and other contaminants during a wet clean process or a plasma etch process. Embodiments of the process also provide the deposition of additional layers, such as a capping layer.
摘要翻译：本文所述的实施方案提供了在无电沉积工艺期间在基材上沉积材料的方法以及无电沉积溶液的组合物。在一个实施例中，衬底包含具有暴露的硅接触表面的接触孔。在另一个实施例中，衬底包含具有暴露的硅化物接触表面的接触孔。通过将基板暴露于无电镀沉积工艺，用金属接触材料填充孔。金属接触材料可以包含钴材料，镍材料或其合金。在填充孔之前，衬底可以暴露于各种预处理工艺，例如预清洗工艺和激活工艺。预清洗方法可以在湿式清洁工艺或等离子体蚀刻工艺期间去除有机残余物，天然氧化物和其它污染物。该方法的实施方案还提供附加层的沉积，例如覆盖层。

5. 发明授权

US07827930B2 Apparatus for electroless deposition of metals onto semiconductor substrates 有权
标题翻译：用于将金属无电沉积到半导体衬底上的装置
公开(公告)号：US07827930B2
公开(公告)日：2010-11-09
申请号：US11043442
申请日：2005-01-26
申请人： Dmitry Lubomirsky , Arulkumar Shanmugasundram , Russell Ellwanger , Ian A. Pancham , Ramakrishna Cheboli , Timothy W. Weidman
发明人： Dmitry Lubomirsky , Arulkumar Shanmugasundram , Russell Ellwanger , Ian A. Pancham , Ramakrishna Cheboli , Timothy W. Weidman
IPC分类号： B05C3/02
CPC分类号： H01L21/67155 , C23C18/1628 , H01L21/67167 , H01L21/6719 , H01L21/6723
摘要： An electroless deposition system is provided. The system includes a processing mainframe, at least one substrate cleaning station positioned on the mainframe, and an electroless deposition station positioned on the mainframe. The electroless deposition station includes an environmentally controlled processing enclosure, a first processing station configured to clean and activate a surface of a substrate, a second processing station configured to electrolessly deposit a layer onto the surface of the substrate, and a substrate transfer shuttle positioned to transfer substrates between the first and second processing stations. The system also includes a substrate transfer robot positioned on the mainframe and configured to access an interior of the processing enclosure. The system also includes a substrate a fluid delivery system that is configured to deliver a processing fluid by use of a spraying process to a substrate mounted in the processing enclosure.
摘要翻译：提供无电沉积系统。该系统包括处理主机，位于主机上的至少一个基板清洗台和位于主机上的无电沉积站。无电沉积站包括环境受控的处理外壳，被配置为清洁和激活基板的表面的第一处理站，被配置为将层无电沉积到基板的表面上的第二处理站，以及位于在第一和第二处理站之间传送衬底。该系统还包括位于主机上并被配置为访问处理外壳内部的基板传送机器人。该系统还包括一个流体输送系统，该流体输送系统被配置成通过使用喷射过程将处理流体输送到安装在处理外壳中的基板。

6. 发明申请

US20080109089A1 Dynamic metrology schemes and sampling schemes for advanced process control in semiconductor processing 有权
标题翻译：动态测量方案和采样方案，用于半导体处理中的先进过程控制
公开(公告)号：US20080109089A1
公开(公告)日：2008-05-08
申请号：US12006318
申请日：2007-12-31
申请人： Arulkumar Shanmugasundram , Alexander Sohwarm
发明人： Arulkumar Shanmugasundram , Alexander Sohwarm
IPC分类号： G05B13/02
CPC分类号： B24B37/013 , B24B37/042 , B24B49/03 , B24B49/18 , B24B53/017 , G05B19/00 , G05B19/19 , G05B19/41865 , G05B2219/32053 , G05B2219/32065 , G05B2219/45031 , H01L21/31053 , H01L21/67253 , H01L21/67276 , H01L22/20 , Y02P90/14 , Y02P90/20 , Y02P90/22 , Y02P90/86
摘要： Systems, methods and mediums are provided for dynamic adjustment of sampling plans in connection with a wafer (or other device) to be measured. The invention adjusts the frequency and/or spatial resolution of measurements on an as-needed basis when one or more events occur that are likely to indicate an internal or external change affecting the manufacturing process or results. The dynamic metrology plan adjusts the spatial resolution of sampling within-wafer by adding, subtracting or replacing candidate points from the sampling plan, in response to certain events which suggest that additional or different measurements of the wafer may be desirable. Further, the invention may be used in connection with adjusting the frequency of wafer-to-wafer measurements.
摘要翻译：提供了系统，方法和介质，用于与要测量的晶片（或其他器件）相关的采样计划的动态调整。当发生可能指示影响制造过程或结果的内部或外部变化的一个或多个事件时，本发明在需要的基础上调整测量的频率和/或空间分辨率。动态计量计划通过根据某些事件增加，减去或替换采样计划中的候选点来调整晶片内采样的空间分辨率，这些事件表明可能需要对晶片进行额外或不同的测量。此外，本发明可以与调整晶片到晶片测量的频率有关。

7. 发明授权

US07341633B2 Apparatus for electroless deposition 有权
标题翻译：无电沉积装置
公开(公告)号：US07341633B2
公开(公告)日：2008-03-11
申请号：US10965220
申请日：2004-10-14
申请人： Dmitry Lubomirsky , Arulkumar Shanmugasundram , Ian A. Pancham , Sergey Lopatin
发明人： Dmitry Lubomirsky , Arulkumar Shanmugasundram , Ian A. Pancham , Sergey Lopatin
IPC分类号： B05C3/09 , B05C13/02
CPC分类号： H01L21/76838 , C23C18/1601 , C23C18/1619 , C23C18/1628 , C23C18/1678 , C23C18/1682 , C23C18/1872 , C23C18/28 , H01L21/288 , Y10S134/902
摘要： Embodiments of the invention generally provide a fluid processing platform. The platform includes a mainframe having a substrate transfer robot, at least one substrate cleaning cell on the mainframe, and at least one processing enclosure. The processing enclosure includes a gas supply positioned in fluid communication with an interior of the processing enclosure, a first fluid processing cell positioned in the enclosure, a first substrate head assembly positioned to support a substrate for processing in the first fluid processing cell, a second fluid processing cell positioned in the enclosure, a second head assembly positioned to support a substrate for processing in the second fluid processing cell, and a substrate shuttle positioned between the first and second fluid processing cells and being configured to transfer substrates between the fluid processing cells and the mainframe robot.
摘要翻译：本发明的实施例通常提供流体处理平台。平台包括具有基板传送机器人的主机，主机上的至少一个基板清洁单元，以及至少一个处理机壳。处理外壳包括定位成与处理外壳的内部流体连通的气体供应源，位于外壳中的第一流体处理单元，定位成支撑基板以在第一流体处理单元中进行处理的第一基板头组件，第二流体处理单元位于外壳中的流体处理单元，定位成支撑用于在第二流体处理单元中进行处理的基板的第二头部组件，以及位于第一和第二流体处理单元之间的衬底梭，并且构造成将衬底在流体处理单元和主机机器人。

8. 发明授权

US07247080B1 Feedback controlled polishing processes 有权
标题翻译：反馈控制抛光工艺
公开(公告)号：US07247080B1
公开(公告)日：2007-07-24
申请号：US11397075
申请日：2006-04-03
申请人： Doyle E. Bennett , Boguslaw A. Swedek , Arulkumar Shanmugasundram
发明人： Doyle E. Bennett , Boguslaw A. Swedek , Arulkumar Shanmugasundram
IPC分类号： B24B49/00 , B24B49/12
CPC分类号： G05B19/41875 , G05B2219/45232 , Y02P90/22
摘要： Methods and apparatus for feedback controlled polishing. A computer program product for generating feedback for chemical mechanical polishing. The product includes instructions operable to cause a processor to receive monitoring information during a current polishing cycle in which a first polishing process is performed on a substrate that includes a metal layer. The first polishing process clears the metal layer from the substrate during the current polishing cycle. The product includes instructions to calculate a representation of a clearing profile of the first polishing process. The calculation is based on the monitoring information received during the current polishing cycle. The product includes instructions to detect non-uniformity in the representation. The product includes instructions to generate, from the non-uniformity detected, feedback information for improving the uniformity of a clearing profile of the first polishing process for a subsequent polishing cycle.
摘要翻译：用于反馈控制抛光的方法和装置。一种用于产生化学机械抛光反馈的计算机程序产品。该产品包括可操作以使处理器在当前抛光循环期间接收监测信息的指令，其中在包括金属层的基板上执行第一抛光工艺。在当前的抛光循环期间，第一抛光工艺从衬底中清除金属层。该产品包括计算第一次抛光过程的清除轮廓的表示的说明。该计算基于在当前抛光周期期间接收到的监视信息。该产品包括检测表示中不均匀的指令。该产品包括从不均匀性检测到的反馈信息中产生用于改进随后抛光循环的第一抛光处理的清除轮廓的均匀性的指令。

9. 发明申请

US20060251801A1 In-situ silicidation metallization process 审中-公开
标题翻译：原位硅化金属化工艺
公开(公告)号：US20060251801A1
公开(公告)日：2006-11-09
申请号：US11385484
申请日：2006-03-20
申请人： Timothy Weidman , Srinivas Gandikota , Michael Stewart , Avgerinos Gelatos , Arulkumar Shanmugasundram
发明人： Timothy Weidman , Srinivas Gandikota , Michael Stewart , Avgerinos Gelatos , Arulkumar Shanmugasundram
IPC分类号： B05D5/12
CPC分类号： C23C18/1678 , B82Y30/00 , C23C16/0227 , C23C16/0281 , C23C16/045 , C23C16/14 , C23C18/1608 , C23C18/1651 , C23C18/1653 , C23C18/31 , C23C18/32 , C23C18/34 , C23C18/38 , C23C18/40 , C23C18/48 , C25D5/34 , H01L21/02063 , H01L21/02074 , H01L21/28518 , H01L21/28556 , H01L21/288 , H01L21/2885 , H01L21/76814 , H01L21/76843 , H01L21/76844 , H01L21/76846 , H01L21/76847 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/76861 , H01L21/76862 , H01L21/76874 , H01L21/76877 , H01L21/76879 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： Embodiments of the invention provide a simplified method of filling contact level features formed in a semiconductor device. In general the method includes a novel method of forming a contact level feature that contains a silicide interface and a tungsten CVD deposited layer. The processes discussed below are less complex and less time consuming than other conventional contact level interconnect formation processes and thus will have an improved device yield.
摘要翻译：本发明的实施例提供了一种填充形成在半导体器件中的接触电平特征的简化方法。通常，该方法包括形成包含硅化物界面和钨CVD沉积层的接触电平特征的新方法。下面讨论的方法比其它常规的接触电平互连形成过程更不复杂和更耗时，因此将具有改进的器件产量。

10. 发明申请

US20060246699A1 Process for electroless copper deposition on a ruthenium seed 审中-公开
标题翻译：在钌种子上沉积无电镀铜的方法
公开(公告)号：US20060246699A1
公开(公告)日：2006-11-02
申请号：US11385038
申请日：2006-03-20
申请人： Timothy Weidman , Arulkumar Shanmugasundram , Kapila Wijekoon , Schubert Chu , Frederick Wu , Kavita Shah
发明人： Timothy Weidman , Arulkumar Shanmugasundram , Kapila Wijekoon , Schubert Chu , Frederick Wu , Kavita Shah
IPC分类号： H01L21/44
CPC分类号： C23C18/40 , C23C18/1608 , C23C18/165 , H01L21/288 , H01L21/76802 , H01L21/76831 , H01L21/76843 , H01L21/76844 , H01L21/76849 , H01L21/76864 , H01L21/76873 , H01L21/76874 , H01L21/76877
摘要： Embodiments of the invention provide methods for forming conductive materials within contact features on a substrate by depositing a seed layer within a feature and subsequently filling the feature with a copper-containing material during an electroless deposition process. In one example, a copper electroless deposition solution contains levelers to form convexed or concaved copper surfaces. In another example, a seed layer is selectively deposited on the bottom surface of the aperture while leaving the sidewalls substantially free of the seed material during a collimated PVD process. In another example, the seed layer is conformably deposited by a PVD process and subsequently, a portion of the seed layer and the underlayer are plasma etched to expose an underlying contact surface. In another example, a ruthenium seed layer is formed on an exposed contact surface by an ALD process utilizing the chemical precursor ruthenium tetroxide.
摘要翻译：本发明的实施例提供了通过在特征内沉积种子层并随后在无电沉积工艺期间用含铜材料填充该特征而在基底上的接触特征内形成导电材料的方法。在一个实例中，铜无电解沉积溶液含有形成凸形或凹陷铜表面的矫直机。在另一个实例中，在准直的PVD工艺期间，将籽晶层选择性地沉积在孔的底表面上，同时留下基本上不含种子材料的侧壁。在另一个实例中，种子层通过PVD工艺顺应地沉积，随后种子层和底层的一部分被等离子体蚀刻以暴露下面的接触表面。在另一个实例中，通过使用化学前体四氧化钌的ALD工艺在暴露的接触表面上形成钌籽晶层。

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