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1. 发明授权

US07719025B2 Integrated circuit ESD protection 有权
标题翻译：集成电路ESD保护
公开(公告)号：US07719025B2
公开(公告)日：2010-05-18
申请号：US11550650
申请日：2006-10-18
申请人： Qiang Chen , Gordon Ma
发明人： Qiang Chen , Gordon Ma
IPC分类号： H01L29/74
CPC分类号： H01L29/8618 , H01L27/0259 , H01L29/0692
摘要： A protective device in a semiconductor may comprise a substrate of a first conductivity type, an epitaxial layer formed on top of the substrate, a body area formed within the epitaxial layer of a second conductivity type extending from a top surface into the epitaxial layer, a first area of the first conductivity type extending from the top surface into the body area, an isolation area surrounding the first area, a ring area of the first conductivity type surrounding the isolation area, and a coupling structure for connecting the ring area with the substrate.
摘要翻译：半导体中的保护装置可以包括第一导电类型的衬底，形成在衬底顶部上的外延层，形成在从顶表面延伸到外延层中的第二导电类型的外延层内的主体区域，第一导电类型的从顶表面延伸到体区的第一区域，围绕第一区域的隔离区域，围绕隔离区域的第一导电类型的环区域和用于将环区域与衬底连接的耦合结构。

2. 发明授权

US07049669B2 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US07049669B2
公开(公告)日：2006-05-23
申请号：US10663051
申请日：2003-09-15
申请人： Gordon Ma , Qiang Chen
发明人： Gordon Ma , Qiang Chen
IPC分类号： H01L29/76
CPC分类号： H01L29/7835 , H01L29/0638 , H01L29/1083 , H01L29/66659
摘要： A semiconductor device comprises an active region of a first conductivity type including a transistor structure, and a ring shaped region of the first conductivity type extending from a surface of the active region into the active region and substantially surrounding the transistor structure.
摘要翻译：半导体器件包括包括晶体管结构的第一导电类型的有源区和从有源区的表面延伸到有源区并且基本上围绕晶体管结构的第一导电类型的环形区。

3. 发明申请

US20080093624A1 Integrated Circuit ESD Protection 有权
标题翻译：集成电路ESD保护
公开(公告)号：US20080093624A1
公开(公告)日：2008-04-24
申请号：US11550650
申请日：2006-10-18
申请人： Qiang Chen , Gordon Ma
发明人： Qiang Chen , Gordon Ma
IPC分类号： H01L29/74
CPC分类号： H01L29/8618 , H01L27/0259 , H01L29/0692
摘要： A protective device in a semiconductor may comprise a substrate of a first conductivity type, an epitaxial layer formed on top of the substrate, a body area formed within the epitaxial layer of a second conductivity type extending from a top surface into the epitaxial layer, a first area of the first conductivity type extending from the top surface into the body area, an isolation area surrounding the first area, a ring area of the first conductivity type surrounding the isolation area, and a coupling structure for connecting the ring area with the substrate.
摘要翻译：半导体中的保护装置可以包括第一导电类型的衬底，形成在衬底顶部上的外延层，形成在从顶表面延伸到外延层中的第二导电类型的外延层内的主体区域，第一导电类型的从顶表面延伸到体区的第一区域，围绕第一区域的隔离区域，围绕隔离区域的第一导电类型的环区域和用于将环区域与衬底连接的耦合结构。

4. 发明申请

US20050056889A1 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US20050056889A1
公开(公告)日：2005-03-17
申请号：US10663051
申请日：2003-09-15
申请人： Gordon Ma , Qiang Chen
发明人： Gordon Ma , Qiang Chen
IPC分类号： H01L21/336 , H01L29/06 , H01L29/10 , H01L29/78 , H01L29/94
CPC分类号： H01L29/7835 , H01L29/0638 , H01L29/1083 , H01L29/66659
摘要： A semiconductor device comprises an active region of a first conducting type including a transistor structure, and a ring shaped region of the first conducting type extending from a surface of the active region into the active region and substantially surrounding the transistor structure.
摘要翻译：半导体器件包括包括晶体管结构的第一导电类型的有源区和从有源区的表面延伸到有源区并且基本上围绕晶体管结构的第一导电类型的环形区。

5. 发明授权

US07221034B2 Semiconductor structure including vias 有权
标题翻译：半导体结构包括通孔
公开(公告)号：US07221034B2
公开(公告)日：2007-05-22
申请号：US10789478
申请日：2004-02-27
申请人： Gordon Ma , Carsten Ahrens
发明人： Gordon Ma , Carsten Ahrens
IPC分类号： H01L29/00
CPC分类号： H01L29/7835 , H01L21/76898 , H01L23/481 , H01L23/585 , H01L23/60 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device may comprise a semiconductor substrate having a top and a bottom surface, first and second insulating layer deposited on the top surface of the substrate, a runner arranged on top of the second insulator layer, a backside metal layer deposited on the bottom surface of the substrate, a first via structure extending from the bottom surface of the substrate to the top of the first insulating layer between the backside layer and the runner, and a second via extending from the top of the first insulating layer to the top of the second insulating layer between the first via and the runner.
摘要翻译：半导体器件可以包括具有顶表面和底表面的半导体衬底，沉积在衬底的顶表面上的第一和第二绝缘层，设置在第二绝缘体层的顶部上的流路，沉积在底表面上的背侧金属层所述第一通孔结构从所述衬底的底表面延伸到所述第一绝缘层的位于所述背面层和所述流道之间的顶部;以及第二通孔，其从所述第一绝缘层的顶部延伸到所述第一绝缘层的顶部，第一绝缘层和第二绝缘层。

6. 发明授权

US07119399B2 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US07119399B2
公开(公告)日：2006-10-10
申请号：US10788815
申请日：2004-02-27
申请人： Gordon Ma , Carsten Ahrens
发明人： Gordon Ma , Carsten Ahrens
IPC分类号： H01L31/119
CPC分类号： H01L29/41766 , H01L23/481 , H01L29/41725 , H01L29/4175 , H01L29/42372 , H01L29/456 , H01L29/66659 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device has a semiconductor substrate, an insulating layer on top of the substrate, a lateral field effect transistor with a drain region and a source region arranged in the substrate and a gate arranged above the substrate within the insulating layer, a drain runner arranged on top of the insulator layer above the drain region, a source runner arranged on top of the insulator layer above the source region, a gate runner arranged on top of the insulator layer outside an area defined by the drain runner and the source runner, a first coupling structure with a via for coupling the drain runner with the drain region, and a second coupling structure with a via for coupling the source runner with the source region.
摘要翻译：半导体器件具有半导体衬底，在衬底顶部上的绝缘层，具有漏极区域和布置在衬底中的源极区域的横向场效应晶体管和布置在绝缘层内的衬底上方的栅极，排水流道布置位于漏极区域上方的绝缘体层的顶部，源极流路，其设置在源极区域上方的绝缘体层的顶部;栅极流道，布置在由漏极流道和源极流路限定的区域之外的绝缘体层顶部; 第一耦合结构，其具有用于将漏极流道与漏极区域耦合的通路，以及具有用于将源极流体与源极区域耦合的通路的第二耦合结构。

7. 发明申请

US20050189587A1 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US20050189587A1
公开(公告)日：2005-09-01
申请号：US10788815
申请日：2004-02-27
申请人： Gordon Ma , Carsten Ahrens
发明人： Gordon Ma , Carsten Ahrens
IPC分类号： H01L21/336 , H01L23/48 , H01L23/485 , H01L29/417 , H01L29/423 , H01L29/45 , H01L29/76 , H01L29/78
CPC分类号： H01L29/41766 , H01L23/481 , H01L29/41725 , H01L29/4175 , H01L29/42372 , H01L29/456 , H01L29/66659 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device comprises a semiconductor substrate, an insulating layer on top of the substrate, a lateral field effect transistor comprising a drain region and a source region arranged in the substrate and a gate arranged above the substrate within the insulating layer, a drain runner arranged on top of the insulator layer above the drain region, a source runner arranged on top of the insulator layer above the source region, a gate runner arranged on top of the insulator layer outside an area defined by the drain runner and the source runner, a first coupling structure comprising a via for coupling the drain runner with the drain region, and a second coupling structure comprising a via for coupling the source runner with the source region.
摘要翻译：半导体器件包括半导体衬底，在衬底顶部的绝缘层，包括漏极区域和布置在衬底中的源极区域的横向场效应晶体管和布置在绝缘层内的衬底上方的栅极，排出流道布置位于漏极区域上方的绝缘体层的顶部，源极流路，其设置在源极区域上方的绝缘体层的顶部;栅极流道，布置在由漏极流道和源极流路限定的区域之外的绝缘体层顶部; 第一耦合结构包括用于将漏极流道与漏极区域耦合的通孔，以及包括用于将源极流体与源极区域耦合的通路的第二耦合结构。

8. 发明申请

US20080258215A1 LDMOS Device 有权
标题翻译： LDMOS设备
公开(公告)号：US20080258215A1
公开(公告)日：2008-10-23
申请号：US11738603
申请日：2007-04-23
申请人： Olof Tornblad , Gordon Ma
发明人： Olof Tornblad , Gordon Ma
IPC分类号： H01L29/94 , H01L29/76
CPC分类号： H01L29/0847 , H01L29/0634 , H01L29/0696 , H01L29/1083 , H01L29/4175 , H01L29/7835
摘要： An LDMOS transistor comprises source, channel and extended drain regions. The extended drain region comprises a plurality of islands that have a conductivity type that is opposite to the extended drain region. The islands have a depth less than a depth of the extended drain region.
摘要翻译： LDMOS晶体管包括源极，沟道和扩展漏极区。延伸的漏极区域包括具有与延伸的漏极区域相反的导电类型的多个岛状物。这些岛的深度小于延伸的漏极区的深度。

9. 发明授权

US07365402B2 LDMOS transistor 有权
标题翻译： LDMOS晶体管
公开(公告)号：US07365402B2
公开(公告)日：2008-04-29
申请号：US11031784
申请日：2005-01-06
申请人： Gordon Ma
发明人： Gordon Ma
IPC分类号： H01L29/94
CPC分类号： H01L29/66659 , H01L29/0634 , H01L29/0847 , H01L29/1045 , H01L29/105 , H01L29/402 , H01L29/4175 , H01L29/66537 , H01L29/7835
摘要： An LDMOS semiconductor transistor structure comprises a substrate having an epitaxial layer of a first conductivity type, a source region extending from a surface of the epitaxial layer of a second conductivity type, a lightly doped drain region within the epitaxial layer of a second conductivity type, a channel located between the drain and source regions, and a gate arranged above the channel within an insulating layer, wherein the lightly doped drain region comprises an implant region of the first conductivity type extending from the surface of the epitaxial layer into the epitaxial layer covering an end portion of the lightly doped drain region next to the gate.
摘要翻译： LDMOS半导体晶体管结构包括具有第一导电类型的外延层的衬底，从第二导电类型的外延层的表面延伸的源极区，在第二导电类型的外延层内的轻掺杂漏极区，位于漏极和源极区域之间的通道，以及在绝缘层内布置在通道上方的栅极，其中轻掺杂漏极区域包括从外延层的表面延伸到外延层覆盖物中的第一导电类型的注入区域位于栅极附近的轻掺杂漏极区的端部。

10. 发明申请

US20070007616A1 Semiconductor structure 有权
标题翻译：半导体结构
公开(公告)号：US20070007616A1
公开(公告)日：2007-01-11
申请号：US11531507
申请日：2006-09-13
申请人： Gordon Ma , Carsten Ahrens
发明人： Gordon Ma , Carsten Ahrens
IPC分类号： H01L29/00
CPC分类号： H01L29/7835 , H01L21/76898 , H01L23/481 , H01L23/585 , H01L23/60 , H01L29/402 , H01L29/4175 , H01L29/41766 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device may comprise a semiconductor substrate having a top and a bottom surface, first and second insulating layer deposited on the top surface of the substrate, a runner arranged on top of the second insulator layer, a backside metal layer deposited on the bottom surface of the substrate, a first via structure extending from the bottom surface of the substrate to the top of the first insulating layer between the backside layer and the runner, and a second via extending from the top of the first insulating layer to the top of the second insulating layer between the first via and the runner.
摘要翻译：半导体器件可以包括具有顶表面和底表面的半导体衬底，沉积在衬底的顶表面上的第一和第二绝缘层，设置在第二绝缘体层的顶部上的流路，沉积在底表面上的背侧金属层所述第一通孔结构从所述衬底的底表面延伸到所述第一绝缘层的位于所述背面层和所述流道之间的顶部;以及第二通孔，其从所述第一绝缘层的顶部延伸到所述第一绝缘层的顶部，第一绝缘层和第二绝缘层。

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