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1. 发明申请

US20060017602A1 Mobile radio receiver with hybrid gain setting and method for gain setting 审中-公开
标题翻译：具有混合增益设置的移动无线电接收机和增益设置方法
公开(公告)号：US20060017602A1
公开(公告)日：2006-01-26
申请号：US11186482
申请日：2005-07-21
申请人： Giuseppe Puma , Duyen Pham-Stabner , Dietolf Seippel
发明人： Giuseppe Puma , Duyen Pham-Stabner , Dietolf Seippel
IPC分类号： H03M1/34
CPC分类号： H03M1/187 , H03G1/0088 , H03G3/3052 , H03G2201/103 , H03G2201/202 , H03G2201/307
摘要： The mobile radio receiver comprises a variable amplifier (3), a first means (9, 10) for comparison of a signal, which is characteristic of the amplitude of a received signal, with at least one analogue comparison value (PDTHR), a second means (13, 14, 17) for comparison of a signal, which is characteristic of the amplitude of a received signal, with at least one digital comparison value (RSSITHR), and a third means (17, 11) for setting the gain, which is driven by the first means (9, 10) and by the second means (13, 14, 17).
摘要翻译：移动无线电接收机包括可变放大器（3），用于将接收信号幅度特性的信号与至少一个模拟比较值（PDTHR）进行比较的第一装置（9,10），第二装置用于将接收信号的振幅特性的信号与至少一个数字比较值（RSSITHR）和用于设置增益的第三装置（17,11）进行比较的装置（13,14,17）其由第一装置（9,10）和第二装置（13,14,17）驱动。

2. 发明申请

US20050099198A1 Arrangement and method for testing a capacitance array in an integrated circuit 有权
标题翻译：用于测试集成电路中的电容阵列的布置和方法
公开(公告)号：US20050099198A1
公开(公告)日：2005-05-12
申请号：US10941428
申请日：2004-09-15
申请人： Giuseppe Puma , Duyen Pham-Stabner , Elmar Wagner
发明人： Giuseppe Puma , Duyen Pham-Stabner , Elmar Wagner
IPC分类号： G01R27/26 , G01R31/27 , G01R31/28 , G01R31/3167 , G01R31/3187 , H03M1/10 , G01R31/02
CPC分类号： H03M1/1071 , G01R27/2605 , G01R31/27 , G01R31/2851 , G01R31/3167 , G01R31/3187
摘要： An arrangement for testing a plurality of capacitances in a capacitance array of an integrated circuit includes a power supply and a means for cyclically charging and discharging at least one of the capacitances. In this arrangement, the cycle frequency is dependent on the value of the capacitance. The cycle frequency or a quantity characteristic associated therewith is measured by a means to ascertain a value of the capacitance under test.
摘要翻译：用于测试集成电路的电容阵列中的多个电容的装置包括电源和用于循环充电和放电至少一个电容的装置。在这种布置中，周期频率取决于电容的值。通过确定被测电容值的方法来测量与其相关联的循环频率或量特性。

3. 发明申请

US20060152292A1 Voltage-controlled oscillator circuit with analogue and digital actuation 有权
标题翻译：具有模拟和数字驱动的压控振荡器电路
公开(公告)号：US20060152292A1
公开(公告)日：2006-07-13
申请号：US11298010
申请日：2005-12-09
申请人： Giuseppe Puma , Duyen Pham-Stabner , Georg Stabner
发明人： Giuseppe Puma , Duyen Pham-Stabner , Georg Stabner
IPC分类号： H03B5/12
CPC分类号： H03B5/1228 , H03B5/1212 , H03B5/1243 , H03B2200/0048 , H03B2200/005
摘要： A VCO circuit (20) has a coil (21) and, in parallel therewith, a constant capacitance (24) and adjustable capacitance elements (22, 23). A first capacitance element (22) is formed by one or more varactors whose capacitance can be adjusted by an analogue adjusting voltage (Vtune), while a second capacitance element (23) is formed by an arrangement comprising a plurality of capacitors which can be actuated by a digital bit word VCWD[N:1]. Digital calibration for the VCO (20) is performed by determining whether the present adjusting voltage is within a particular voltage range and, if this is not the case, the digital bit word being incremented or decremented by a bit value.
摘要翻译： VCO电路（20）具有线圈（21）并且与其并联，具有恒定电容（24）和可调电容元件（22,23）。第一电容元件（22）由一个或多个变容二极管形成，其中电容可以通过模拟调整电压（V调谐）来调节，而第二电容元件（23）由包括可由数字位字VCWD [N：1]驱动的多个电容器。通过确定当前的调整电压是否在特定电压范围内来执行VCO（20）的数字校准，如果不是这种情况，则数字位字被增加或减少位值。

4. 发明申请

US20070116160A1 Signal processing method, particularly in a radio-frequency receiver, and signal conditioning circuit 失效
标题翻译：信号处理方法，特别是在射频接收机和信号调理电路中
公开(公告)号：US20070116160A1
公开(公告)日：2007-05-24
申请号：US11592423
申请日：2006-11-03
申请人： Carsten Eisenhut , Jens Kissing , Giuseppe Puma , Dietolf Seippel , Nenad Stevanovic
发明人： Carsten Eisenhut , Jens Kissing , Giuseppe Puma , Dietolf Seippel , Nenad Stevanovic
IPC分类号： H04L27/08
CPC分类号： H04W52/028 , Y02D70/144
摘要： A first signal path having an amplifier and a second signal path having an amplifier with adjustable gain factor are provided. A signal applied to the first and second signal paths is amplified and demodulated on the first signal path. Concurrently, the signal is amplified on the second signal path with a gain factor, and a power of the signal amplified by the second signal path is determined and used for determining the gain factor. A signal conditioning circuit has first and second signal paths and a first and a second operating state. In the first operating state, the first signal path is arranged for amplification for a demodulation, and the second signal path is arranged for amplification for determination of a power of the signal present. In the second operating state, one of the two signal paths is inactive and the other is arranged for demodulating the signal present.
摘要翻译：提供了具有放大器和具有可调增益因子的放大器的第二信号路径的第一信号路径。施加到第一和第二信号路径的信号在第一信号路径上被放大和解调。同时，以增益因子在第二信号路径上放大信号，确定由第二信号路径放大的信号的功率，并用于确定增益因子。信号调理电路具有第一和第二信号路径以及第一和第二操作状态。在第一操作状态下，第一信号路径被布置用于解调的放大，并且第二信号路径被布置用于放大以确定存在的信号的功率。在第二操作状态下，两个信号路径中的一个是无效的，另一个被布置用于解调存在的信号。

5. 发明申请

US20060135089A1 Polar modulator and a use thereof 失效
标题翻译：极性调节剂及其用途
公开(公告)号：US20060135089A1
公开(公告)日：2006-06-22
申请号：US11284514
申请日：2005-11-22
申请人： Giuseppe Puma
发明人： Giuseppe Puma
IPC分类号： H04B1/02
CPC分类号： H04L27/361 , H03C5/00 , H03F3/24 , H03L7/06
摘要： A polar modulator has a low AM-AM and AM-PM distortion comprises a phase locked loop. The phase locked loop is designed for outputting a high-frequency signal with a frequency derived from a phase modulation signal at an actuating input of the phase locked loop. A filter device, for suppressing a DC signal component, is coupled to an output of the phase locked loop. Furthermore, provision is made of a controllable voltage source with a control input suitable for feeding in an amplitude modulation signal. A push-pull amplifier is connected by an input to the filter device. It comprises two feedback amplifier transistors connected in series, which are connected to a voltage output of the controllable voltage source for supply purposes. Control terminals of the amplifier transistors are connected to the input and, via a load, to an output of the push-pull amplifier.
摘要翻译：极性调制器具有低AM-AM和AM-PM失真包括锁相环。锁相环被设计用于在锁相环的致动输入处输出具有从相位调制信号导出的频率的高频信号。用于抑制DC信号分量的滤波器装置耦合到锁相环的输出端。此外，提供具有适于馈送幅度调制信号的控制输入的可控电压源。推挽放大器通过输入连接到滤波器装置。它包括串联连接的两个反馈放大器晶体管，它们连接到可控电压源的电压输出端用于供电目的。放大器晶体管的控制端子连接到输入端并通过负载连接到推挽放大器的输出端。

6. 发明申请

US20050046488A1 Compensating method for a pll circuit that functions according to the two-point principle, and pll circuit provided with a compensating device 有权
标题翻译：用于根据两点原理工作的pll电路的补偿方法，以及配备有补偿装置的pll电路
公开(公告)号：US20050046488A1
公开(公告)日：2005-03-03
申请号：US10490604
申请日：2002-07-24
申请人： Christian Grewing , Markus Hammes , Andre Hanke , Giuseppe Puma
发明人： Christian Grewing , Markus Hammes , Andre Hanke , Giuseppe Puma
IPC分类号： H03C3/09 , H03L7/089 , H03L7/197 , H03L7/00
CPC分类号： H03C3/0991 , H03C3/0925 , H03C3/0933 , H03C3/0941 , H03C3/095 , H03L7/0893 , H03L7/1976
摘要： A PLL circuit is tuned to a first frequency by using a first digital modulation signal and subsequently tuned to a second frequency by using a second digital modulation signal. A differential signal, that is a function of the change in voltage of a VCO control signal generated by the modulation signals, is compared with a comparison signal, that is characteristic of the analog modulation amplitude. Based on the comparison the analog modulation amplitude is changed to minimize or substantially eliminate a deviation between the signals.
摘要翻译：通过使用第一数字调制信号将PLL电路调谐到第一频率，并且随后通过使用第二数字调制信号调谐到第二频率。将由调制信号产生的VCO控制信号的电压变化的函数的差分信号与作为模拟调制幅度特性的比较信号进行比较。基于比较，改变模拟调制幅度以最小化或基本消除信号之间的偏差。

7. 发明申请

US20070018717A1 Method and device for demodulating a phase modulated signal 审中-公开
标题翻译：用于解调相位调制信号的方法和装置
公开(公告)号：US20070018717A1
公开(公告)日：2007-01-25
申请号：US10543268
申请日：2004-09-17
申请人： Martin Friedrich , Christian Grewing , Giuseppe Puma , Christoph Sandner , Andreas Wiesbauer , Kay Winterberg , Stefan Waasen
发明人： Martin Friedrich , Christian Grewing , Giuseppe Puma , Christoph Sandner , Andreas Wiesbauer , Kay Winterberg , Stefan Waasen
IPC分类号： H04L27/22
CPC分类号： H04L27/22
摘要： A phase-modulated signal (1) is divided into an in-phase component and a quadrature-phase component. The in-phase component is supplied to a first one-bit analogue/digital converter (25) and the quadrature-phase component is supplied to a second one-bit analogue/digital converter (26), output signals (8; 9) of the one-bit analogue/digital converters (26; 27) being evaluated for determining data modulated onto the phase-modulated signal (1). The one-bit analogue/digital converters may be constructed as simple comparators (26; 27).
摘要翻译：相位调制信号（1）被分成同相分量和正交分量。同相分量被提供给第一个一位模拟/数字转换器（25），正交相位分量被提供给第二个一位模数转换器（26），输出信号（8; 9）评估用于确定调制到相位调制信号（1）上的数据的一位模拟/数字转换器（26; 27）。一位模拟/数字转换器可以被构造为简单的比较器（26; 27）。

8. 发明申请

US20060226918A1 Oscillator circuit, in particular for mobile radio 有权
标题翻译：振荡电路，特别适用于移动无线电
公开(公告)号：US20060226918A1
公开(公告)日：2006-10-12
申请号：US11394013
申请日：2006-03-30
申请人： Alexander Belitzer , Stefan Herzinger , Giuseppe Puma
发明人： Alexander Belitzer , Stefan Herzinger , Giuseppe Puma
IPC分类号： H03L7/00
CPC分类号： H03L7/00 , H03B5/1212 , H03B5/1228 , H03B5/124
摘要： An oscillator is disclosed that is tunable to discrete values, and includes a tuning element which can be connected via a switching device. A rectifier circuit is connected to the output of the oscillator and forms a clock signal from the oscillator signal. The oscillator circuit contains a phase delay circuit having a switching input, a clock signal input which is coupled to the output of the rectifier circuit, and a switching output coupled to the switching device. The phase delay circuit has a comparison circuit for comparison of a phase of the clock signal that is applied to the signal input with a reference phase. This phase delay circuit is designed to emit a switching signal after application of an activation signal to the switching input and after the phase of the clock signal which is applied to the signal input matches the reference phase. In consequence, the switching process is delayed until the step-function response of the output signal of the oscillator does not cause a sudden phase change in the clock signal.
摘要翻译：公开了可调谐到离散值的振荡器，并且包括可经由开关装置连接的调谐元件。整流电路连接到振荡器的输出端并形成来自振荡器信号的时钟信号。振荡器电路包括具有开关输入的相位延迟电路，耦合到整流器电路的输出的时钟信号输入和耦合到开关器件的开关输出。相位延迟电路具有用于比较施加到具有参考相位的信号输入的时钟信号的相位的比较电路。该相位延迟电路被设计成在施加到开关输入的激活信号之后并且在施加到信号输入的时钟信号的相位与参考相位匹配之后发出切换信号。因此，切换过程被延迟，直到振荡器的输出信号的阶跃函数响应不会引起时钟信号的突然相位变化。

9. 发明申请

US20060115021A1 Compensation for the carrier frequency offset in a receiving apparatus, which is designed for a plurality of modulation types, in a mobile communications system 有权
公开(公告)号：US20060115021A1
公开(公告)日：2006-06-01
申请号：US11263423
申请日：2005-10-31
申请人： Giuseppe Puma , Markus Hammes
发明人： Giuseppe Puma , Markus Hammes
IPC分类号： H04L27/14
CPC分类号： H04L27/2332 , H04L27/0008 , H04L2027/0065 , H04L2027/0067 , H04L2027/0095
摘要： The present invention relates to a receiving apparatus for a mobile communications system which can be modulated using different modulation types at the transmitter end. According to one embodiment of the invention, in the middle of a data burst of a Bluetooth communications system, a GFSK modulation method is switched to an M-DPSK modulation method, which is used for the payload data. A frequency offset estimation unit is provided for GFSK-modulated signals in a first receiving section and estimates the frequency offset by averaging over a bit sequence of a trailer of a data burst. The frequency offset is corrected in a second receiving section, by means of a frequency correction unit which operates on the basis of the CORDIC algorithm.

10. 发明申请

US20050009487A1 Detecting usable frequency channels by exploiting complex polyphase filter operation 有权
标题翻译：通过利用复杂的多相滤波器操作来检测可用的频道
公开(公告)号：US20050009487A1
公开(公告)日：2005-01-13
申请号：US10829665
申请日：2004-04-22
申请人： Giuseppe Puma
发明人： Giuseppe Puma
IPC分类号： H04B1/30 , H04B1/16 , H04B1/26 , H04B15/00
CPC分类号： H04B1/30
摘要： A circuit arrangement for detecting a usable frequency channel includes first and second devices for performing frequency conversion. The first and second frequency conversion devices have respective local oscillator inputs to which respective local oscillator signals are applied. The local oscillator signals are at a common frequency and have a phase difference of precisely 90°. A complex polyphase filter has first and second filter inputs connected to respective outputs of the first and second frequency conversion devices. A detection arrangement is connected to outputs of the complex polyphase filter in order to detect a signal level. A further arrangement can vary the phase angle of a signal output from at least one of the frequency conversion devices.
摘要翻译：用于检测可用频道的电路装置包括用于执行频率转换的第一和第二装置。第一和第二变频装置具有各自的本地振荡器输入，各个本地振荡器信号被施加到其上。本地振荡器信号处于公共频率，并具有精确的90°的相位差。复合多相滤波器具有连接到第一和第二频率转换装置的相应输出的第一和第二滤波器输入。检测装置连接到复数多相滤波器的输出端，以检测信号电平。另外的布置可以改变从至少一个频率转换装置输出的信号的相位角。

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