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1. 发明申请

US20100151639A1 METHOD FOR MAKING A THERMALLY-STABLE SILICIDE 审中-公开
标题翻译：制备耐热硅酮的方法
公开(公告)号：US20100151639A1
公开(公告)日：2010-06-17
申请号：US12712518
申请日：2010-02-25
申请人： Shau-Lin Shue , Chen-Hua Yu , Cheng-Tung Lin , Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , CP Lo , Chih-Wei Chang
发明人： Shau-Lin Shue , Chen-Hua Yu , Cheng-Tung Lin , Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , CP Lo , Chih-Wei Chang
IPC分类号： H01L21/336 , H01L21/28
CPC分类号： H01L29/665 , H01L21/76243 , H01L29/785
摘要： Provided is a method of fabrication a semiconductor device that includes providing a semiconductor substrate, forming a gate structure over the substrate, the gate structure including a gate dielectric and a gate electrode disposed over the gate dielectric, forming source/drain regions in the semiconductor substrate at either side of the gate structure, forming a metal layer over the semiconductor substrate and the gate structure, the metal layer including a refractory metal layer or a refractory metal compound layer; forming an alloy layer over the metal layer; and performing an annealing thereby forming metal alloy silicides over the gate structure and the source/drain regions, respectively.
摘要翻译：提供一种制造半导体器件的方法，其包括提供半导体衬底，在衬底上形成栅极结构，栅极结构包括栅极电介质和设置在栅极电介质上的栅电极，在半导体衬底中形成源极/漏极区域在栅极结构的任一侧，在半导体衬底和栅极结构之上形成金属层，金属层包括难熔金属层或难熔金属化合物层; 在所述金属层上形成合金层; 并进行退火，从而分别在栅极结构和源极/漏极区域上形成金属合金硅化物。

2. 发明授权

US07446042B2 Method for silicide formation on semiconductor devices 有权
标题翻译：在半导体器件上形成硅化物的方法
公开(公告)号：US07446042B2
公开(公告)日：2008-11-04
申请号：US11343648
申请日：2006-01-30
申请人： Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
发明人： Chii-Ming Wu , Shih-Wei Chou , Gin Jei Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/44
CPC分类号： H01L21/28518
摘要： A method for forming nickel silicide includes degassing a semiconductor substrate that includes a silicon surface. After the degassing operation, the substrate is cooled prior to a metal deposition process, during a metal deposition process, or both. The cooling suppresses the temperature of the substrate to a temperature less than the temperature required for the formation of nickel silicide. Nickel diffusion is minimized during the deposition process. After deposition, an annealing process is used to urge the formation of a uniform silicide film. In various embodiments, the metal film may include a binary phase alloy containing nickel and a further element.
摘要翻译：一种形成硅化镍的方法包括对包含硅表面的半导体衬底脱气。在脱气操作之后，在金属沉积工艺，金属沉积工艺期间或两者之间冷却基板。冷却将基板的温度抑制到低于形成硅化镍所需的温度的温度。在沉积过程中镍的扩散最小化。沉积后，使用退火工艺来促使形成均匀的硅化物膜。在各种实施例中，金属膜可以包括含有镍和另一元素的二元相合金。

3. 发明申请

US20070178696A1 Method for silicide formation on semiconductor devices 有权
标题翻译：在半导体器件上形成硅化物的方法
公开(公告)号：US20070178696A1
公开(公告)日：2007-08-02
申请号：US11343648
申请日：2006-01-30
申请人： Chii-Ming Wu , Shih-Wei Chou , Gin Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
发明人： Chii-Ming Wu , Shih-Wei Chou , Gin Wang , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/44
CPC分类号： H01L21/28518
摘要： A method for forming nickel silicide includes degassing a semiconductor substrate that includes a silicon surface. After the degassing operation, the substrate is cooled prior to a metal deposition process, during a metal deposition process, or both. The cooling suppresses the temperature of the substrate to a temperature less than the temperature required for the formation of nickel silicide. Nickel diffusion is minimized during the deposition process. After deposition, an annealing process is used to urge the formation of a uniform silicide film. In various embodiments, the metal film may include a binary phase alloy containing nickel and a further element.
摘要翻译：一种形成硅化镍的方法包括对包含硅表面的半导体衬底脱气。在脱气操作之后，在金属沉积工艺，金属沉积工艺期间或两者之间冷却基板。冷却将基板的温度抑制到低于形成硅化镍所需的温度的温度。在沉积过程中镍的扩散最小化。沉积后，使用退火工艺来促使形成均匀的硅化物膜。在各种实施例中，金属膜可以包括含有镍和另一元素的二元相合金。

4. 发明申请

US20060246720A1 Method to improve thermal stability of silicides with additives 审中-公开
标题翻译：提高添加剂硅化物热稳定性的方法
公开(公告)号：US20060246720A1
公开(公告)日：2006-11-02
申请号：US11117152
申请日：2005-04-28
申请人： Chii-Ming Wu , Shih-Wei Chou , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
发明人： Chii-Ming Wu , Shih-Wei Chou , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/4763 , H01L21/44
CPC分类号： H01L21/28518
摘要： A semiconductor method of manufacture involving suicides is provided. Embodiments comprise forming a stacked arrangement of layers, the stacked arrangement of layers comprising an additive layer on a substrate, and a metal layer on the additive layer, annealing the stacked arrangement of layers to form a metal silicide layer on the substrate, wherein the metal silicide layer includes an additive from the additive layer. Alternative embodiments include etching the stacked arrangement of layers to remove an unreacted material layer. In an alternative embodiment, the stacked arrangement of layer comprises a metal layer on a substrate, an additive layer on the metal layer, and an optional oxygen barrier layer on the additive layer. An annealing process forms a metal silicide containing an additive. Metal silicides formed according to embodiments are particularly resistant to agglomeration during high temperature processing.
摘要翻译：提供涉及自杀的半导体制造方法。实施例包括形成层的堆叠布置，在衬底上包括添加层的层的堆叠排列以及添加层上的金属层，退火层的层叠布置以在衬底上形成金属硅化物层，其中金属硅化物层包括来自添加剂层的添加剂。替代实施例包括蚀刻层的堆叠布置以去除未反应的材料层。在替代实施例中，层的堆叠布置包括在基底上的金属层，金属层上的添加层和在添加剂层上的任选的氧阻隔层。退火工艺形成含有添加剂的金属硅化物。根据实施例形成的金属硅化物特别耐高温处理期间的附聚。

5. 发明授权

US07405151B2 Method for forming a semiconductor device 有权
标题翻译：半导体器件形成方法
公开(公告)号：US07405151B2
公开(公告)日：2008-07-29
申请号：US11420900
申请日：2006-05-30
申请人： Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
发明人： Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/4763
CPC分类号： H01L21/76843 , H01L21/02129 , H01L21/022 , H01L21/0228 , H01L21/28562 , H01L21/31625 , H01L23/482 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： A method for forming a semiconductor device is described. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
摘要翻译：对半导体装置的形成方法进行说明。在第一电介质层中形成开口，暴露晶体管的有源区，并且在开口中以厚度小于等于一致地形成原子层沉积（ALD）TaN势垒。在原子层沉积（ALD）TaN势垒上形成铜层以填充开口。

6. 发明申请

US20060205235A1 SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20060205235A1
公开(公告)日：2006-09-14
申请号：US11420900
申请日：2006-05-30
申请人： Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
发明人： Gin Jei Wang , Chao-Hsien Peng , Chii-Ming Wu , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/76843 , H01L21/02129 , H01L21/022 , H01L21/0228 , H01L21/28562 , H01L21/31625 , H01L23/482 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device and fabrication thereof. An opening is formed in a first dielectric layer, exposing an active region of the transistor, and an atomic layer deposited (ALD) TaN barrier is conformably formed in the opening, at a thickness less than 20 Å. A copper layer is formed over the atomic layer deposited (ALD) TaN barrier to fill the opening.
摘要翻译：半导体器件及其制造。在第一电介质层中形成开口，暴露晶体管的有源区，并且在开口中以厚度小于等于一致地形成原子层沉积（ALD）TaN势垒。在原子层沉积（ALD）TaN势垒上形成铜层以填充开口。

7. 发明申请

US20070221993A1 Method for making a thermally stable silicide 审中-公开
标题翻译：制造耐热硅化物的方法
公开(公告)号：US20070221993A1
公开(公告)日：2007-09-27
申请号：US11389309
申请日：2006-03-27
申请人： Shau-Lin Shue , Chen-Hua Yu , Cheng-Tung Lin , Chii-Ming Wu , Shih-Wei Chou , Gin Wang , Cp Lo , Chih-W Chang
发明人： Shau-Lin Shue , Chen-Hua Yu , Cheng-Tung Lin , Chii-Ming Wu , Shih-Wei Chou , Gin Wang , Cp Lo , Chih-W Chang
IPC分类号： H01L27/12 , H01L27/01 , H01L31/0392
CPC分类号： H01L29/665 , H01L21/76243 , H01L29/785
摘要： A semiconductor device and method of manufacturing are provided that include forming an alloy layer having the formula MbX over a silicon-containing substrate, where Mb is a metal and X is an alloying additive, the alloy layer being annealed to form a metal alloy silicide layer on the gate region and in active regions of the semiconductor device.
摘要翻译：提供一种半导体器件和制造方法，包括在含硅衬底上形成具有式MbX的合金层，其中Mb是金属，X是合金添加剂，合金层被退火以形成金属合金硅化物层在栅极区域和半导体器件的有源区中。

8. 发明申请

US20050239287A1 Silicide formation using a metal-organic chemical vapor deposited capping layer 审中-公开
标题翻译：使用金属有机化学气相沉积覆盖层的硅化物形成
公开(公告)号：US20050239287A1
公开(公告)日：2005-10-27
申请号：US10742202
申请日：2003-12-18
申请人： Mei-Yun Wang , Chih-Wei Chang , Cheng-Tung Lin , Chii-Ming Wu , Shau-Lin Shue
发明人： Mei-Yun Wang , Chih-Wei Chang , Cheng-Tung Lin , Chii-Ming Wu , Shau-Lin Shue
IPC分类号： H01L21/28 , H01L21/285 , H01L21/3205 , H01L21/336
CPC分类号： H01L21/28052 , H01L21/28518 , H01L29/665
摘要： A self-aligned silicide method for integrated circuit and semiconductor device fabrication wherein a metal layer is formed over one or more silicon regions of a substrate and a barrier metal layer is formed over the metal layer using a chemical vapor deposition process. The temperature at which the chemical vapor deposition process is performed causes the metal layer to react with the one or more silicon regions of the substrate to form a metal-silicide film over each of the silicon regions.
摘要翻译：一种用于集成电路和半导体器件制造的自对准硅化物方法，其中在衬底的一个或多个硅区域上形成金属层，并且使用化学气相沉积工艺在金属层上形成阻挡金属层。进行化学气相沉积工艺的温度导致金属层与衬底的一个或多个硅区域反应，以在每个硅区域上形成金属硅化物膜。

9. 发明授权

US07625801B2 Silicide formation with a pre-amorphous implant 有权
标题翻译：具有预非晶态植入物的硅化物形成
公开(公告)号：US07625801B2
公开(公告)日：2009-12-01
申请号：US11523678
申请日：2006-09-19
申请人： Chii-Ming Wu , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
发明人： Chii-Ming Wu , Cheng-Tung Lin , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/336
CPC分类号： H01L21/26506 , H01L21/2658 , H01L29/665 , H01L29/6656 , H01L29/66628 , H01L29/66636 , H01L29/7848 , H01L29/78654
摘要： A method for forming a semiconductor structure includes providing a semiconductor substrate, forming a gate stack on the semiconductor substrate, forming a silicon-containing compound stressor adjacent the gate stack, implanting non-siliciding ions into the silicon-containing compound stressor to amorphize an upper portion of the silicon-containing compound stressor, forming a metal layer on the silicon-containing compound stressor while the upper portion of the SiGe stressor is amorphous, and annealing to react the metal layer with the silicon-containing compound stressor to form a silicide region. The silicon-containing compound stressor includes SiGe or SiC.
摘要翻译：一种用于形成半导体结构的方法包括：提供半导体衬底，在半导体衬底上形成栅极叠层，在栅堆叠附近形成含硅化合物应力源，将非硅化离子注入到含硅化合物应力器中以使上层含硅化合物应激源的部分，在含硅化合物应激物上形成金属层，同时SiGe应力源的上部是无定形的，退火使金属层与含硅化合物应激反应物形成硅化物区域。含硅化合物应激源包括SiGe或SiC。

10. 发明申请

US20050272235A1 Method of forming silicided gate structure 失效
标题翻译：形成硅化栅结构的方法
公开(公告)号：US20050272235A1
公开(公告)日：2005-12-08
申请号：US10859730
申请日：2004-06-03
申请人： Chii-Ming Wu , Cheng-Tung Lin , Mei-Yun Wang , Chih-Wei Chang , Shau-Lin Shue
发明人： Chii-Ming Wu , Cheng-Tung Lin , Mei-Yun Wang , Chih-Wei Chang , Shau-Lin Shue
IPC分类号： H01L21/28 , H01L21/285 , H01L21/336 , H01L21/4763 , H01L29/49
CPC分类号： H01L21/28097 , H01L21/28518 , H01L29/4975 , H01L29/66507 , H01L29/785
摘要： A method of forming a silicided gate of a field effect transistor on a substrate having active regions is provided. The method includes the following steps: (a) forming a silicide in at least a first portion of a gate; (b) after step (a), depositing a metal over the active regions and said gate; and (c) annealing to cause the metal to react to form silicide in the active regions, wherein the thickness of said gate silicide is greater than the thickness of said silicide in said active regions.
摘要翻译：提供了在具有有源区的基板上形成场效应晶体管的硅化物栅的方法。该方法包括以下步骤：（a）在栅极的至少第一部分中形成硅化物; （b）在步骤（a）之后，在有源区域和所述栅极上沉积金属; 和（c）退火以引起金属反应以在有源区中形成硅化物，其中所述栅极硅化物的厚度大于所述有源区中所述硅化物的厚度。

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