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1. 发明授权

US06714101B2 Noise reduction filter array 有权
标题翻译：降噪滤波器阵列
公开(公告)号：US06714101B2
公开(公告)日：2004-03-30
申请号：US10054986
申请日：2002-01-25
申请人： Byung Taek Kim , Jeong Ho Yoon , Byeung Gyu Chang , Dae Hyeong Lee , Min Cheol Park , Moon Soo Park
发明人： Byung Taek Kim , Jeong Ho Yoon , Byeung Gyu Chang , Dae Hyeong Lee , Min Cheol Park , Moon Soo Park
IPC分类号： H03H701
CPC分类号： H01G4/35 , H01F17/0013 , H01F2017/0026 , H01L27/08 , H03H7/0115
摘要： Disclosed herein is an array type noise reduction filter. The array type noise reduction filter has a plurality of noise reduction filters horizontally arranged within a single chip. A plurality of noise reduction filters each have an inductance portion, a ground portion, and a capacitance portion. The inductance portion is comprised of first and second coils approximately vertically connected in the chip. The ground portion is arranged over or under the inductance portion. The capacitance portion is arranged over or under the ground portion. A second coil of any inductance portion is constructed to be wound in a direction opposite to a second coil of another adjacent inductance portion.
摘要翻译：这里公开了阵列式降噪滤波器。阵列型噪声降低滤波器具有水平布置在单个芯片内的多个降噪滤波器。多个降噪滤波器各自具有电感部分，接地部分和电容部分。电感部分由在芯片中大致垂直连接的第一和第二线圈构成。接地部分布置在电感部分的上方或下方。电容部分布置在接地部分的上方或下方。任何电感部分的第二线圈被构造成沿与另一相邻电感部分的第二线圈相反的方向缠绕。

2. 发明授权

US08351180B1 Multilayer ceramic capacitor 有权
标题翻译：多层陶瓷电容器
公开(公告)号：US08351180B1
公开(公告)日：2013-01-08
申请号：US13531237
申请日：2012-06-22
申请人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
发明人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
IPC分类号： H01G4/06
CPC分类号： H01G4/12 , H01G4/012 , H01G4/30
摘要： There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.
摘要翻译：提供了一种多层陶瓷电容器，包括：多层体，其中多个电介质层在厚度方向上堆叠; 以及形成在所述多层体内并且包括彼此相对设置的第一和第二内部电极的内部电极层; 其中MA1与CA1的比率（MA1 / CA1）在0.07和0.20之间，其中CA1表示在长度和厚度方向上取下的多层体的横截面中的多层体的面积，MA1表示第一边缘部分是沿着长度和厚度方向截取的第一边缘部分，第一边缘部分是多层体的一部分，除了第一电容形成部分之外，第一和第二内部电极在其中重叠厚度方向。

3. 发明申请

US20120327555A1 CHIP TYPE LAMINATED CAPACITOR 有权
标题翻译：芯片型层压电容器
公开(公告)号：US20120327555A1
公开(公告)日：2012-12-27
申请号：US13529766
申请日：2012-06-21
申请人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
发明人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC分类号： H01G4/12
CPC分类号： H01G4/01 , H01G4/12 , H01G4/232 , H01G4/30
摘要： There is provided a chip type laminated capacitor, including: a ceramic body including a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 □m or less; first and second outer electrodes formed on both ends of the ceramic body in a length direction; first and second band parts formed to extend inwardly of the ceramic body in the length direction on a length-width (L-W) plane from the first and second outer electrodes and having different lengths; and third and fourth band parts formed to extend inwardly of the ceramic body in the length direction on a length-thickness (L-T) plane from the first and second outer electrodes and having different lengths.
摘要翻译：提供了一种片式叠层电容器，其包括：陶瓷体，其包括厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层; 第一外电极和第二外电极，其在长度方向上形成在陶瓷体的两端; 第一和第二带部分形成为在第一和第二外部电极的长度（L-W）平面上沿长度方向在陶瓷体的内部延伸并具有不同的长度; 以及第三和第四带部分，其形成为在长度方向上在距第一和第二外部电极的长度 - 厚度（L-T）平面上延伸到陶瓷体的内侧并具有不同的长度。

4. 发明授权

US08315034B2 Multilayer chip capacitor with improved equivalent series resistance 有权
标题翻译：具有改善等效串联电阻的多层片式电容器
公开(公告)号：US08315034B2
公开(公告)日：2012-11-20
申请号：US12245856
申请日：2008-10-06
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228 , H01G4/06 , H01G4/38
CPC分类号： H01G4/30 , H01G4/012 , H01G4/232
摘要： A multilayer chip capacitor includes a capacitor body including a first capacitor part and a second capacitor part, first and second external electrodes respectively formed on first and second longer side faces of the capacitor body, and third and fourth external electrodes respectively formed on first and second shorter side faces of the capacitor body. The first capacitor part includes first and second internal electrodes of opposite polarity, and the second capacitor part includes third and fourth internal electrodes of opposite polarity. The first to fourth internal electrodes each have one lead. The first to fourth external electrodes are respectively connected to the leads of the first to fourth internal electrodes. A series resonance frequency of the first capacitor part is different from that of the second capacitor part. Equivalent series resistance (ESR1) of the first capacitor part and the equivalent series resistance (ESR2) of the second capacitor part satisfy ERS1≧20 mΩ and 0.7(ESR1)≦ESR2≦1.3(ESR1).
摘要翻译：多层片状电容器包括电容器本体，其包括第一电容器部分和第二电容器部分，分别形成在电容器主体的第一和第二长侧面上的第一和第二外部电极，以及分别形成在第一和第二电极部分上的第三和第四外部电极电容器主体的较短侧面。第一电容器部分包括具有相反极性的第一和第二内部电极，并且第二电容器部分包括具有相反极性的第三和第四内部电极。第一至第四内部电极各有一个引线。第一至第四外部电极分别连接到第一至第四内部电极的引线。第一电容器部分的串联谐振频率与第二电容器部分的串联谐振频率不同。第一电容器部分的等效串联电阻（ESR1）和第二电容器部分的等效串联电阻（ESR2）满足ERS1≥20m＆OHgr; 和0.7（ESR1）＆nlE; ESR2＆N1; 1.3（ESR1）。

5. 发明授权

US08184425B2 Multilayer capacitor 有权
标题翻译：多层电容器
公开(公告)号：US08184425B2
公开(公告)日：2012-05-22
申请号：US12238796
申请日：2008-09-26
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228 , H01G4/005 , H01G4/20
CPC分类号： H01G4/228
摘要： There is provided a multilayer capacitor including: a capacitor body where a plurality of dielectric layers are laminated, the capacitor body including first and second surfaces opposing each other in a laminated direction, wherein the first surface provides a mounting surface; a plurality of first and second inner electrodes; an inner connecting conductor; and a plurality of first and second outer electrodes formed on an outer surface of the body, wherein a corresponding one of the outer electrodes having identical polarity to the inner connecting conductor includes at least one outer terminal formed on the first surface of the body to connect to the inner connecting conductor, and at least one outer connecting conductor formed on the second surface of the body to connect a corresponding one of the inner electrodes of identical polarity to the inner connecting conductor.
摘要翻译：提供了一种层叠电容器，其包括：层叠多个电介质层的电容器体，所述电容器主体包括在层叠方向上彼此相对的第一和第二表面，其中所述第一表面提供安装表面; 多个第一和第二内部电极; 内连接导体; 以及形成在所述主体的外表面上的多个第一外部电极和第二外部电极，其中与所述内部连接导体具有相同极性的相应的外部电极包括形成在所述主体的所述第一表面上的至少一个外部端子，以连接内部连接导体和形成在主体的第二表面上的至少一个外部连接导体，以将相当极性的相应的一个内部电极与内部连接导体相连接。

6. 发明授权

US07817007B2 Laminated inductor 有权
标题翻译：层压电感
公开(公告)号：US07817007B2
公开(公告)日：2010-10-19
申请号：US12194935
申请日：2008-08-20
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hyeog Soo Shin , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hyeog Soo Shin , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01F5/00
CPC分类号： H01F17/0013 , H01F3/14 , H01F17/04
摘要： There is provided a laminated inductor including: a body where a plurality of magnetic layers are laminated; a coil part formed on the magnetic layers, the coil part including a plurality of conductor patterns and a plurality of conductive vias; first and second external electrodes formed on an outer surface of the body to connect to both ends of the coil part, respectively; and a non-magnetic conductor formed on at least one of the magnetic layers so as to relax magnetic saturation caused by direct current flowing through the coil part. The laminated inductor employs the non-magnetic conductor as a non-magnetic gap to be simplified in a manufacturing process and effectively improved in DC superposition characteristics.
摘要翻译：提供一种层叠电感器，包括：层叠有多个磁性层的主体; 形成在所述磁性层上的线圈部分，所述线圈部分包括多个导体图案和多个导电通孔; 第一外部电极和第二外部电极分别形成在主体的外表面上以连接到线圈部分的两端; 以及形成在至少一个磁性层上的非磁性导体，以便缓和由直流电流流过线圈部分的磁饱和。层叠电感器在制造工艺中使用非磁性导体作为非磁性间隙进行简化，并有效地改善了DC叠加特性。

7. 发明申请

US20100254070A1 MULTILAYER CHIP CAPACITOR 有权
标题翻译：多层芯片电容器
公开(公告)号：US20100254070A1
公开(公告)日：2010-10-07
申请号：US12817046
申请日：2010-06-16
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228
CPC分类号： H01G4/30 , H01G4/012 , H01G4/232
摘要： A multilayer chip capacitor includes: a capacitor body having first and second side surfaces and a bottom surface; a plurality of first and second internal electrodes in the capacitor body; first and second external electrodes having a first polarity and formed on the first and second side surfaces, respectively, to cover a respective lower edge of the side surfaces and to partially extend to the bottom surface; and a third external electrode having a second polarity and formed on the bottom surface. The internal electrodes are disposed in perpendicular to the bottom surface. Each of the first internal electrodes has a first lead drawn to the first side and bottom surfaces and a second lead drawn to the second side and bottom surfaces. Each of the second internal electrodes has a third lead drawn to the bottom surface.
摘要翻译：一种多层片状电容器包括：具有第一和第二侧表面和底表面的电容器本体; 电容器主体中的多个第一和第二内部电极; 第一和第二外部电极分别具有第一极性并形成在第一和第二侧表面上，以覆盖侧表面的相应下边缘并部分地延伸到底面; 和具有第二极性并形成在底面上的第三外部电极。内部电极垂直于底面设置。每个第一内部电极具有被引导到第一侧面和底部表面的第一引线和被引导到第二侧面和底部表面的第二引线。每个第二内部电极具有被引导到底面的第三引线。

8. 发明授权

US07630208B2 Multilayer chip capacitor, circuit board apparatus having the capacitor, and circuit board 有权
标题翻译：多层片式电容器，具有电容器的电路板装置和电路板
公开(公告)号：US07630208B2
公开(公告)日：2009-12-08
申请号：US12198342
申请日：2008-08-26
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H05K1/16
CPC分类号： H01G4/232 , H01G4/012 , H01G4/30 , H01G4/385 , H05K1/0231 , H05K1/113 , H05K2201/09309 , H05K2201/09772 , H05K2201/0979 , H05K2201/10015 , H05K2201/10636 , Y02P70/611
摘要： Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit.
摘要翻译：本发明提供一种多层片状电容器，其包括具有层叠方向配置的第一和第二电容器单元的电容器体; 以及形成在电容器主体外部的多个外部电极。第一电容器单元包括交替设置在电容器主体的内部的至少一对第一和第二内部电极，第二电容器单元包括交替设置在电容器主体内部的多个第三和第四内部电极，并且第一至第四内部电极耦合到第一至第四外部电极。第一电容器单元具有比第二电容器单元更低的等效串联电感（ESL），并且第一电容器单元具有比第二电容器单元更高的等效串联电阻（ESR）。

9. 发明申请

US20080158773A1 Multilayer capacitor array 有权
标题翻译：多层电容阵列
公开(公告)号：US20080158773A1
公开(公告)日：2008-07-03
申请号：US11979875
申请日：2007-11-09
申请人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Sung Kwon Wi , Hae Suk Chung , Dong Seok Park , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/228 , H01G4/005
CPC分类号： H01G4/232 , H01G4/005 , H01G4/30 , H03H2001/0014
摘要： A multilayer capacitor array having a plurality of multilayer capacitor devices formed in a single multilayer structure, the multilayer capacitor array including: a capacitor body formed by depositing a plurality of dielectric layers and having first and second side surfaces opposite to each other; a plurality of first polarity internal electrodes and second polarity internal electrodes, disposed oppositely to each other in the capacitor body, interposing the dielectric layer there between, and formed of a single electrode plate comprising a single lead, respectively; and a plurality of first polarity external electrodes and second polarity external electrodes, formed on the first side surface and second side surface, respectively, and connected to a correspondent polarity internal electrode via the lead, the first polarity external electrode formed on the first side surface and the second polarity external electrode formed on the second side surface, wherein the numbers of the first polarity external electrodes and the second polarity external electrodes are two or more, respectively, and are identical to each other, and a total number of the multilayer capacitor devices in the multilayer capacitor array is identical to the number of the first polarity external electrodes.
摘要翻译： 1.一种多层电容器阵列，具有形成为单层多层结构的多层多层电容器件，所述层叠电容器阵列包括：通过沉积多个电介质层而形成的电容器体，并且具有彼此相对的第一和第二侧面; 多个第一极性内部电极和第二极性内部电极，其彼此相对设置在电容器主体中，分别在其间插入电介质层，并由单个引线构成的单个电极板形成; 以及多个第一极性外部电极和第二极性外部电极，分别形成在所述第一侧面和所述第二侧面上，并且经由所述引线与相应的极性内部电极连接，所述第一极性外部电极形成在所述第一侧面和形成在第二侧面上的第二极性外部电极，其中第一极性外部电极和第二极性外部电极的数量分别为两个或更多个，并且彼此相同，并且层叠电容器的总数多层电容器阵列中的器件与第一极性外部电极的数量相同。

10. 发明授权

US07183872B2 Laminated balun transformer 有权
标题翻译：叠层平衡不平衡变压器
公开(公告)号：US07183872B2
公开(公告)日：2007-02-27
申请号：US11065232
申请日：2005-02-24
申请人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park
发明人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park
IPC分类号： H03H7/42 , H01F5/00
CPC分类号： H01P5/10
摘要： A laminated balun transformer subminiaturized with a transmission line length reduced below λ/4 without any variation of characteristics. The laminated balun transformer includes a first strip line having one end inputted to a unbalanced signal; a second strip line having connected to the first strip line; a third strip line formed in parallel with the first strip line and connected to a ground and connected to the external electrode for a first balanced signal; a fourth strip line formed in parallel with the second strip line and connected to the external electrode for a ground and the external electrode for a second balanced signal; and a capacitance forming electrode formed in parallel with a portion of the opened end of the second strip line and connected to the external electrode for the unbalanced signal.
摘要翻译：传输线长度小于λ/ 4的小型化的不平衡 - 不平衡转换变压器，没有任何特性变化。叠层平衡不平衡变压器包括：一端输入不平衡信号的第一带状线; 连接到第一带状线的第二带状线; 第三带状线，与第一带状线平行地形成并连接到接地并连接到外部电极用于第一平衡信号; 第四带状线，与第二条带线平行地形成并连接到用于接地的外部电极和用于第二平衡信号的外部电极; 以及电容形成电极，其与所述第二带状线的开放端部的一部分平行地形成，并且与所述不平衡信号的外部电极连接。

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