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    • 10. 发明授权
    • Oscillator circuit, a semiconductor device and an apparatus
    • 振荡器电路,半导体器件和装置
    • US09300302B2
    • 2016-03-29
    • US14395522
    • 2012-04-20
    • Hubert BodeMathieu Lesbats
    • Hubert BodeMathieu Lesbats
    • H03K3/0231H03K4/50H03L7/06
    • H03L7/06H03K3/0231H03K4/50
    • An oscillator circuit for providing an output clock signal is described. The oscillator circuit comprising a voltage reference, a first current source, first capacitor, first capacitor switch, second current source, second capacitor, second capacitor switch, first comparator, second comparator and flip-flop. The first comparator comprises a first chopper-stabilized comparator switchable between a compare phase and a zeroing phase in dependence on the output clock signal and arranged to operate in the compare phase in a first half-phase of the output clock signal to provide a first comparator output from comparing the first capacitor voltage to the reference voltage and in the zeroing phase in the second half-phase. The second comparator comprises a second chopper-stabilized comparator switchable between a respective compare phase and a respective zeroing phase in dependence on the output clock signal and arranged to operate in its compare phase in the second half-phase to obtain a second comparator output from comparing the second capacitor voltage to the reference voltage and in its zeroing phase in the first half-phase.
    • 描述用于提供输出时钟信号的振荡器电路。 所述振荡器电路包括电压基准,第一电流源,第一电容器,第一电容器开关,第二电流源,第二电容器,第二电容器开关,第一比较器,第二比较器和触发器。 第一比较器包括第一斩波稳定比较器,其可以根据输出时钟信号在比较相位和归零相位之间切换,并且被布置为在输出时钟信号的第一半相位中的比较相位中工作,以提供第一比较器 将第一电容器电压与参考电压进行比较,并在第二半相的归零阶段输出。 第二比较器包括第二斩波稳定比较器,其可以根据输出时钟信号在相应的比较相位和相应的归零相位之间切换,并被布置成在第二半相的其比较相位中工作以从比较获得第二比较器输出 第二电容器电压为参考电压,并且在第一半相中处于其归零阶段。