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1. 发明申请

US20100140615A1 ACTIVE DEVICE ARRAY SUBSTRATE 有权
标题翻译：主动设备阵列基板
公开(公告)号：US20100140615A1
公开(公告)日：2010-06-10
申请号：US12343510
申请日：2008-12-24
申请人： Jen-Chieh Li , Shun-Fa Feng
发明人： Jen-Chieh Li , Shun-Fa Feng
IPC分类号： H01L23/58
CPC分类号： G09G3/006 , G09G3/3648 , G09G2300/0426
摘要： An active device array substrate including a substrate, a pixel array, and peripheral circuit is provided. The substrate has a display region and a peripheral region. The pixel array is disposed on the display region of the substrate, wherein the pixel array includes signal lines and pixels, each of the pixels is electrically connected to the signal lines respectively and extends from the display region to the peripheral region. The peripheral circuit is disposed on the peripheral region and includes a testing circuit electrically connected to the signal lines. Additionally, the testing circuit includes shorting bars and connecting conductors, wherein each of the signal lines is electrically connected to one of the shorting bars through one of the connecting connectors respectively, and at least two of the signal lines connected to the same shorting bar are electrically connected to each other through one of the connecting conductors.
摘要翻译：提供了包括基板，像素阵列和外围电路的有源器件阵列基板。基板具有显示区域和外围区域。像素阵列设置在基板的显示区域上，其中像素阵列包括信号线和像素，每个像素分别电连接到信号线，并从显示区域延伸到周边区域。外围电路设置在外围区域上，并且包括电连接到信号线的测试电路。此外，测试电路包括短路棒和连接导体，其中每个信号线分别通过一个连接连接器电连接到一个短路棒，并且连接到同一短路棒的至少两根信号线是通过一个连接导体彼此电连接。

2. 发明授权

US08022402B2 Active device array substrate 有权
标题翻译：有源器件阵列衬底
公开(公告)号：US08022402B2
公开(公告)日：2011-09-20
申请号：US12343510
申请日：2008-12-24
申请人： Jen-Chieh Li , Shun-Fa Feng
发明人： Jen-Chieh Li , Shun-Fa Feng
IPC分类号： H01L23/58
CPC分类号： G09G3/006 , G09G3/3648 , G09G2300/0426
摘要： An active device array substrate including a substrate, a pixel array, and peripheral circuit is provided. The substrate has a display region and a peripheral region. The pixel array is disposed on the display region of the substrate, wherein the pixel array includes signal lines and pixels, each of the pixels is electrically connected to the signal lines respectively and extends from the display region to the peripheral region. The peripheral circuit is disposed on the peripheral region and includes a testing circuit electrically connected to the signal lines. Additionally, the testing circuit includes shorting bars and connecting conductors, wherein each of the signal lines is electrically connected to one of the shorting bars through one of the connecting connectors respectively, and at least two of the signal lines connected to the same shorting bar are electrically connected to each other through one of the connecting conductors.
摘要翻译：提供了包括基板，像素阵列和外围电路的有源器件阵列基板。基板具有显示区域和外围区域。像素阵列设置在基板的显示区域上，其中像素阵列包括信号线和像素，每个像素分别电连接到信号线，并从显示区域延伸到周边区域。外围电路设置在外围区域上，并且包括电连接到信号线的测试电路。此外，测试电路包括短路棒和连接导体，其中每个信号线分别通过一个连接连接器电连接到一个短路棒，并且连接到同一短路棒的至少两根信号线是通过一个连接导体彼此电连接。

3. 发明申请

US20100051335A1 Conducting Layer Jump Connection Structure 审中-公开
标题翻译：传导层跳转连接结构
公开(公告)号：US20100051335A1
公开(公告)日：2010-03-04
申请号：US12550758
申请日：2009-08-31
申请人： Chien-Li Chen , Shun-Fa Feng , Yan-Lin Yeh
发明人： Chien-Li Chen , Shun-Fa Feng , Yan-Lin Yeh
IPC分类号： H05K1/11 , H05K1/09
CPC分类号： G02F1/1345
摘要： A conducting layer jump connection structure used in a circuit device includes a substrate, a first conducting layer, a first insulating layer, a second conducting layer, a second insulating layer, a jump connection layer, a first via, and plural second vias. The first conducting layer covers the substrate. The first insulating layer covers the first conducting layer. The second conducting layer partially covers the first insulating layer. The second insulating layer covers the second conducting layer and the first insulating layer exposed by the second conducting layer. The jump connection layer covers the second insulating layer. The first via is formed on the first conducting layer and between two opposite second conducting portions of the second conducting layer. The first via penetrates through both the second insulating layer and the first insulating layer. The second vias are formed on the second conducting layer and penetrate through the second insulating layer. The first conducting layer and the second conducting layer are connected to the jump connection layer through the first via and the second vias, respectively.
摘要翻译：在电路器件中使用的导电层跳变连接结构包括：衬底，第一导电层，第一绝缘层，第二导电层，第二绝缘层，跳跃连接层，第一通孔和多个第二通孔。第一导电层覆盖基板。第一绝缘层覆盖第一导电层。第二导电层部分地覆盖第一绝缘层。第二绝缘层覆盖由第二导电层露出的第二导电层和第一绝缘层。跳跃连接层覆盖第二绝缘层。第一通孔形成在第一导电层上，并形成在第二导电层的两个相对的第二导电部分之间。第一通孔穿过第二绝缘层和第一绝缘层。第二通孔形成在第二导电层上并穿透第二绝缘层。第一导电层和第二导电层分别通过第一通孔和第二通孔连接到跳变连接层。

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