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1. 发明授权

US09557734B2 Control network system, master apparatus, control data processing method, and control data processing program 有权
标题翻译：控制网络系统，主设备，控制数据处理方法和控制数据处理程序
公开(公告)号：US09557734B2
公开(公告)日：2017-01-31
申请号：US13014851
申请日：2011-01-27
申请人： Tatsuya Maruyama , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto , Ichiro Takahashi
发明人： Tatsuya Maruyama , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto , Ichiro Takahashi
IPC分类号： G06F15/167 , G05B19/418 , H04L12/40 , H04L12/403 , G06F15/16
CPC分类号： G05B19/4185 , H04L12/40006 , H04L12/40032 , H04L12/403 , H04L2012/4026 , Y02P90/18
摘要： A control computer as a master apparatus in a control network system includes a packet generation unit. The packet generation unit: selects a control command for writing a data from among packet generation information; references the packet generation information for each of the selected control command; and includes a data for write which is read from an address in a storage section corresponding to the each control command, in a control packet to generate the control packet. A communication unit transmits the generated control packet to a controlled object as a slave device.
摘要翻译：作为控制网络系统中的主设备的控制计算机包括分组生成单元。分组生成单元：从分组生成信息中选择写入数据的控制命令; 引用所选择的控制命令中的每一个的分组生成信息; 并且在控制分组中包括从与每个控制命令对应的存储部分中的地址读取的用于写入的数据，以生成控制分组。通信单元将生成的控制分组发送到作为从设备的受控对象。

2. 发明申请

US20110205886A1 INFORMATION PROCESSOR AND CONTROL NETWORK SYSTEM 有权
标题翻译：信息处理器和控制网络系统
公开(公告)号：US20110205886A1
公开(公告)日：2011-08-25
申请号：US13030272
申请日：2011-02-18
申请人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
发明人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
IPC分类号： H04L1/00
CPC分类号： H04L12/40176 , H04L12/413 , H04L12/437
摘要： An information processor capable of ensuring time synchronization accuracy, ensuring EtherCAT command consistency, and easily developing the software based on a 2-port configuration even when a communication path error occurs includes: an arithmetic section; at least two communication sections each including a transmission section and a reception section; and a redundant communication control section that controls a communication path between the arithmetic section and the communication section. The redundant communication control section includes: a communication path state determination section that determines a network path state; and a redundant path switching section that switches connection between the arithmetic section and at least two communication sections. The network provides a logical ring topology for a packet communication path. The redundant path switching section functions based on the communication path state determined by the communication path state determination section and changes a connection path between the communication sections and a communication path between the communication section and the arithmetic section.
摘要翻译：一种信息处理器，能够确保时间同步精度，确保EtherCAT命令一致性，并且即使发生通信路径错误，也可以容易地开发基于2端口配置的软件，包括：运算部分; 至少两个通信部分，每个通信部分包括传输部分和接收部分; 以及控制运算部和通信部之间的通信路径的冗余通信控制部。冗余通信控制部分包括：通信路径状态确定部分，其确定网络路径状态; 以及冗余路径切换部，切换运算部与至少两个通信部之间的连接。网络为分组通信路径提供逻辑环形拓扑。冗余路径切换部基于由通信路径状态判定部确定的通信路径状态起作用，并且改变通信部之间的连接路径与通信部与运算部之间的通信路径。

3. 发明授权

US07151352B2 Motor controller 有权
公开(公告)号：US07151352B2
公开(公告)日：2006-12-19
申请号：US11356107
申请日：2006-02-17
申请人： Hironori Ohashi , Shinji Yonemoto , Yuri Takano , Yutaka Matsumoto , Hideto Takada
发明人： Hironori Ohashi , Shinji Yonemoto , Yuri Takano , Yutaka Matsumoto , Hideto Takada
IPC分类号： G05B11/01
CPC分类号： G05B19/19 , G05B2219/34343
摘要： A motor controller having the electronic cam function that makes it smooth operation even if the number of operation patterns is lessened is provided. The electronic gear function included in a servo-amplifier and a divider are used to vary the gear ratio of an electronic gear in a previously provided ratio in accordance with an external rotation position so that the electronic cam function is realized. The motor controller further includes a program execution unit so that the electronic gear is operated in accordance with programs. Since the electronic gear function and the divider is included in an inexpensive servo-amplifier and is used to realize the electronic cam function, the inexpensive and intelligent system can be realized. Since the divider is provided in the system, the number of data and the reading frequency of the cam pattern can be decreased and accordingly the inexpensive system is realized.

4. 发明申请

US20110184533A1 CONTROL NETWORK SYSTEM, MASTER APPARATUS, CONTROL DATA PROCESSING METHOD, AND CONTROL DATA PROCESSING PROGRAM 有权
标题翻译：控制网络系统，主设备，控制数据处理方法和控制数据处理程序
公开(公告)号：US20110184533A1
公开(公告)日：2011-07-28
申请号：US13014851
申请日：2011-01-27
申请人： Tatsuya Maruyama , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto , Ichiro Takahashi
发明人： Tatsuya Maruyama , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto , Ichiro Takahashi
IPC分类号： G05B11/01
CPC分类号： G05B19/4185 , H04L12/40006 , H04L12/40032 , H04L12/403 , H04L2012/4026 , Y02P90/18
摘要： A control computer as a master apparatus in a control network system includes a packet generation unit. The packet generation unit: selects a control command for writing a data from among packet generation information; references the packet generation information for each of the selected control command; and includes a data for write which is read from an address in a storage section corresponding to the each control command, in a control packet to generate the control packet. A communication unit transmits the generated control packet to a controlled object as a slave device.
摘要翻译：作为控制网络系统中的主设备的控制计算机包括分组生成单元。分组生成单元：从分组生成信息中选择写入数据的控制命令; 引用所选择的控制命令中的每一个的分组生成信息; 并且在控制分组中包括从与每个控制命令对应的存储部分中的地址读取的用于写入的数据，以生成控制分组。通信单元将生成的控制分组发送到作为从设备的受控对象。

5. 发明申请

US20060197484A1 Motor controller 有权
标题翻译：电机控制器
公开(公告)号：US20060197484A1
公开(公告)日：2006-09-07
申请号：US11356107
申请日：2006-02-17
申请人： Hironori Ohashi , Shinji Yonemoto , Yuri Takano , Yutaka Matsumoto , Hideto Takada
发明人： Hironori Ohashi , Shinji Yonemoto , Yuri Takano , Yutaka Matsumoto , Hideto Takada
IPC分类号： G05B19/10
CPC分类号： G05B19/19 , G05B2219/34343
摘要： A motor controller having the electronic cam function that makes it smooth operation even if the number of operation patterns is lessened is provided. The electronic gear function included in a servo-amplifier and a divider are used to vary the gear ratio of an electronic gear in a previously provided ratio in accordance with an external rotation position so that the electronic cam function is realized. The motor controller further includes a program execution unit so that the electronic gear is operated in accordance with programs. Since the electronic gear function and the divider is included in an inexpensive servo-amplifier and is used to realize the electronic cam function, the inexpensive and intelligent system can be realized. Since the divider is provided in the system, the number of data and the reading frequency of the cam pattern can be decreased and accordingly the inexpensive system is realized.
摘要翻译：提供具有电子凸轮功能的电动机控制器，即使减少操作模式的数量，也能够使其平稳运行。包括在伺服放大器和分配器中的电子齿轮功能用于根据外部旋转位置以预先设定的比例改变电子齿轮的齿轮比，从而实现电子凸轮功能。马达控制器还包括程序执行单元，使得电子齿轮根据程序操作。由于电子齿轮功能和分频器包含在便宜的伺服放大器中，并且用于实现电子凸轮功能，因此可以实现廉价和智能的系统。由于在系统中设置了分频器，所以可以减少凸轮图案的数据数量和读取频率，从而实现廉价的系统。

6. 发明授权

US09148297B2 Information processor and control network system 有权
标题翻译：信息处理器和控制网络系统
公开(公告)号：US09148297B2
公开(公告)日：2015-09-29
申请号：US13030272
申请日：2011-02-18
申请人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
发明人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
IPC分类号： G01R31/08 , H04L12/40 , H04L12/413 , H04L12/437
CPC分类号： H04L12/40176 , H04L12/413 , H04L12/437
摘要： An information processor capable of ensuring time synchronization accuracy, ensuring EtherCAT command consistency, and easily developing the software based on a 2-port configuration even when a communication path error occurs includes: an arithmetic section; at least two communication sections each including a transmission section and a reception section; and a redundant communication control section that controls a communication path between the arithmetic section and the communication section. The redundant communication control section includes: a communication path state determination section that determines a network path state; and a redundant path switching section that switches connection between the arithmetic section and at least two communication sections.
摘要翻译：一种信息处理器，能够确保时间同步精度，确保EtherCAT命令一致性，并且即使发生通信路径错误，也可以容易地开发基于2端口配置的软件，包括：运算部分; 至少两个通信部分，每个通信部分包括传输部分和接收部分; 以及控制运算部和通信部之间的通信路径的冗余通信控制部。冗余通信控制部分包括：通信路径状态确定部分，其确定网络路径状态; 以及冗余路径切换部，切换运算部与至少两个通信部之间的连接。

7. 发明授权

US08913514B2 Communication control unit and communication control system 有权
标题翻译：通讯控制单元及通讯控制系统
公开(公告)号：US08913514B2
公开(公告)日：2014-12-16
申请号：US13213545
申请日：2011-08-19
申请人： Tatsuya Maruyama , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
发明人： Tatsuya Maruyama , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
IPC分类号： H04J1/16 , H04J3/14 , H04L12/26 , H04L12/28 , G05B19/418 , H04L12/413 , H04J3/06 , G06F1/12
CPC分类号： H04L12/413 , G05B19/4185 , H04J3/0667 , Y02P90/18
摘要： A communication control unit and a communication control system are provided in which control devices can synchronously operate. In a communication control system in which a communication control unit and multiple control devices having an actuator to operate a control target are connected via a network, the communication control unit provides a control command to the control devices, synchronizes times of the communication control unit and the control devices, obtains communication delays relative to the control devices, collects control start times of the control devices, obtains a time by subtracting the control start time from a predetermined time as a start time of the control device, calculates a time obtained by subtracting the communication delay from the start time for each control device, and transmits the control command to the control devices before the earliest time of the calculated times.
摘要翻译：提供通信控制单元和通信控制系统，其中控制装置可以同步操作。在其中通信控制单元和具有用于操作控制目标的致动器的多个控制装置经由网络连接的通信控制系统中，通信控制单元向控制设备提供控制命令，同步通信控制单元的时间和控制装置获得相对于控制装置的通信延迟，收集控制装置的控制开始时间，通过从预定时间减去控制开始时间获取时间作为控制装置的开始时间，计算通过减去从每个控制装置的开始时间起的通信延迟，并且在所计算的时间的最早时间之前将控制命令发送到控制装置。

8. 发明授权

US08788735B2 Interrupt control apparatus, interrupt control system, interrupt control method, and interrupt control program 有权
标题翻译：中断控制装置，中断控制系统，中断控制方式和中断控制程序
公开(公告)号：US08788735B2
公开(公告)日：2014-07-22
申请号：US12544347
申请日：2009-08-20
申请人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hiroshi Fujii
发明人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hiroshi Fujii
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F9/4812
摘要： An interrupt control unit provides controls on an interrupt from an accelerator to a CPU based on a packet transmitted to or received from a controlled object. The interrupt control unit includes: a storage part for storing therein an interrupt control timing table in which a condition of switching a mode of the interrupt control is described; and an interrupt control mode switching part for switching the mode of the interrupt control to the CPU between a permission mode and a mask mode, based on the interrupt control timing table in the storage part.
摘要翻译：中断控制单元基于发送到受控对象或从控制对象接收到的分组来提供对从加速器到CPU的中断的控制。中断控制单元包括：存储部分，用于在其中存储中断控制定时表，其中描述了切换中断控制的模式的条件; 以及中断控制模式切换部分，用于根据存储部分中的中断控制定时表将中断控制模式切换到许可模式和掩模模式之间的CPU。

9. 发明申请

US20120057479A1 COMMUNICATION CONTROL UNIT AND COMMUNICATION CONTROL SYSTEM 有权
标题翻译：通信控制单元和通信控制系统
公开(公告)号：US20120057479A1
公开(公告)日：2012-03-08
申请号：US13213545
申请日：2011-08-19
申请人： Tatsuya MARUYAMA , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
发明人： Tatsuya MARUYAMA , Tsutomu Yamada , Shinji Yonemoto , Takashi Iwaki , Hironori Ohashi , Yutaka Matsumoto
IPC分类号： H04W24/00
CPC分类号： H04L12/413 , G05B19/4185 , H04J3/0667 , Y02P90/18
摘要： A communication control unit and a communication control system are provided in which control devices can synchronously operate. In a communication control system in which a communication control unit and multiple control devices having an actuator to operate a control target are connected via a network, the communication control unit provides a control command to the control devices, synchronizes times of the communication control unit and the control devices, obtains communication delays relative to the control devices, collects control start times of the control devices, obtains a time by subtracting the control start time from a predetermined time as a start time of the control device, calculates a time obtained by subtracting the communication delay from the start time for each control device, and transmits the control command to the control devices before the earliest time of the calculated times.
摘要翻译：提供通信控制单元和通信控制系统，其中控制装置可以同步操作。在其中通信控制单元和具有用于操作控制目标的致动器的多个控制装置经由网络连接的通信控制系统中，通信控制单元向控制设备提供控制命令，同步通信控制单元的时间和控制装置获得相对于控制装置的通信延迟，收集控制装置的控制开始时间，通过从预定时间减去控制开始时间获取时间作为控制装置的开始时间，计算通过减去从每个控制装置的开始时间起的通信延迟，并且在所计算的时间的最早时间之前将控制命令发送到控制装置。

10. 发明申请

US20100070668A1 INTERRUPT CONTROL APPARATUS, INTERRUPT CONTROL SYSTEM, INTERRUPT CONTROL METHOD, AND INTERRUPT CONTROL PROGRAM 有权
标题翻译：中断控制装置，中断控制系统，中断控制方法和中断控制程序
公开(公告)号：US20100070668A1
公开(公告)日：2010-03-18
申请号：US12544347
申请日：2009-08-20
申请人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hiroshi Fujii
发明人： Tatsuya Maruyama , Tsutomu Yamada , Norihisa Yanagihara , Shinji Yonemoto , Takashi Iwaki , Hiroshi Fujii
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F9/4812
摘要： An interrupt control unit provides controls on an interrupt from an accelerator to a CPU based on a packet transmitted to or received from a controlled object. The interrupt control unit includes: a storage part for storing therein an interrupt control timing table in which a condition of switching a mode of the interrupt control is described; and an interrupt control mode switching part for switching the mode of the interrupt control to the CPU between a permission mode and a mask mode, based on the interrupt control timing table in the storage part.
摘要翻译：中断控制单元基于发送到受控对象或从控制对象接收到的分组来提供对从加速器到CPU的中断的控制。中断控制单元包括：存储部分，用于在其中存储中断控制定时表，其中描述了切换中断控制的模式的条件; 以及中断控制模式切换部分，用于根据存储部分中的中断控制定时表将中断控制模式切换到许可模式和掩模模式之间的CPU。

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