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1. 发明申请

US20060036413A1 System of finite state machines 有权
标题翻译：有限状态机系统
公开(公告)号：US20060036413A1
公开(公告)日：2006-02-16
申请号：US10523485
申请日：2003-08-05
申请人： John Campbell , Gardiner Stiles
发明人： John Campbell , Gardiner Stiles
IPC分类号： G06F17/10
CPC分类号： G06F9/3871 , G06F9/38 , G06F9/3869
摘要： A system of finite state machines built with asynchronous or synchronous logic for controlling the flow of data through computational logic circuits programmed to accomplish a task specified by a user, having one finite state machine associated with each computational logic circuit, having each finite state machine accept data from either one or more predecessor finite state machines or from one or more sources outside the system and furnish data to one or more successor finite state machines or a recipient outside the system, excluding from consideration in determining a clock period for the system logic paths performing the task specified by the user, and providing a means for ensuring that each finite state machine allows sufficient time to elapse for the computational logic circuit associated with that finite state to perform its task.
摘要翻译：一种用异步或同步逻辑构建的有限状态机系统，用于通过被编程为完成用户指定的任务的计算逻辑电路来控制数据流，该计算逻辑电路具有与每个计算逻辑电路相关联的一个有限状态机，每个有限状态机接受来自一个或多个前身的有限状态机的数据或来自系统外部的一个或多个源的数据，并将数据提供给一个或多个后继有限状态机或系统外部的接收器，不包括在确定系统逻辑路径的时钟周期时的考虑执行由用户指定的任务，并提供一种确保每个有限状态机允许足够的时间经过与该有限状态相关联的计算逻辑电路来执行其任务的手段。

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