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    • 3. 发明公开
    • 반도체 소자
    • 半导体器件
    • KR1020080089071A
    • 2008-10-06
    • KR1020070032056
    • 2007-03-31
    • 에스케이하이닉스 주식회사
    • 윤대건송택상
    • G11C7/06G11C7/08G11C5/14
    • H03F3/45179G11C7/06H03F1/08
    • A semiconductor device is provided to output a stable amplification signal by preventing changes in the time required for changing an output amplification signal in correspondence to the variation of an input signal. An amplification unit(302) amplifies an input signal. A compensation unit(304) is connected to an output stage of the amplification unit and eliminates loading capacitance variation of the output stage according to the variation of a power supply voltage. The compensation unit comprises a capacitance providing part(3042) and a variable resistor part(3044). The capacitance providing part has positive capacitance variation characteristics with respect to the variation of the power supply voltage. The variable resistor part controls a current provided to the capacitance providing part according to the variation of the power supply voltage.
    • 提供一种半导体器件,用于通过根据输入信号的变化来防止改变输出放大信号所需的时间的变化来输出稳定的放大信号。 放大单元(302)放大输入信号。 补偿单元(304)连接到放大单元的输出级,并根据电源电压的变化消除输出级的负载电容变化。 补偿单元包括电容提供部分(3042)和可变电阻器部分(3044)。 电容提供部件相对于电源电压的变化具有正电容变化特性。 可变电阻器部分根据电源电压的变化来控制提供给电容提供部分的电流。
    • 4. 发明公开
    • 트랜스임피던스 증폭기들에서 정확한 제한을 위한 방법들및 장치
    • 用于偏转放大器精密限制的方法和装置
    • KR1020080003831A
    • 2008-01-08
    • KR1020077024573
    • 2006-02-28
    • 엔엑스피 유에스에이, 인코포레이티드
    • 미쥬스코빅데얀
    • H03F3/08
    • H03F3/345H03F1/08H03F3/08
    • A transimpedance amplifier (100) is provided including an input, an amplifier and a non-linear limiting circuit. The input is configured to provide an input current (Iin) which includes a logic high range between a minimum input current and a maximum input current for logic high. The input current also includes a range of knee values. The amplifier is configured to generate an output voltage having a range between a first voltage and a second voltage. The non-linear limiting circuit includes a first current source, a first diode connected transistor, a second diode connected transistor, and a second current source. The first diode connected transistor (40) is prebiased to generate a first base-to-emitter voltage when the input current is approximately zero. The first diode connected transistor is configured to begin limiting the range of the output voltage (Vout) at a selected knee value, which is slightly greater than the minimum input current for logic high, by changing the first base-to-emitter voltage when the input current reaches the selected knee value of the input current.
    • 提供了跨阻抗放大器(100),其包括输入,放大器和非线性限制电路。 输入被配置为提供输入电流(Iin),其包括用于逻辑高的最小输入电流和最大输入电流之间的逻辑高范围。 输入电流也包括一个范围的膝盖值。 放大器被配置为产生具有第一电压和第二电压之间的范围的输出电压。 非线性限制电路包括第一电流源,第一二极管连接晶体管,第二二极管连接晶体管和第二电流源。 当输入电流近似为零时,第一二极管连接晶体管(40)是预偏置的,以产生第一基极 - 发射极电压。 第一二极管连接的晶体管被​​配置为通过改变第一基极 - 发射极电压来开始将所选择的拐点值的输出电压(Vout)的范围限制为稍大于逻辑高的最小输入电流 输入电流达到输入电流的选择拐点值。