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    • 7. 发明授权
    • 미세구조 어레이, 미세구조 어레이의 형성 방법 및 장치,및 미세구조 어레이를 제조하기 위한 주형
    • 미세구조어레이,미세구조어레이의형성방법및장치,및미세구조어레이를제조하기위한주
    • KR100371477B1
    • 2003-02-06
    • KR1020000016133
    • 2000-03-29
    • 캐논 가부시끼가이샤
    • 시마다야스히로야기다까유끼데시마다까유끼우시지마다까시
    • G02B1/00
    • G02B3/0056G02B3/0012G02B3/0043
    • A fabrication method of fabricating an array of microstructures (8, 28, 48, 68, 108, 208) is provided. The method includes the step of preparing a substrate (1, 21, 41, 101, 201) with a surface including a usable region (5, 25, 45) and a dummy region (6, 26, 46, 66) continuously set around the usable region, at least the usable region and the dummy region of the substrate are electrically conductive and have a conductive portion (2, 22, 42, 102, 202). The method also includes the steps of forming a first insulating layer (3, 23, 43, 103, 203) on the conductive portion, and forming a plurality of openings (4, 24, 44, 104, 204) in the first insulating layer, the openings being arranged in a predetermined array pattern. Additionally, the method includes the step of performing one of electroplating and electrodeposition using the conductive portion as an electrode to form a first plated or electrodeposited layer (7, 27, 48, 68, 106, 206) in the openings and on the first insulating layer in both the usable region and the dummy region.
    • 提供了制造微结构阵列(8,28,48,68,108,208)的制造方法。 该方法包括以下步骤:准备具有包括可用区域(5,25,45)和虚设区域(6,26,46,66)的表面的基板(1,21,41,101,201),所述表面连续设置 衬底的可用区域,至少可用区域和虚设区域是导电的并且具有导电部分(2,22,42,102,202)。 该方法还包括以下步骤:在导电部分上形成第一绝缘层(3,23,43,103,203),并且在第一绝缘层中形成多个开口(4,24,44,104,204) ,开口以预定的阵列图案布置。 此外,该方法包括使用导电部分作为电极进行电镀和电沉积中的一种以在开口中和第一绝缘体上形成第一电镀或电沉积层(7,27,48,68,106,206)的步骤 层在可用区域和虚拟区域两者中。 <图像>